This part of IEC 61189 specifies methods for testing the characteristics of soldering paste using
fine solder particles (hereinafter referred to as solder paste).
This document is applicable to the solder paste using fine solder particle such as type 6, type 7
specified in IEC 61190-1-2 or finer particle sizes.
This type of solder paste is used for connecting wiring and components in high-density printed
circuit boards which are used in electronic or communication equipment and such, equipping
fine wiring (e.g., minimum conductor widths and minimum conductor gaps of 60 μm or less).
Test methods for the characteristics of solder paste in this document are considering the effect
of surface activation force due to the fine sized solder particles which could affect the test result
by existing test methods.

  • Standard
    35 pages
    English language
    sale 10% off
    e-Library read for
    1 day

IEC 62878-1:2019(E) specifies the generic requirements and test methods for device-embedded substrates. The basic test methods for printed board substrate materials and substrates themselves are specified in IEC 61189-3.
This part of IEC 62878 is applicable to device-embedded substrates fabricated by use of organic base material, which includes, for example, active or passive devices, discrete components formed in the fabrication process of electronic printed boards, and sheet-formed components.
The IEC 62878 series applies neither to the re-distribution layer (RDL) nor to electronic modules defined in IEC 62421.

  • Standard
    23 pages
    English language
    sale 10% off
    e-Library read for
    1 day

This part of IEC 61189 is used to quantify the deleterious effects of flux residues on surface
insulation resistance (SIR) in the presence of moisture.
Interdigitated comb patterns comprising long parallel electrodes on an IPC B53 standardized
test coupon are used for the evaluation. Coupons are conditioned and measurements taken at
a high temperature and humidity. The electrodes are electrically biased during conditioning to
facilitate electrochemical reactions, as shown in Figure 1 and Figure 3.
Reference can be made to IEC TR 61189-5-506, which examines different geometry comb
patterns: 400 μm x 500 μm; 400 μm x 200 μm; and 318 μm x 318 μm.
Specifically, this method is designed to simultaneously assess:
• leakage current caused by ionized water films and electrochemical degradation of test
vehicle, (corrosion, dendritic growth);
• provide metrics that can appropriately be used for binary classification (e.g. go/no go;
pass/fail);
• compare, rank or characterize materials and processes.
This test is carried out at high humidity and heat conditions.

  • Standard
    23 pages
    English language
    sale 10% off
    e-Library read for
    1 day

This part of IEC 61760 gives a reference set of requirements, process conditions and related
test conditions to be used when compiling specifications of electronic components that are
intended for usage in through-hole reflow soldering technology.
The object of this document is to ensure that components with leads intended for through-hole
reflow and surface mounting components can be subjected to the same placement and
mounting processes. Hereto, this document defines test and requirements that need to be part
of any component generic, sectional or detail specification, when through-hole reflow soldering
is intended.
Furthermore, this document provides component users and manufacturers with a reference set
of typical process conditions used in through-hole reflow soldering technology.

  • Standard
    32 pages
    English language
    sale 10% off
    e-Library read for
    1 day

IEC 62878-2-5:2019 specifies requirements based on XML schema that represents a design data format for device embedded substrate, which is a board comprising embedded active and passive devices whose electrical connections are made by means of a via, electroplating, conductive paste or printing of conductive material.
This data format is to be used for simulation (e.g. stress, thermal, EMC), tooling, manufacturing, assembly, and inspection requirements. Furthermore, the data format is used for transferring information among printed board designers, printed board simulation engineer, manufacturers, and assemblers.
IEC 62878-2-5:2019 applies to substrates using organic material. It neither applies to the re-distribution layer (RDL) nor to the electronic modules defined as M-type business model in IEC 62421.

  • Standard
    55 pages
    English language
    sale 10% off
    e-Library read for
    1 day

This part of IEC 61189 is used for evaluating the changes to the surface insulation resistance
of a pre-selected material set on a representative test coupon and quantifies the deleterious
effects of improperly used materials and processes that can lead to decreases in electrical
resistance.
An assembly process involves a number of different process materials including solder flux,
solder paste, solder wire, underfill materials, adhesives, staking compounds, temporary
masking materials, cleaning solvents, conformal coatings and more. The test employs two
different test conditions of 85 °C and 85 % relative humidity (RH), preferred for a process that
includes cleaning, or 40 °C and 90 % relative humidity (RH), preferred for processes where no
cleaning is involved.
NOTE 40 °C and 93 % RH can be used as an alternative to 40 °C and 90 % RH. Additional information is provided
in 5.4 and A.5.2.
Testing is material (set) and process / equipment specific. Qualifications are to be performed
using the production intent equipment, processes and materials.

  • Standard
    25 pages
    English language
    sale 10% off
    e-Library read for
    1 day

This part of IEC 61189 specifies the reflow soldering ability test method for components
mounted on organic rigid printed boards, the reflow heat resistance test method for organic rigid
printed boards, and the reflow soldering ability test method for the lands of organic rigid printed
boards in applications using solder alloys, which are eutectic or near-eutectic tin-lead (Pb), or
lead-free alloys.
The printed boards materials for this organic rigid printed boards are epoxide woven E-glass
laminated sheets that are specified in IEC 61249-2 (all parts).
The objective of this document is to ensure the soldering ability of the solder joint and of the
lands of the printed boards. In addition, test methods are provided to ensure that the printed
boards can resist the heat load to which they are exposed during soldering.
This document covers tests Tg1, Tg2, Tg3, Tg4, Tg5, and Tg6 listed in Table 1:

  • Standard
    44 pages
    English language
    sale 10% off
    e-Library read for
    1 day

IEC TR 61191-8:2021(E) gives guidelines for dealing with voiding in surface-mount solder joints of printed board assemblies for use in automotive electronics. This technical report focuses exclusively on voids in solder joints connecting packaged electronic or electromechanical components with printed boards (PBs). Voids in other solder joints (e.g. in a joint between a silicon die and a substrate within an electronic component, solder joints of through-hole components, etc.) are not considered. The technical background for the occurrence of voids in solder joints, the potential impact of voiding on printed board assembly reliability and functionality, the investigation of voiding levels in sample- and series-production by use of X‑ray inspection as well as typical voiding levels in different types of solder joints are discussed. Recommendations for the control of voiding in series production are also given. Annex A collects typical voiding levels of components and recommendations for acceptability.

  • Technical report
    34 pages
    English language
    sale 15% off

IEC 61188-6-1:2021 specifies the requirements for soldering surfaces on circuit boards. This includes lands and land pattern for surface mounted components and also solderable hole configurations for through-hole mounted components. These requirements are based on the solder joint requirements of the IEC 61191-1, IEC 61191-2, IEC 61191-3 and IEC 61191-4.

  • Standard
    63 pages
    English and French language
    sale 15% off

IEC 60194-1:2021 covers terms and definitions closely related with TC91 technology.
This document, together with IEC 60194-2:2017, cancel and replace IEC 60194:2015. This edition constitutes a technical revision. This edition includes the following significant technical changes with respect to the previous edition:
1) exclusion of 32 general terms better served by other TCs;
2) exclusion of 47 terms no longer used by the electronic assembly industry;
3) inclusion of 14 new terms related with device embedded substrate technology;
4) inclusion of 113 synonymous terms;
5) removal of identification codes for terms and annexes.

  • Standard
    403 pages
    English and French language
    sale 15% off

IEC 61188-6-2:2021 describes the requirements of design and use for soldering surfaces of land pattern on circuit boards. This document includes land pattern for surface mounted components. These requirements are based on the solder joint requirements of IEC 61191‑2:2017.

  • Standard
    49 pages
    English and French language
    sale 15% off

IEC 61760-3:2021 gives a reference set of requirements, process conditions and related test conditions to be used when compiling specifications of electronic components that are intended for usage in through-hole reflow soldering technology.
The object of this document is to ensure that components with leads intended for through-hole reflow and surface mounting components can be subjected to the same placement and mounting processes. Hereto, this document defines test and requirements that need to be part of any component generic, sectional or detail specification, when through-hole reflow soldering is intended.
Furthermore, this document provides component users and manufacturers with a reference set of typical process conditions used in through-hole reflow soldering technology.
This edition includes the following significant technical changes with respect to the previous edition:
a) change position tolerance requirement (0,4 mm maximum to between 0,2 mm and 0,4 mm);
b) introduce through-hole vacant method as a solder paste supply method.

  • Standard
    57 pages
    English and French language
    sale 15% off

IEC TR 61188-8:2021(E) describes the configuration of part shape data of semiconductor devices and electrical components registered in the CAD library. This document mainly describes the configuration of 2D and 3D parts shape data.

  • Technical report
    17 pages
    English language
    sale 15% off

This part of IEC 61189 is a test method designed to determine the proportion of soluble ionic
residues present upon a circuit board, electronic component or assembly. The conductivity of
the solution used to dissolve the ionic residues is measured to evaluate the level of ionic
residues.

  • Standard
    29 pages
    English language
    sale 10% off
    e-Library read for
    1 day

IEC TR 61191-7:2020(E) serves as a Technical Report and provides information, how technical cleanliness can be assessed within the electronics assembly industry. Technical cleanliness concerns sources, analysis, reduction and control as well as associated risks of particulate matter, so-called foreign-object debris, on components and electronic assemblies in the electronics industry.

  • Technical report
    115 pages
    English language
    sale 15% off

This part of IEC 61191 prescribes requirements for materials, methods and verification criteria for producing quality soldered interconnections and assemblies using surface mount and related assembly technologies. This part of IEC 61191 also includes recommendations for good manufacturing processes.

  • Standard
    48 pages
    English language
    sale 10% off
    e-Library read for
    1 day

IEC 62878-1:2019(E) specifies the generic requirements and test methods for device-embedded substrates. The basic test methods for printed board substrate materials and substrates themselves are specified in IEC 61189-3. This part of IEC 62878 is applicable to device-embedded substrates fabricated by use of organic base material, which includes, for example, active or passive devices, discrete components formed in the fabrication process of electronic printed boards, and sheet-formed components. The IEC 62878 series applies neither to the re-distribution layer (RDL) nor to electronic modules defined in IEC 62421.

  • Standard
    23 pages
    English language
    sale 10% off
    e-Library read for
    1 day

IEC 62878-2-5:2019 specifies requirements based on XML schema that represents a design data format for device embedded substrate, which is a board comprising embedded active and passive devices whose electrical connections are made by means of a via, electroplating, conductive paste or printing of conductive material. This data format is to be used for simulation (e.g. stress, thermal, EMC), tooling, manufacturing, assembly, and inspection requirements. Furthermore, the data format is used for transferring information among printed board designers, printed board simulation engineer, manufacturers, and assemblers. IEC 62878-2-5:2019 applies to substrates using organic material. It neither applies to the re-distribution layer (RDL) nor to the electronic modules defined as M-type business model in IEC 62421.

  • Standard
    55 pages
    English language
    sale 10% off
    e-Library read for
    1 day

IEC 62878-1:2019 specifies the generic requirements and test methods for device-embedded substrates. The basic test methods for printed board substrate materials and substrates themselves are specified in IEC 61189-3.
This part of IEC 62878 is applicable to device-embedded substrates fabricated by use of organic base material, which includes, for example, active or passive devices, discrete components formed in the fabrication process of electronic printed boards, and sheet-formed components.
The IEC 62878 series applies neither to the re-distribution layer (RDL) nor to electronic modules defined in IEC 62421.

  • Standard
    38 pages
    English and French language
    sale 15% off

IEC 62878-2-5:2019 specifies requirements based on XML schema that represents a design data format for device embedded substrate, which is a board comprising embedded active and passive devices whose electrical connections are made by means of a via, electroplating, conductive paste or printing of conductive material.
This data format is to be used for simulation (e.g. stress, thermal, EMC), tooling, manufacturing, assembly, and inspection requirements. Furthermore, the data format is used for transferring information among printed board designers, printed board simulation engineer, manufacturers, and assemblers.
IEC 62878-2-5:2019 applies to substrates using organic material. It neither applies to the re-distribution layer (RDL) nor to the electronic modules defined as M-type business model in IEC 62421.

  • Standard
    112 pages
    English and French language
    sale 15% off

This part of IEC 60068 specifies tests for the whiskering propensity of surface finishes of
electric or electronic components and mechanical parts such as punched/stamped parts (for
example, jumpers, electrostatic discharge protection shields, mechanical fixations, press-fit
pins and other mechanical parts used in electronic assemblies) representing the finished
stage, with tin or tin-alloy finish. Changes of the physical dimensions of mould compounds,
plastics and the like during the required test flow are not considered or assessed. The test
methods have been developed by using a knowledge-based approach.
This document can also be used at sub-suppliers, like plating shops, stamping shops or other
service providers to ensure a consistent surface quality within the supply chain.
These test methods are employed with defined acceptance criteria by a relevant component
or application specification.
The tests described in this document are applicable for initial qualification, for periodic
monitoring in accordance with Clause 7, and for changes of technology or manufacturing
processes of existing surfaces in accordance with Clause 9.
The mating area of connectors is not covered by this test method. IEC 60512-16-21 applies
for the mating areas of connectors.

  • Standard
    35 pages
    English language
    sale 10% off
    e-Library read for
    1 day

IEC 60068-2-82:2019 specifies tests for the whiskering propensity of surface finishes of electric or electronic components and mechanical parts such as punched/stamped parts (for example, jumpers, electrostatic discharge protection shields, mechanical fixations, press‑fit pins and other mechanical parts used in electronic assemblies) representing the finished stage, with tin or tin-alloy finish. Changes of the physical dimensions of mould compounds, plastics and the like during the required test flow are not considered or assessed. The test methods have been developed by using a knowledge-based approach. This edition includes the following significant technical changes with respect to the previous edition: – extension of the scope of the test standard from electronic to electromechanic components and press-fit pins, which are used for assembly and interconnect technology; – significant reduction of the testing effort by a knowledge-based selection of test conditions i.e. tests not relevant for a given materials system can be omitted (see Annex D); – harmonization with JESD 201A by omission of severities M, N for temperature cycling tests; – highly reduced test duration (1 000 h instead of 4 000 h) for damp-heat test by introducing test condition at elevated humidity of 85 % R.H. and a temperature of 85 °C providing increased severity.

  • Standard
    35 pages
    English language
    sale 10% off
    e-Library read for
    1 day

IEC TR 62878-2-7:2019 (E) describes the accelerated stress testing of passive embedded circuit boards. It can be used for screening finished boards, including multilayer and high-density interconnection (HDI) boards. These boards are mainly for mobile devices.

  • Technical report
    12 pages
    English language
    sale 15% off

This document specifies a test method to determine the amount of water absorbed by metalclad
laminates after conditioning in a pressure vessel for 1 h, 2 h, 3 h, 4 h or 5 h.

  • Standard
    10 pages
    English language
    sale 10% off
    e-Library read for
    1 day
  • Standard
    10 pages
    English language
    sale 10% off
    e-Library read for
    1 day

NEW!IEC 61191-1:2018 is available as IEC 61191-1:2018 RLV which contains the International Standard and its Redline version, showing all changes of the technical content compared to the previous edition.IEC 61191-1:2018 prescribes requirements for materials, methods and verification criteria for producing quality soldered interconnections and assemblies using surface mount and related assembly technologies. This part of IEC 61191 also includes recommendations for good manufacturing processes. This edition includes the following significant technical changes with respect to the previous edition: - the requirements have been updated to be compliant with the acceptance criteria in IPC‑A-610F; - the term "assembly drawing" has been changed to "assembly documentation" throughout; - references to IEC standards have been corrected; - Clause 9 was completely rewritten; - Annex B was removed because there are already procedures for circuit board assemblies.

  • Standard
    48 pages
    English language
    sale 10% off
    e-Library read for
    1 day

IEC 61191-1:2018 is also available as IEC 61191-1:2018 RLV which contains the International Standard and its Redline version, showing all changes of the technical content compared to the previous edition.
IEC 61191-1:2018 prescribes requirements for materials, methods and verification criteria for producing quality soldered interconnections and assemblies using surface mount and related assembly technologies. This part of IEC 61191 also includes recommendations for good manufacturing processes. This edition includes the following significant technical changes with respect to the previous edition:
- the requirements have been updated to be compliant with the acceptance criteria in IPC‑A-610F;
- the term "assembly drawing" has been changed to "assembly documentation" throughout;
- references to IEC standards have been corrected;
- Clause 9 was completely rewritten;
- Annex B was removed because there are already procedures for circuit board assemblies.

  • Standard
    89 pages
    English and French language
    sale 15% off

This part of IEC 61190 prescribes the requirements and test methods for electronic grade
solder alloys, for fluxed and non-fluxed bar, ribbon, powder solders and solder paste, for
electronic soldering applications and for "special" electronic grade solders. For the generic
specifications of solder alloys and fluxes, see ISO 9453. This document is a quality control
document and is not intended to relate directly to the material's performance in the
manufacturing process.
Special electronic grade solders include all solders which do not fully comply with the
requirements of standard solder alloys and solder materials listed herein. Examples of special
solders include anodes, ingots, preforms, bars with hook and eye ends, and multiple-alloy
solder powders.

  • Standard
    46 pages
    English language
    sale 10% off
    e-Library read for
    1 day

IEC 61190-1-3:2017 prescribes the requirements and test methods for electronic grade solder alloys, for fluxed and non-fluxed bar, ribbon, powder solders and solder paste, for electronic soldering applications and for "special" electronic grade solders. For the generic specifications of solder alloys and fluxes, see ISO 9453. This document is a quality control document and is not intended to relate directly to the material's performance in the manufacturing process. This edition includes the following significant technical changes with respect to the previous edition: a) The maximum impurity level of Pb has been revised and the table of lead free solder alloys includes some additional lead free solder alloys.

  • Standard
    46 pages
    English language
    sale 10% off
    e-Library read for
    1 day

This document applies to labels on the packaging of electronic components for automatic
handling in B2B processes. These labels use linear bar code and two-dimensional (2D)
symbols. Labels for direct product marking and shipping labels are excluded. Labels required
on the packaging of electronic components that are intended for the retail channel of
distribution in B2C processes are also excluded from this document.
Bar code and 2D symbol markings are used, in general, for automatic identification and
automatic handling of components in electronics assembly lines. Intended applications include
systems that automate the control of component packages during production, inventory and
distribution.

  • Standard
    34 pages
    English language
    sale 10% off
    e-Library read for
    1 day

IEC 60194-2:2017(E) covers terms and definitions related to printed board and electronic assembly technologies as well as other electronic technologies.
This first edition, together with IEC 60194-1, will cancel and replace IEC 60194:2015. This edition constitutes a technical revision.
This edition includes the following significant technical changes with respect to IEC 60194:2015:
a) exclusion of 32 general terms better served by other TCs;
b) exclusion of 47 terms no longer used by the electronics assembly industry;
c) inclusion of 13 new terms related with device embedded substrate technology;
d) removal of identification codes for terms as well as annexes.

  • Standard
    45 pages
    English language
    sale 15% off

IEC 61190-1-3:2017 prescribes the requirements and test methods for electronic grade solder alloys, for fluxed and non-fluxed bar, ribbon, powder solders and solder paste, for electronic soldering applications and for "special" electronic grade solders. For the generic specifications of solder alloys and fluxes, see ISO 9453. This document is a quality control document and is not intended to relate directly to the material's performance in the manufacturing process.
This edition includes the following significant technical changes with respect to the previous edition:
a) The maximum impurity level of Pb has been revised and the table of lead free solder alloys includes some additional lead free solder alloys.

  • Standard
    86 pages
    English and French language
    sale 15% off

This part of IEC 61191 gives the requirements for surface mount solder connections. The
requirements pertain to those assemblies that are totally surface mounted or to the surface
mounted portions of those assemblies that include other related technologies (e.g. throughhole,
chip mounting, terminal mounting, etc.).

  • Standard
    36 pages
    English language
    sale 10% off
    e-Library read for
    1 day

IEC 61191-2:2017(E) gives the requirements for surface mount solder connections. The requirements pertain to those assemblies that are totally surface mounted or to the surface mounted portions of those assemblies that include other related technologies (e.g. through-hole, chip mounting, terminal mounting, etc.). This edition includes the following significant technical changes with respect to the previous edition: a)   the requirements have been updated to be compliant with the acceptance criteria in IPC‑A-610F; b)   some of the terminology used in the document has been updated; c)   references to IEC standards have been corrected; d)   five termination styles have been added.

  • Standard
    36 pages
    English language
    sale 10% off
    e-Library read for
    1 day

This part of IEC 60068 outlines test Te/Tc, the solder bath wetting balance method and the
solder globule wetting balance method to determine, quantitatively, the solderability of the
terminations. Data obtained by these methods are not intended to be used as absolute
quantitative data for pass–fail purposes.
The procedures describe the solder bath wetting balance method and the solder globule
wetting balance method. They are applicable to components and printed boards with metallic
terminations and metallized solder pads.
This document provides the measurement procedures for solder alloys both with and without
lead (Pb).

  • Standard
    55 pages
    English language
    sale 10% off
    e-Library read for
    1 day

IEC 62090:2017(E) applies to labels on the packaging of electronic components for automatic handling in B2B processes. These labels use linear bar code and two-dimensional (2D) symbols. Labels for direct product marking and shipping labels are excluded. Labels required on the packaging of electronic components that are intended for the retail channel of distribution in B2C processes are also excluded from this document. Bar code and 2D symbol markings are used, in general, for automatic identification and automatic handling of components in electronics assembly lines. Intended applications include systems that automate the control of component packages during production, inventory and distribution. This edition includes the following significant technical changes with respect to the previous edition: a) Applicable data elements have been added. Data identifiers of those data elements are “10D”, “14D”, ”2P”, “25L”, “18V”, “V”, “J”, “3S”, “13E”, “33L” and “34L”. b) The following new informative annexes have been added: - Annex C, URL; - Annex D, Examples of data element short titles; - Annex E, Package levels for component package labels.

  • Standard
    34 pages
    English language
    sale 10% off
    e-Library read for
    1 day

IEC 60068-2-69:2017 outlines test Te/Tc, the solder bath wetting balance method and the solder globule wetting balance method to determine, quantitatively, the solderability of the terminations. Data obtained by these methods are not intended to be used as absolute quantitative data for pass–fail purposes. The procedures describe the solder bath wetting balance method and the solder globule wetting balance method. They are applicable to components and printed boards with metallic terminations and metallized solder pads. This document provides the measurement procedures for solder alloys both with and without lead (Pb). This edition includes the following significant technical changes with respect to the previous edition: - integration of IEC 60068-2-54; - inclusion of tests of printed boards; - inclusion of new component types, and updating test parameters for the whole component list; - inclusion of a new gauge R & R test protocol to ensure that the respective wetting balance equipment is correctly calibrated.

  • Standard
    55 pages
    English language
    sale 10% off
    e-Library read for
    1 day

IEC 61191-2:2017 gives the requirements for surface mount solder connections. The requirements pertain to those assemblies that are totally surface mounted or to the surface mounted portions of those assemblies that include other related technologies (e.g. through-hole, chip mounting, terminal mounting, etc.).
This edition includes the following significant technical changes with respect to the previous edition:
a) the requirements have been updated to be compliant with the acceptance criteria in IPC‑A-610F;
b) some of the terminology used in the document has been updated;
c) references to IEC standards have been corrected;
d) five termination styles have been added.
The contents of the corrigendum of September 2019 have been included in this copy.

  • Standard
    66 pages
    English and French language
    sale 15% off

IEC 62090:2017 applies to labels on the packaging of electronic components for automatic handling in B2B processes. These labels use linear bar code and two-dimensional (2D) symbols. Labels for direct product marking and shipping labels are excluded. Labels required on the packaging of electronic components that are intended for the retail channel of distribution in B2C processes are also excluded from this document.
Bar code and 2D symbol markings are used, in general, for automatic identification and automatic handling of components in electronics assembly lines. Intended applications include systems that automate the control of component packages during production, inventory and distribution.
This edition includes the following significant technical changes with respect to the previous edition:
a) Applicable data elements have been added. Data identifiers of those data elements are “10D”, “14D”, ”2P”, “25L”, “18V”, “V”, “J”, “3S”, “13E”, “33L” and “34L”.
b) The following new informative annexes have been added:
- Annex C, URL;
- Annex D, Examples of data element short titles;
- Annex E, Package levels for component package labels.

  • Standard
    64 pages
    English and French language
    sale 15% off

IEC 62739-3:2017(E) describes the selection methodology of an appropriate evaluating test method for the erosion of the metal materials without or with surface processing intended to be used for lead-free wave soldering equipment as a solder bath and other components which are in contact with the molten solder.

  • Standard
    34 pages
    English language
    sale 10% off
    e-Library read for
    1 day