ASTM F534-02a

Standard Test Method for Bow of Silicon Wafers (Withdrawn 2003)

SCOPE
This standard was transferred to SEMI (www.semi.org) May 2003
1.1 This test method covers determination of the average amount of bow of nominally circular silicon wafers, polished or unpolished, in the free (non-clamped) condition.  
1.2 This test method is intended primarily for use with wafers that meet the dimension and tolerance requirements of SEMI Specifications M1.
1.3 This test method can also be applied to circular wafers of other semiconducting materials, such as gallium arsenide, or electronic substrate materials, such as sapphire or gadolinium gallium garnet, that have a diameter of 25 mm or greater, a thickness of 0.18 mm or greater, and a ratio of diameter to thickness up to 250. Wafers to be tested may have one or more fiducial flats provided they are located in such a way that the slice can be centered on the support pedestals (see 7.1.2) without falling off.  
1.4 The values stated in inch-pound units are to be regarded as the standard. The values given in parentheses are for information only.
1.5  This standard does not purport to address all of the safety concerns, if any, associated with its use. It is the responsibility of the user of this standard to establish appropriate safety and health practices and determine the applicability of regulatory limitations prior to use.

General Information

• Status: Withdrawn
• Publication Date: 09-Dec-2002
• Withdrawal Date: 09-May-2003
• ICS: 29.045 - Semiconducting materials
• Technical Committee: F01 - Electronics

Relations

• Replaces: ASTM F534-02 - Standard Test Method for Bow of Silicon Wafers
• Effective Date: 10-Dec-2002

Standards Content (Sample)

NOTICE: This standard has either been superceded and replaced by a new version or discontinued.
Contact ASTM International (www.astm.org) for the latest information.
Designation: F 534 – 02a
Standard Test Method for
1
Bow of Silicon Wafers
This standard is issued under the fixed designation F 534; the number immediately following the designation indicates the year of
original adoption or, in the case of revision, the year of last revision. A number in parentheses indicates the year of last reapproval. A
superscript epsilon (e) indicates an editorial change since the last revision or reapproval.
INTRODUCTION
When this test method was developed in the 1970s, non-contact bow and warp gages employing
manual positioning, which are the basis of this test method, were in routine use. More recently, faster,
automated instruments have replaced these manual gages for most common uses in the semiconductior
industry. In these automatic systems, microprocessors or microcomputers are used to control wafer
positioning, operate the instrument and to analyze the data. See Test Method F 1390.
Despite the fact that this test method is not commonly used in its present form, it embodies all the
basic elements of this test method and a simple analysis of data. Thus, it provides useful guidance in
the fundamentals and application of differential non-contact wafer bow measurements.
1. Scope F 533 Test Method for Thickness and Thickness Variation
2
of Silicon Slices
1.1 This test method covers determination of the average
F 657 Test Method for Measuring Warp and Total Thickness
amount of bow of nominally circular silicon wafers, polished
2
Variation on Silicon Wafers by Noncontact Scanning
or unpolished, in the free (non-clamped) condition.
F 1390 Test Method for Measuring Warp on Silicon Wafers
1.2 This test method is intended primarily for use with
2
by Automated Noncontact Scanning
wafers that meet the dimension and tolerance requirements of
2.2 SEMI Standard:
SEMI Specifications M1.
M1 Specifications for Polished Monocrystalline Silicon
1.3 This test method can also be applied to circular wafers
3
Wafers
of other semiconducting materials, such as gallium arsenide, or
2.3 Federal Standard:
electronic substrate materials, such as sapphire or gadolinium
Fed. Std. No. 209E Controlled Environment Clean Room
gallium garnet, that have a diameter of 25 mm or greater, a
4
and Work Station Requirements
thickness of 0.18 mm or greater, and a ratio of diameter to
2.4 ISO Standard:
thickness up to 250. Wafers to be tested may have one or more
ISO 14644-1 Cleanrooms and associated controlled
fiducial flats provided they are located in such a way that the
environments—Part 1: Classification of airborne particu-
slice can be centered on the support pedestals (see 7.1.2)
5
lates
without falling off.
1.4 The values stated in inch-pound units are to be regarded
3. Terminology
as the standard. The values given in parentheses are for
3.1 Definitions:
information only.
3.1.1 back surface—of a semiconductor wafer, the exposed
1.5 This standard does not purport to address the safety
surface opposite to that upon which active semiconductor
concerns, if any, associated with its use. It is the responsibility
devices have been or will be fabricated.
of the user of this standard to establish appropriate safety and
3.1.2 bow—of a semiconductor wafer, the deviation of the
health practices and determine the applicability of regulatory
center point of the median surface of a free, unclamped wafer
limitations prior to use.
from a median-surface reference plane established by three
2. Referenced Documents
2.1 ASTM Standards:
2
Annual Book of ASTM Standards, Vol 10.05.
3
Available from Semiconductor Equipment and Materials International, 3081
Zanker Road, San Jose, CA 95134 (www.semi.org).
1 4
This test method is under the jurisdiction of ASTM Committee F01 on Available from GSA Business Service Centers in Boston, New York, Atlanta,
Electronics and is the direct responsibility of Subcommittee F01.06 on Silicon Chicago, Kansas City, MO, Fort Worth, Denver, Seattle, San Francisco, and Los
Materials and Process Control. Angeles.
5
Current edition approved Dec. 10, 2002. Published February 2003. Originally ISO Central Secretariat, C.P. 56, Ch-1211 Geneve 20, Switzerland; available in
approved in 1997 as F 534–77T. Last previous edition approved in 2002 as the U.S. from American National Standards Institute, 25 W. 43rd St., 4th Floor, New
F534 – 02. York, NY 10036.
Copyright © ASTM International, 100 Barr Harbor Drive, PO Box C700, West Conshohocken, PA 19428-2959, United States.
1

---------------------- Page: 1 ----------------------
NOTICE: This standard has either been superceded and replaced by a new version or discontinued.
Contact ASTM International (www.astm.org) for the latest information.
F 534 – 02a
points equally spaced on a circle with diameter a specified 6. Interferences
amount less than the nominal diameter of the wafer.
6.1 Since the determination of
...