EN 60191-6-13:2007
(Main)Mechanical standardization of semiconductor devices - Part 6-13: Design guideline of open-top-type sockets for Fine-pitch Ball Grid Array and Fine-pitch Land Grid Array (FBGA/FLGA)
Mechanical standardization of semiconductor devices - Part 6-13: Design guideline of open-top-type sockets for Fine-pitch Ball Grid Array and Fine-pitch Land Grid Array (FBGA/FLGA)
This part of IEC 60191 gives a design guideline of open-top-type semiconductor sockets for Fine-pitch Ball Grid Array ('FBGA' hereafter) and Fine-pitch Land Grid Array ('FLGA' hereafter). This standard is intended to establish the outline drawings and dimensions of the open-top-type socket out of the test and burn-in sockets applied to FBGA and FLGA.
Mechanische Normung von Halbleiterbauelementen -Teil 6-13: Konstruktionsleitfaden für Open-top-Fassungen für Feinraster-Ball-Grid-Array und Feinraster-Land-Grid-Array (FBGA/FLGA)
Normalisation mécanique des dispositifs à semiconducteurs - Partie 6-13: Guide de conception pour les supports sans couvercle pour les boîtiers matriciels à billes et à pas fins et les boîtiers matriciels à zone de contact plate et à pas fins (FBGA/FLGA)
La CEI 60191-6-13:2007 fournit un guide de conception des supports à semi-conducteurs sans couvercle pour les boîtiers matriciels à billes et à pas fins (désignés ci-après "FBGA" abréviation de Fine-pitch Ball Grid Array) et les boîtiers matriciels à zone de contact plate et à pas fins (désignés ci-après "FLGA", Fine-pitch Land Grid Array). La présente norme est destinée à établir les dessins et dimensions d'encombrement du support sans couvercle parmi les supports d'essai et de rodage appliqués aux FBGA et aux FLGA.
Mehanska standardizacija polprevodniških elementov - 6-13. del: Smernica za načrtovanje zgoraj odprtih podstavkov za fini raster mreže krogličnih priključkov in fini raster mreže priključkov v ravnini (FBGA/FLGA) (IEC 60191-6-13:2007)
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Standards Content (Sample)
2003-01.Slovenski inštitut za standardizacijo. Razmnoževanje celote ali delov tega standarda ni dovoljeno.Mechanische Normung von Halbleiterbauelementen - -Teil 6-13: Konstruktionsleitfaden für Open-top-Fassungen für Feinraster-Ball-Grid-Array und Feinraster-Land-Grid-Array (FBGA/FLGA)Normalisation mécanique des dispositifs à semi-conducteurs. - Partie 6-13 : Guide de conception pour les supports sans couvercle pour les boîtiers FBGA et FLGAMechanical standardization of semiconductor devices -- Part 6-13: Design guideline of open-top-type sockets for Fine-pitch Ball Grid Array and Fine-pitch Land Grid Array (FBGA/FLGA)31.240Mehanske konstrukcije za elektronsko opremoMechanical structures for electronic equipment31.080.01Polprevodniški elementi (naprave) na splošnoSemiconductor devices in general01.100.25Electrical and electronics engineering drawingsICS:Ta slovenski standard je istoveten z:EN 60191-6-13:2007SIST EN 60191-6-13:2008en01-februar-2008SIST EN 60191-6-13:2008SLOVENSKI
STANDARD
EUROPEAN STANDARD EN 60191-1 NORME EUROPÉENNE
EUROPÄISCHE NORM June 2007
CENELEC European Committee for Electrotechnical Standardization Comité Européen de Normalisation Electrotechnique Europäisches Komitee für Elektrotechnische Normung
Central Secretariat: rue de Stassart 35, B - 1050 Brussels
© 2007 CENELEC -
All rights of exploitation in any form and by any means reserved worldwide for CENELEC members.
Ref. No. EN 60191-1:2007 E
ICS 31.080.01
English version
Mechanical standardization of semiconductor devices -
Part 1: General rules for the preparation
of outline drawings of discrete devices (IEC 60191-1:2007)
Normalisation mécanique des dispositifs
à semi-conducteurs -
Partie 1: Règles générales
pour la préparation du dessin
des boîtiers des dispositifs
à semi-conducteurs (CEI 60191-1:2007)
Mechanische Normung
von Halbleiterbauelementen -
Teil 1: Allgemeine Regeln
für die Erstellung
von Gehäusezeichnungen
von Einzelhalbleiterbauelementen (IEC 60191-1:2007)
This European Standard was approved by CENELEC on 2007-05-01. CENELEC members are bound to comply with the CEN/CENELEC Internal Regulations which stipulate the conditions for giving this European Standard the status of a national standard without any alteration.
Up-to-date lists and bibliographical references concerning such national standards may be obtained on application to the Central Secretariat or to any CENELEC member.
This European Standard exists in three official versions (English, French, German). A version in any other language made by translation under the responsibility of a CENELEC member into its own language and notified to the Central Secretariat has the same status as the official versions.
CENELEC members are the national electrotechnical committees of Austria, Belgium, Bulgaria, Cyprus, the Czech Republic, Denmark, Estonia, Finland, France, Germany, Greece, Hungary, Iceland, Ireland, Italy, Latvia, Lithuania, Luxembourg, Malta, the Netherlands, Norway, Poland, Portugal, Romania, Slovakia, Slovenia, Spain, Sweden, Switzerland and the United Kingdom.
EN 60191-1:2007
- 2 -
Foreword The text of document 47D/678/FDIS, future edition 2 of IEC 60191-1, prepared by SC 47D, Mechanical standardization for semiconductor devices, of IEC TC 47, Semiconductor devices, was submitted to the IEC-CENELEC parallel vote and was approved by CENELEC as EN 60191-1 on 2007-05-01. The following dates were fixed: – latest date by which the EN has to be implemented
at national level by publication of an identical
national standard or by endorsement
(dop)
2008-02-01 – latest date by which the national standards conflicting
with the EN have to be withdrawn
(dow)
2010-05-01 Annex ZA has been added by CENELEC. __________ Endorsement notice The text of the International Standard IEC 60191-1:2007 was approved by CENELEC as a European Standard without any modification. In the official version, for Bibliography, the following note has to be added for the standard indicated: IEC 60191-6 NOTE
Harmonized as EN 60191-6:2004 (not modified). __________
- 3 - EN 60191-1:2007 Annex ZA
(normative)
Normative references to international publications with their corresponding European publications
The following referenced documents are indispensable for the application of this document. For dated references, only the edition cited applies. For undated references, the latest edition of the referenced document (including any amendments) applies.
NOTE
When an international publication has been modified by common modifications, indicated by (mod), the relevant EN/HD applies.
Publication Year Title EN/HD Year
IEC 60191-2 + supplements + amendments 1966 Mechanical standardization of semiconductor devices -
Part 2: Dimensions - -
IEC 60191-4 -1) Mechanical standardization of semiconductor devices -
Part 4: Coding system and classification into forms of package outlines for semiconductor device packages EN 60191-4 19992)
ISO 3703) -1) Toleranced dimensions - Conversion from inches into millimetres and vice versa - -
1) Undated reference. 2) Valid edition at date of issue. 3) ISO 370 has been withdrawn on 2000-05-18. SIST EN 60191-6-13:2008
INTERNATIONAL STANDARD IEC60191-6-13 First edition2007-06 Mechanical standardization of
semiconductor devices – Part 6-13: Design guideline of open-top-type sockets for Fine-pitch Ball Grid Array and Fine-pitch Land
Grid Array (FBGA/FLGA) P For price, see current cataloguePRICE CODE
Commission Electrotechnique InternationaleInternational Electrotechnical CommissionSIST EN 60191-6-13:2008
– 2 – 60191-6-13 © IEC:2007(E) CONTENTS
FOREWORD.3
1 Scope.5 2 Normative references.5 3 Terms and definitions.5 4 Socket code.5 4.1 Construction of socket code.5 4.2 Symbols.6 5 Terminal number.6 6 Socket nominal dimension.6 7 Socket length and width.7 8 Reference symbols and schematics.7 8.1 Outline drawings.7 8.2 Reference symbols and schematics of recommended socket mounting pattern on printed circuit board.9 8.3 Overall dimensions.10 8.4 Recommended dimensions of socket mounting pattern on printed circuit board.14 9 Individual outline drawing standard registration.15
Table 1 – Overall dimensions.10 Table 2 – Socket dimensions.12 Table 2a – Socket dimensions for Group 1, 2 and 39Ôsquare socket9Õ.12 Table 2b – Socket dimension for Group 4 (square or rectangular socket).13 Table 3 – Socket mounting dimensions.14 Table 4 – Registration table.15
Figure 1 – Outline drawings of the socket.8 Figure 2 – Applicable package outline.8 Figure 3 – Socket mounting pattern.9
60191-6-13 © IEC:2007(E) – 3 – INTERNATIONAL ELECTROTECHNICAL COMMISSION _______________
MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES –
Part 6-13: Design guideline of open-top-type sockets for Fine-pitch Ball Grid Array and Fine-pitch Land Grid Array (FBGA/FLGA)
FOREWORD 1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising all national electrotechnical committees (IEC National Committees). The object of IEC is to promote international co-operation on all questions concerning standardization in the electrical and electronic fields. To this end and in addition to other activities, IEC publishes International Standards, Technical Specifications, Technical Reports, Publicly Available Specifications (PAS) and Guides (hereafter referred to as “IEC Publication(s)”). Their preparation is entrusted to technical committees; any IEC National Committee interested in the subject dealt with may participate in this preparatory work. International, governmental and non-governmental organizations liaising with the IEC also participate in this preparation. IEC collaborates closely with the International Organization for Standardization (ISO) in accordance with conditions determined by agreement between the two organizations. 2) The formal decisions or agreements of IEC on technical matters express, as nearly as possible, an international consensus of opinion on the relevant subjects since each technical committee has representation from all interested IEC National Committees.
3) IEC Publications have the form of recommendations for international use and are accepted by IEC National Committees in that sense. While all reasonable efforts are made to ensure that the technical content of IEC Publications is accurate, IEC cannot be held responsible for the way in which they are used or for any misinterpretation by any end user. 4) In order to promote international uniformity, IEC National Committees undertake to apply IEC Publications transparently to the maximum extent possible in their national and regional publications. Any divergence between any IEC Publication and the corresponding national or regional publication shall be clearly indicated in the latter. 5) IEC provides no marking procedure to indicate its approval and cannot be rendered responsible for any equipment declared to be in conformity with an IEC Publication. 6) All users should ensure that they have the latest edition of this publication. 7) No liability shall attach to IEC or its directors, employees, servants or agents including individual experts and members of its technical committees and IEC National Committees for any personal injury, property damage or other damage of any nature whatsoever, whether direct or indirect, or for costs (including legal fees) and expenses arising out of the publication, use of, or reliance upon, this IEC Publication or any other IEC Publications.
8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is indispensable for the correct application of this publication. 9) Attention is drawn to the possibility that some of the elements of this IEC Publication may be the subject of patent rights. IEC shall not be held responsible for identifying any or all such patent rights. International Standard IEC 60191-6-13 has been prepared by subcommittee 47D: Mechanical standardization for semiconductor devices, of IEC technical committee 47: Semiconductor devices. The text of this standard is based on the following documents: FDIS Report on voting 47D/681/FDIS 47D/692/RVD
Full information on the voting for the approval of this standard can be found in the report on voting indicated in the above table. This publication has been drafted in accordance with the ISO/IEC Directives, Part 2. SIST EN 60191-6-13:2008
– 4 – 60191-6-13 © IEC:2007(E) A list of all the parts in the IEC 60191 series, under the general title Mechanical standardization of semiconductor devices, can be found on the IEC website. The committee has decided that the contents of this publication will remain unchanged until the maintenance result date indicated on the IEC web site under "http://webstore.iec.ch" in the data related to the specific publication. At this date, the publication will be
• reconfirmed, • withdrawn, • replaced by a revised edition, or • amended. A bilingual version of this publication may be issued at a later date.
60191-6-13 © IEC:2007(E) – 5 – MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES –
Part 6-13: Design guideline of open-top-type sockets for Fine-pitch Ball Grid Array and Fine-pitch Land Grid Array (FBGA/FLGA)
1 Scope This part of IEC 60191 gives a design guideline of open-top-type semiconductor sockets for Fine-pitch Ball Grid Array (“FBGA” hereafter) and Fine-pitch Land Grid Array (“FLGA” hereafter). This standard is intended to establish the outline drawings and dimensions of the open-top-type socket out of the test and burn-in sockets applied to FBGA and FLGA. 2 Normative references The following referenced documents are indispensable for the application of this document. For dated references, only the edition cited applies. For undated references, the latest edition of the referenced document (including any amendments) applies. IEC 60191-2, Mechanical standardization of semiconductor devices – Part 2: Dimensions IEC 60191-6:2004, Mechanical standardization of semiconductor devices – Part 6: General rules for the preparation of outline drawings of surface mounted semiconductor device packages 3 Terms and definitions For the purposes of this document, the terms and definitions of IEC 60191-6 apply. 4 Socket code 4.1 Construction of socket code A socket code is constructed as follows. [
Symbol of socket
4.2 a) ][ Symbol of socket type
4.2 b) ][ Symbol of nominal dimension 4.2 c) ][ Number of terminal arrays 4.2 d) ][
Terminal pitch
4.2 e) ]Example
SFB
TX
2120AB
– 6 – 60191-6-13 © IEC:2007(E) 4.2 Symbo
...
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