IEC 62501:2009/AMD1:2014
(Amendment)Amendment 1 - Voltage sourced converter (VSC) valves for high-voltage direct current (HVDC) power transmission - Electrical testing
Amendment 1 - Voltage sourced converter (VSC) valves for high-voltage direct current (HVDC) power transmission - Electrical testing
Amendement 1 - Valves à convertisseur de source de tension (VSC) pour le transport d'énergie en courant continu à haute tension (CCHT) - Essais électriques
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Standards Content (Sample)
IEC 62501 ®
Edition 1.0 2014-08
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
colour
inside
A MENDMENT 1
AM ENDEMENT 1
Voltage sourced converter (VSC) valves for high-voltage direct current (HVDC)
power transmission – Electrical testing
Valves à convertisseur de source de tension (VSC) pour le transport d’énergie
en courant continu à haute tension (CCHT) – Essais électriques
IEC 62501:2009-06/AMD1:2014-08(en-fr)
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IEC 62501 ®
Edition 1.0 2014-08
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
colour
inside
A MENDMENT 1
AM ENDEMENT 1
Voltage sourced converter (VSC) valves for high-voltage direct current (HVDC)
power transmission – Electrical testing
Valves à convertisseur de source de tension (VSC) pour le transport d’énergie
en courant continu à haute tension (CCHT) – Essais électriques
INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
COMMISSION
ELECTROTECHNIQUE
PRICE CODE
INTERNATIONALE
CODE PRIX S
ICS 29.200; 29.240 ISBN 978-2-8891-0744-5
– 2 – IEC 62501:2009/AMD1:2014
© IEC 2014
FOREWORD
This amendment has been prepared by subcommittee 22F: Power electronics for electrical
transmission and distribution systems, of IEC technical committee 22: Power electronic
systems and equipment.
The text of this amendment is based on the following documents:
CDV Report on voting
22F/299/CDV 22F/316A/RVC
Full information on the voting for the approval of this amendment can be found in the report
on voting indicated in the above table.
The committee has decided that the contents of this amendment and the base publication will
remain unchanged until the stability date indicated on the IEC web site under
"http://webstore.iec.ch" in the data related to the specific publication. At this date, the
publication will be
• reconfirmed,
• withdrawn,
• replaced by a revised edition, or
• amended.
IMPORTANT – The 'colour inside' logo on the cover page of this publication indicates
that it contains colours which are considered to be useful for the correct
understanding of its contents. Users should therefore print this document using a
colour printer.
_____________
CONTENTS
3.3 Operating states
Replace the subclause title as follows:
3.3 Operating states of converter
4.1.3 Sequence of test
Delete the subclause title.
Add the titles of new Subclause 4.1.8 and new Clause 15 as follows:
4.1.8 Conditions to be considered in determination of type test parameters
15 Tests for dynamic braking valves
Annex A (informative) Overview of VSC topology
© IEC 2014
Replace the annex title as follows:
Annex A (informative) Overview of VSC converters in HVDC power transmission
Add the titles of new Subclauses A.5.1 to A.5.4 and new Clause A.7 as follows:
A.5.1 General
A.5.2 Modular multi-level converter (MMC)
A.5.3 Cascaded two level converter (CTL)
A.5.4 Terminology for valves of the controllable voltage source type
A.7 Hybrid VSC valves
Annex B (informative) Fault tolerance capability
Replace the annex title as follows:
Annex B (informative) Valve component fault tolerance
Figure A.9 – One possible implementation of a multi-level “voltage source” VSC valve
Replace the figure title as follows:
Figure A.9 - The half-bridge MMC circuit
Add, in the list of figures, the titles of new Figures A.10 to A.13 as follows:
Figure A.10 – The full-bridge MMC circuit
Figure A.11 – The half-bridge CTL circuit
Figure A.12 – Construction terms in MMC valves
Figure A.13 – Construction terms in CTL valves
1 Scope
Add, after the first paragraph, the following two paragraphs:
The scope of this standard includes the electrical type and production tests of dynamic
braking valves which may be used in some HVDC schemes for d.c. overvoltage limitation.
This standard can be used as a guide for testing of STATCOM valves.
Add, at the end of the last sentence of the last paragraph, the words “between the purchaser
and the supplier” so that the last sentence reads as follows:
For other types of valves, the test requirements and acceptance criteria should be agreed
between the purchaser and the supplier.
2 Normative references
Delete from the existing list, the following references:
IEC 60060-1:1989, High-voltage test techniques – Part 1: General definitions and test
requirements
IEC 60071-1:2006, Insulation co-ordination – Part 1: Definitions, principles and rules
– 4 – IEC 62501:2009/AMD1:2014
© IEC 2014
Add to the list, the following references:
IEC 60071 (all parts), Insulation co-ordination
IEC 60270:2000, High-voltage test techniques – Partial discharge measurements
3.2 Power semiconductor terms
Replace the existing introductory text, terms and definitions by the following new terms and
definitions:
3.2.1
turn-off semiconductor device
controllable semiconductor device which may be turned on and off by a control signal, for
example an IGBT
NOTE There are several types of turn-off semiconductor devices which can be used in VSC converters for HVDC.
For convenience, the term IGBT is used throughout this standard to refer to the main turn-off semiconductor device.
However, the standard is equally applicable to other types of turn-off semiconductor devices.
3.2.2
insulated gate bipolar transistor
IGBT
turn-off semiconductor device with three terminals: a gate terminal (G) and two load terminals
emitter (E) and collector (C)
NOTE By applying appropriate gate to emitter voltages, the load current can be controlled, i.e. turned on and
turned off.
3.2.3
free-wheeling diode
FWD
power semiconductor device with diode characteristic
NOTE 1 A FWD has two terminals: an anode (A) and a cathode (K). The current through FWDs is in the opposite
direction to the IGBT current.
NOTE 2 FWDs are characterized by the capability to cope with high rates of decrease of current caused by the
switching behaviour of the IGBT.
3.2.4
IGBT-diode pair
arrangement of IGBT and FWD connected in inverse parallel
3.3 Operating states
Replace the existing title, terms and definitions by the following new title, terms and
definitions.
3.3 Operating states of converter
3.3.1
blocking state
condition of the converter, in which a turn-off signal is applied continuously to all IGBTs of the
converter
NOTE Typically, the converter is in the blocking state condition after energization.
© IEC 2014
3.3.2
de-blocked state
condition of the converter, in which turn-on and turn-off signals are applied repetitively to
IGBTs of the converter
3.3.3
valve protective blocking
means of protecting the valve or converter from excessive electrical stress by the emergency
turn-off of all IGBTs in one or more valves
3.3.4
voltage step level
voltage step caused by switching of a valve or part of a valve during the de-blocked state of
the converter
NOTE For valves of the controllable voltage source type, the voltage step level corresponds to the change of
voltage caused by switching one submodule or cell. For valves of the switch type, the voltage step level
corresponds to the change of voltage caused by switching the complete valve.
3.4 VSC construction terms
Replace the existing terms and definitions by the following new terms and definitions:
3.4.1
VSC phase unit
equipment used to connect the two d.c. busbars to one a.c. terminal
3.4.2
switch type VSC valve
arrangement of IGBT-diode pairs connected in series and arranged to be switched
simultaneously as a single function unit
3.4.3
controllable voltage source type VSC valve
complete controllable voltage source assembly, which is generally connected between one a.c.
terminal and one d.c. terminal
3.4.4
diode valve
semiconductor valve containing only diodes as the main semiconductor devices, which might
be used in some VSC topologies
3.4.5
dynamic braking valve
complete controllable device assembly, which is used to control energy absorption in braking
resistor
3.4.6
valve
VSC valve, dynamic braking valve or diode valve according to the context
3.4.7
submodule
part of a VSC valve comprising controllable switches and diodes connected to a half bridge or
full bridge arrangement, together with their immediate auxiliaries, storage capacitor, if any,
where each controllable switch consists of only one switched valve device connected in series
– 6 – IEC 62501:2009/AMD1:2014
© IEC 2014
3.4.8
cell
MMC building block where each switch position consists of more than one IGBT-diode pair
connected in series
NOTE See Figure A.13
3.4.9
VSC valve level
smallest indivisible functional unit of VSC valve
NOTE For any VSC valve in which IGBTs are connected in series and operated simultaneously, one VSC valve
level is one IGBT-diode pair including its auxiliaries (see Figure A.13). For MMC type without IGBT-diode pairs
connected in series one valve level is one submodule together with its auxiliaries (see Figure A.12).
3.4.10
diode valve level
part of a diode valve composed of a diode and associated circuits and components, if any
3.4.11
redundant levels
maximum number of series connected VSC valve levels or diode valve levels in a valve that
may be short-circuited externally or internally without affecting the safe operation of the valve
as demonstrated by type tests, and which if and when exceeded, would require shutdown of
the valve to replace the failed levels or acceptance of increased risk of failures
NOTE In valve designs such as the cascaded two level converter, which contain two or more conduction paths
within each cell and have series-connected VSC valve levels in each path, redundant levels shall be counted only
in one conduction path in each cell.
3.4.12
dynamic braking valve level
part of a dynamic braking valve comprising a controllable switch and an associated diode, or
controllable switches and diodes connected in parallel, or controllable switches and diodes
connected to a half bridge arrangement, together with their immediate auxiliaries, storage
capacitor, if any
3.5.1 valve structure
Replace the existing definition by the following new definition:
structural components of a valve, required in order to physically support the valve modules
3.5.2 valve support
Delete the note.
3.5.4 valve section
Replace the definition by the following new definition and notes:
electrical assembly defined for test purposes, comprising a number of valve levels and other
components, which exhibits pro-rated electrical properties of a complete valve
NOTE 1 For valves of controllable voltage source type the valve section shall include cell or submodule d.c.
capacitor in addition to VSC valve levels.
NOTE 2 The minimum number of VSC or diode valve levels allowed in a valve section is defined along with the
requirements of each test.
3.5.5 valve base electronics
Replace the definition by the following new definition.
© IEC 2014
electronic unit, at earth potential, providing the electrical to optical conversion between the
converter control system and the VSC valves
4.1.3 Sequence of test
Delete the entire subclause, including the title, text and note.
4.1.4 Test procedure
Replace the existing sentence with the following new text:
The tests shall be performed in accordance with IEC 60060, where applicable with due
account for IEC 60071 (all parts). Partial discharge measurements shall be performed in
accordance with IEC 60270.
4.1.5 Ambient temperature for testing
Replace the text of this subclause with the following sentence:
The tests shall be performed at the prevailing ambient temperature of the test facility, unless
otherwise specified.
4.1.6 Frequency for testing
Add, at the end of the subclause, the following note:
NOTE Guidance on the worst service conditions can be found in CIGRÉ Technical Brochure No. 447.
Add, after 4.1.7, a new subclause as follows:
4.1.8 Conditions to be considered in determination of type test parameters
Type test parameters should be determined based on the worst operating and fault conditions
to which the valve can be subjected, according to system studies. Guidance on the conditions
can be found in CIGRÉ Technical Brochure No. 447.
4.2 Atmospheric correction factor
Insert, between the last dashed item and the last paragraph , the following new paragraph:
Realistic worst case combinations of temperature and humidity which can occur in practice
shall be used for atmospheric correction.
4.4.2 Criteria applicable to valve levels
Replace, in this entire subclause the words “short-circuited” by “short or open circuited”
Delete, in the last sentence of item f), the word “total”, so that the sentence reads as follows:
If the number of such levels exceeds 3 %, then the nature of the faults and their cause shall
be reviewed and additional action, if any, agreed between purchaser and supplier.
Table 2 – Valve level faults permitted during type tests
Replace the words “short-circuited” by “short or open circuited”.
– 8 – IEC 62501:2009/AMD1:2014
© IEC 2014
6.2 Test object
Replace in the third sentence of the first paragraph the words “VSC /diode” by “valve”.
6.4 Maximum continuous operating duty test
Delete in the fifth paragraph, the last sentence “The coolant temperature shall be not less …
temperatures in service” so that the paragraph now ends with “shall be representative of that
used in service”.
6.6 Minimum d.c. voltage test
Correct in the notation for the letter symbol U , the word “require” to “required”.
W
7.3.1 Valve support d.c. voltage test
Replace, in the second sentence of the first paragraph, the words “in approximately 10 s” by
“as fast as possible”.
Replace the existing note and the text below the note with the following new notes and text:
NOTE 1 Where possible the test voltage should be increased from 50 % to the maximum voltage level within
approximately 10 s. A longer time may be used; however, this may overstress the test object.
NOTE 2 If an increasing trend in the magnitude or rate of partial discharge is observed, the test duration may be
extended by mutual agreement between the purchaser and supplier.
The test shall then be repeated with the voltage of opposite polarity.
Prior to the test and before repeating the test with voltage of opposite polarity the valve
support may be short-circuited and earthed for a duration of several hours. The same
procedure may be followed at the end of d.c. voltage test.
The valve support d.c. test voltage U shall be determined in accordance with the following:
tds
1 min. test
U =±U ⋅k ⋅k
tds dmS1 3 t
3 h test
U =±U ⋅k
tds dmS2 3
where
U is the maximum of 1 s average value of voltage appearing across the valve support
dmS1
as determined by the insulation coordination study;
U is the maximum value of the d.c. component of the steady-state operating voltage
dmS2
appearing across the valve support;
k is a test safety factor;
k = 1,1;
k is the atmospheric correction factor according to 4.2.
t
7.3.2 Valve support a.c. voltage test
Replace the first paragraph as follows:
© IEC 2014
To perform the test, the two main terminals of the valve shall be connected together, and the
a.c. test voltage then applied between the two main terminals thus connected and earth.
Starting from a voltage not higher than 50 % of the maximum test voltage, the voltage shall be
raised to the specified 1 min test voltage, kept constant for 1 min, reduced to the specified
30 min test voltage, kept constant for 30 min and then reduced to zero.
Before the end of the 30 min test the level of partial discharge shall be monitored and
recorded over a 1 min period. If the value of partial discharge is below 200 pC, the design
may be accepted unconditionally. If the value of partial discharge exceeds 200 pC, the test
results shall be evaluated.
Delete in the list of notations, the second and the third symbols and their meanings i.e."U
tas1
is the 1 min test voltage" and "U is the 30 min test voltage".
tas2
8.3.1 MVU d.c. voltage test to earth
Replace, in the second paragraph, the words “in approximately 10 s” by “as fast as possible”.
Add, after the second paragraph the following new note and renumber the existing note as
“NOTE 2”.
NOTE 1 Where possible the test voltage should be increased from 50 % to the maximum voltage level within
approximately 10 s. A longer time may be used; however, this may overstress the test object.
Replace the last two paragraphs including the list of notations, from “Prior to the test, the
MVU terminal…” to “k = 1,0 for the 3 h test. ” by the following new text:
t
Prior to the test and before repeating the test with voltage of opposite polarity the MVU
terminals may be short-circuited together and earthed for a duration of several hours. The
same procedure may be followed at the end of d.c. voltage test.
The MVU d.c. test voltage U shall be determined in accordance with the following:
tdm
1 min. test
U =±U ⋅k ⋅k
tdm dmm1 5 t
3 h test
U =±U ⋅k
tdm dmm2 5
where
U is the maximum of 1 s average value of voltage appearing between the high-voltage
dmm1
terminal of the MVU and earth;
U is the maximum value of the d.c. component of the steady-state operating voltage
dmm2
appearing between the high-voltage terminal of the MVU and earth;
k is a test safety factor;
k = 1,1;
k is the atmospheric correction factor according to 4.2.
t
8.3.2 MVU a.c. voltage test
Replace the fourth paragraph “During the specified 30 min. test, the level …” by the following
new text:
– 10 – IEC 62501:2009/AMD1:2014
© IEC 2014
Before the end of the 30 min test, the level of partial discharge shall be monitored and
recorded over a 1 min. period. If the value of partial discharge is below 200 pC, the design
may be accepted unconditionally. If the value of partial discharge exceeds 200 pC, the test
results shall be evaluated.
9.2 Test object
Replace the third sentence of the first paragraph with the following new sentence:
The test valve or valve section shall be assembled with all auxiliary components except for
the valve arrester if provided.
9.3.1 Valve a.c. – d.c. voltage test
Replace the entire text of this subclause by the following new text:
This test consists of a short-duration test and a long-duration test. The short-duration test
reproduces the composite a.c. – d.c. voltage resulting from certain converter or system faults.
In this test, a capacitor can be used in conjunction with an a.c. test voltage source to produce
a composite a.c. – d.c. voltage waveform. Depending on the converter topology, the capacitor
could be an integral part of the valve, or it could be a separate item (part of the test circuit,
not part of the test object).
Alternatively, a separate d.c. voltage source could be used to substitute the capacitor.
Starting from a voltage not higher than 50 % of the maximum test voltage, the voltage shall be
raised to the specified 10 s test level as fast as possible, reduced to the specified 3 h test
voltage, kept constant for 3 h and then reduced to zero.
For a.c. PD (partial discharge) measurement the peak value of the periodic partial discharge
recorded during the last minute of the 3 h test shall be less than 200 pC, provided that the
components which are sensitive to partial discharge in the valve have been separately tested.
For d.c PD measurement the recording time shall be the last hour of the 3 h test. The number
of pulses exceeding 300 pC shall not exceed 15 per minute, averaged over the record period.
Of these, no more than seven pulses per minute shall exceed 500 pC, no more than three
pulses per minute shall exceed 1 000 pC and no more than one pulse per minute shall exceed
2 000 pC.
NOTE 1 Performing the valve a.c. – d.c. voltage test presents considerable practical difficulties on valves of the
“controllable voltage source” type because of the high current drawn by the in-built capacitance during start-up and
the slow discharge rate of the capacitor at the end of the first part of the test. For this reason, it may be necessary
to modify the test procedure when testing valves of this type. Alternative test methods to be considered include the
temporary substitution of a special test capacitor with reduced capacitance but the same physical size, or the pre-
charging of the cell or submodule d.c. capacitor from a separate source before commencing the test.
NOTE 2 Where possible the test voltage should be increased from 50 % to the maximum voltage level within
approximately 10 s. A longer time may be used; however, this overstresses the test object.
NOTE 3 If an increasing trend in the rate or magnitude of partial discharge is observed, the test duration may be
extended by mutual agreement between the purchaser and supplier.
NOTE 4 It may be necessary to disable gate electronics or other auxiliary circuits in this test, or provide
independent means for powering them, in order to prevent interference with partial discharge measurement, for
example, from gate unit power supply circuits.
NOTE 5 In the event that it is not possible to disable gate electronics or other auxiliary circuits in this test and
interference can be proven to be caused by electronics circuit then this interference may be deducted from
measurement.
NOTE 6 The use of a capacitor instead of a d.c. source in the test circuit should be mutually agreed by
manufacturer and purchaser as the test voltage is higher than actual value.
© IEC 2014
The valve test voltages have a sinusoidal waveshape superimposed on a d.c. level.
The valve 10 s test voltage U shall be determined in accordance with the following:
tv1
U =(k ⋅U ⋅sin(2πft)+ U )⋅k ⋅k
tv1 c1 tac1 tdc1 o 9
where
U is the peak value of maximum transient a.c. component over-voltage across valve. The
ac1
limiting effect of valve arrester or pole arrester can be taken into account to derive the
over-voltage in service condition;
U is the maximum transient d.c. component over-voltage across valve. The limiting effect
dc1
of valve arrester or pole arrester can be taken into account to derive the over-voltage
in service condition;
k is the voltage step overshoot factor related to one output voltage step of the converter,
c1
under the condition consistent with that used to define U . For a MMC or CTL type
ac1
converter the voltage step overshoot factor relates to the overshoot factor of one cell
or submodule;
k is a test scaling factor according to 4.3.2;
o
k is a test safety factor;
k = 1,10;
f is the test frequency (50 Hz or 60 Hz depending on test facilities).
The valve 3 h test voltage U shall be determined in accordance with the following:
tv2
U = U + U
tv2 tac2 tdc2
2⋅U ⋅sin(2πft)
max−cont
U = ⋅k ⋅k ⋅k
tac2 c2 o 10
U = U ⋅ k ⋅ k
tdc2 dmax o 10
where
U is the maximum steady-state phase-to-phase voltage on the a.c. system or the
max-cont
valve side of the transformer, if a converter transformer is used in between a.c.
system and converters;
U is the maximum value of the d.c. component of the steady-state operating voltage
dmax
of the d.c. system;
k is the voltage step overshoot factor related to one output voltage step of the
c2
converter, under the condition consistent with that used to define U ;
tac2
k is a test scaling factor according to 4.3.2;
o
k is a test safety factor;
k = 1,10;
f is the test frequency (50 Hz or 60 Hz depending on test facilities).
9.3.2 Valve impulse tests (general)
Add, at the end of item c), the words “and consequently the impulse tests can be omitted” so
that item c) reads as follows:
– 12 – IEC 62501:2009/AMD1:2014
© IEC 2014
c) If the valve impulse withstand levels are equal to or less than the valve a.c. – d.c. test level,
it is deemed that the valve a.c. – d.c. test can cover the impulse tests and consequently the
impulse tests can be omitted .
9.3.3 Valve switching impulse test
Replace, in the second list of notations, “k = 1,3” by “k = 1,15”.
12 12
9.3.4 Valve lightning impulse test
Replace, in the second list of notations, “k = 1,3” by “k = 1,15”.
14 14
10.1 Purpose of test
Add, at the end of the second paragraph, the following new sentence:
Depending on the control and protection strategy more than one test may be required in order
to reproduce all relevant stresses.
Delete the fourth paragraph and subsequent three item bullet list.
11.1 Purpose of tests
Replace the existing text of this subclause by the following new text:
The principal objective is to check the adequacy of the devices, especially the diodes, any
additional components used to protect the diodes (such as bypass thyristors) and the
associated electrical circuits with regard to current stresses under specified short circuit
conditions, such as short-circuit fault at d.c. side, until the control and protection circuit
breaks the fault current. The VSC valves should be designed to withstand the short circuit
overcurrent for the number of cycles needed to open the main AC circuit breaker, without any
failure or damage in the equipment, considering also that a possible recovery voltage could
appear. The test should normally be performed with the valve electronics initially energized,
unless the short-circuit current can occur under conditions where the valve is de-energized
(for example due to the inrush current when the converter breaker is closed at start-up).
11.3 Test requirements
Add, at the end of the first paragraph, the following new sentence:
In order to define the maximum junction temperature rise of the IGBTs and the diodes, all the
possible overload conditions (in terms of amplitude and duration) shall be taken into
consideration.
Insert, between 12.3.4 and Clause 13, a new clause as follows:
15 Tests for dynamic braking valves
In some VSC HVDC schemes, but particularly where the HVDC system is exporting power
from a small islanded a.c. system with little or no load (for example an offshore wind farm) the
HVDC system may be required to include a dynamic braking system, for example as a
chopper connected to the d.c. terminals of the VSC system. The function of the dynamic
braking system is to absorb and dissipate the power generated in the islanded AC system
during faults in the receiving-end AC system, typically for durations of 1 s to 2 s.
© IEC 2014
There are several possible ways of implementing such a dynamic braking system but the
valves in this system will, in general, be of similar design to the main VSC valves used for
power transmission.
The dynamic braking valves may require type tests, for which the requirements given in the
preceding Clauses 6 to12 are generally applicable; however, the dynamic braking valves
generally require only a sub-set of the type tests applicable to VSC valves.
The dynamic braking valve normally remains in the standby state but is required to operate
and carry current for short durations when the receiving-end a.c. system suffers a fault. The
dielectric test conditions are therefore similar to those for the VSC valve but the operational
test conditions only need to be applied for short durations.
Annex A – Overview of VSC topology
Replace the existing title by the following new title:
Overview of VSC converters in HVDC power transmission
A.2 VSC basics
Replace the last sentence of the first paragraph, with the following new sentence:
The term “level” here refers to a discrete output voltage level and should not be confused with
the term “VSC valve level” which refers to a physical building-block of the valve, for example
an individual IGBT and associated components.
A.3 Overview of main types of VSC valve
Delete, in the introductory sentence of the list, the words “or have been described in
literature”.
Replace, in the second sentence of the second bullet item the words “… cannot be separated
from …” by “cannot conveniently be separated from …”
Add, at the end of the subclause, the following new paragraph:
Some other categories of “hybrid” VSC valve have also been described in literature and
exhibit a mixture of characteristics from the two categories above; however at the time of
writing, development work in these topologies is in the relatively early stages and these
topologies are not yet commercially available.
A.4.1 General
Replace the first two paragraphs by the following new paragraphs:
VSC valves of this type bear a close apparent resemblance to conventional thyristor valves, in
that they consist of a large number of series-connected IGBT devices which are switched
simultaneously. In common with conventional thyristor valves, simultaneous switching of the
series-connected IGBTs is vital. Redundancy can be provided in the same way as for an LCC
thyristor valve, by providing a few additional IGBT devices in series and either ensuring that
the IGBTs are of a special type with short-circuit failure mode, or are equipped with a parallel-
connected shorting switch.
– 14 – IEC 62501:2009/AMD1:2014
© IEC 2014
Valves of this type are normally used with converters with a relatively low number of output
levels. To compensate for the low number of output levels, such converters usually use pulse
width modulation (PWM) to achieve a good approximation of a sinusoidal output voltage.
A.4.2 2-level converter
Add, at the end of the last sentence in brackets in the first paragraph, the words “in order to
prevent a “shoot-through” or simultaneous conduction of the two valves in series.” so that the
new sentence reads as follows:
(In practice, there is usually a slight dead-time or “underlap” between the two valves in order
to prevent a “shoot-through” or simultaneous conduction of the two valves in series.)
Figure A.5 – Basic circuit topology of one phase unit of a 3-level diode-clamped
converter
Replace the existing figure by the following new figure:
Line-neutral voltage
V1
½ U
dc
U
V2
½ U
dc
DC –½ U
dc
AC
transmission
system
½ U V3
dc
V4
Diode valve VSC valve
IEC
Figure A.6 – Basic circuit topology of one phase unit of a 5-level diode-clamped
converter
Replace the existing figure by the following new figure:
© IEC 2014
V1
¼ U
dc
V2
Line-neutral voltage
V3 ½ U
dc
¼ U
dc
¼ U
dc
V4
DC U
AC
transmission
system
–¼ U
dc
V5
–½ U
¼ U dc
dc
V6
V7
Diode valve
VSC valve
¼ U
dc
V8
IEC
A.5 VSC valves of the “controllable voltage source” type
Insert, between the existing title and the text of this clause, the following new subclause title:
A.5.1 General
Replace the third and fourth paragraphs as follows:
Each of the valves V1 and V2 in the phase unit produces an output voltage consisting of a
sinusoidal a.c. component with a d.c. offset (equal to ½ U ). The output voltages of the two
dc
valves are varied such that at any given time, U(V1) + U(V2) = U .
dc
In principle, there can be many different methods of implementing such a valve, but two
(closely related) methods have found widespread application: the modular multi-level
converter (MMC) and the cascaded two-level converter (CTL).
Figure A.9 – One possible implementation of a multi-level “voltage source” VSC valve
Delete the figure.
Add, the following new subclauses and new figures :
A.5.2 Modular multi-level converter (MMC)
One implementation of the MMC circuit is shown in Figure A.9. The circuit of each submodule is
modular, each submodule comprising a single, isolated d.c. capacitor and two IGBT switches.
In effect, this circuit is very similar to that of the basic 2-level converter (see Figure A.4)
except that the interconnections between submodules are made from the a.c. terminal
(between IGBT1 and IGBT2) of one submodule, to one of the d.c. terminals of the
neighbouring submodule. With this circuit, each submodule can produce two discrete output
states: U = 0 (obtained by switching IGBT2 on) or U = U (obtained by switching
dc_submodule
– 16 – IEC 62501:2009/AMD1:2014
© IEC 2014
IGBT1 on). U is the d.c. link voltage of a single submodule, which is much less
dc_submodule
than U , the d.c. link voltage of the complete system.
dc
With this circuit, it is possible to synthesize a unipolar valve output voltage with a maximum of
U = U and a minimum of U = 0. However, in common with all the converter topologies
dc
discussed so far, the converter has no capacity to suppress the overcurrent which arises from
a short-circuit between the d.c terminals of the converter. This is because although the two
IGBTs can be turned off very quickly, a conducting path always remains through the
freewheel diode in parallel with IGBT2.
Another implementation of the MMC circuit addresses this shortcoming by using a full-bridge
arrangement, as shown on Figure A.10, instead of the half-bridge arrangement shown in
Figure A.9.
Submodule output voltage
To submodule n + 1
U
dc submodule
IGBT1
+
U
dc_submodule
Submodule n
U
IGBT2
From submodule n – 1
IEC
Figure A.9 – The half-bridge MMC circuit
To submodule n + 1
Submodule output voltage
U
dc submodule
IGBT1 IGBT3
+
U
dc submodule
Submodule n
U
IGBT2 IGBT4
-U
dc submodule
From submodule n – 1
IEC
Figure A.10 – The full-bridge MMC circuit
In the full-bridge version of the MMC, each submodule contains four IGBTs instead of two,
and can produce three discrete output voltage states:
• U = 0 (obtained by switching on either IGBT1 + IGBT3 or IGBT2 + IGBT4);
• U = +U (obtained by switching on IGBT1+IGBT4); or
dc_submodule
• U = −U (obtained by switching on IGBT2+IGBT3)
dc_submodule
© IEC 2014
The full-bridge circuit allows the valve to synthesize an output voltage of either polarity,
allowing a new voltage-sourced converter to be connected as a tap to an existing HVDC line.
Even when used on a unipolar d.c. line, the additional flexibility provided by the circuit allows
the a.c. component of valve voltage to exceed the d.c. component (which is not possible with
the half-bridge circuit), resulting in a lower a.c. current in the valve. In addition, the ability to
suppress fault currents arising from short-circuits between the d.c. terminals can allow some
simplification of protective functions. On the other hand the IGBT component count and the
conduction losses, are increased by nearly double compared with the half-bridge version.
Since the MMC circuit is inherently modular, it is relatively straightforward to obtain high
numbers of output levels, without requiring either PWM (which leads to higher switching
losses and requires filtering) or series-connected IGBTs (which leads to problems of ensuring
voltage distribution). Industry standard IGBT devices can be used, which is not the case for
valves of the switch type. Redundancy cannot be provided within each submodule (because
the correct operation of the submodule requires both IGBTs to be healthy) and is usually
provided by equipping the valve with a few extra submodules and ensuring that the entire
submodule is shorted out in the event of a failure.
On the other hand, the number and size of discrete d.c. capacitors required can be
considerable, and there may be difficulties in ensuring that all d.c. capacitor voltages remain
balanced. In comparison with two- or three-level converters, therefore, this topology allows for
a simpler valve design and lower losses at the expense of a more complex controls
architecture and greater space requirement.
A.5.3 Cascaded two level converter (CTL)
An advantage of the MMC circuit is that it avoids the need for IGBTs to be directly connected
and switched synchronously in series. However, it is also possible to realise the MMC circuit
with more than one IGBT in series in each switching position. Converters designed in this way
are referred to as cascaded two level converters in order to distinguish them from the MMC
circuit, although in nearly every respect the circuit functions in exactly the same way as the
MMC circuit.
In common with the MMC circuit, the CTL circuit can exist in half-bridge and full-bridge
variants. The building-block of the CTL valve is referred to as a “cell” and the half-bridge
version of a cell is shown on Figure A.11. Each of the two switch positions consist of n IGBTs
in series, switched synchronously, and the cell d.c. capacitor will operate at approximately n
times the voltage of a submodule d.c. capacitor in the MMC circuit.
In operational terms the only significant difference between the CTL and MMC circuits is that
the CTL circuit produces a valve output voltage containing fewer, larger, steps than the MMC
circuit. Its harmonic performance is therefore not quite as good as that of the MMC circuit,
although if the number of IGBTs per switching position is modest (for example, 5 to10) then it
can still achieve very high waveform quality while permitting some simplification of the control
system compared to the MMC circuit. The CTL circuit does, however, require sophisticated
IGBT gate drive circuits and a more specialised type of IGBT, in common with all valves of the
switch type.
Redundancy is provided within each cell by equipping each switch position with more IGBTs
than are normally required to operate within the rated voltage of the converter.
– 18 – IEC 62501:2009/AMD1:2014
© IEC 2014
To cell n + 1
IGBT1_1
IGBT1_2
Cell output voltage
U
dc cell
IGBT1_n
+
U
dc_cell
Cell n
U
IGBT2_1
IGBT2_2
IGBT2_n
From cell n – 1
IEC
Figure A.11 – The half-bridge CTL circuit
A.5.4 Terminology for valves of the controllable voltage source type
Figures A.12 and A.13 illustrate the main constructional terms for valves of the MMC an
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