IEC 63373:2022

Dynamic on-resistance test method guidelines for GaN HEMT based power conversion devices

IEC 63373:2022 In general, dynamic ON-resistance testing is a measure of charge trapping phenomena in GaN power transistors. IEC 63373:2022 provides guidelines for testing dynamic ON-resistance of GaN lateral power transistor solutions. The test methods can be applied to the following:
a) GaN enhancement and depletion-mode discrete power devices;
b) GaN integrated power solutions;
c) the above in wafer and package levels.
The prescribed test methods can be used for device characterization, production testing, reliability evaluations and application assessments of GaN power conversion devices. This document is not intended to cover the underlying mechanisms of dynamic ON-resistance and its symbolic representation for product specifications.

Lignes directrices pour les méthodes d’essai de résistance dynamique à l’état passant des dispositifs de conversion de puissance fondés sur les HEMT en GaN

IEC 63373:2022 En règle générale, l’essai de résistance dynamique à l’état passant est une mesure des phénomènes de piégeage de charge dans les transistors de puissance en GaN. L'IEC 63373:2022 donne des lignes directrices pour l’essai de résistance dynamique à l’état passant des solutions de transistors de puissance latéraux en GaN. Les méthodes d’essai peuvent être appliquées aux éléments suivants:
a) dispositifs de puissance discrets en GaN à mode d’enrichissement et de déplétion;
b) solutions de puissance intégrées en GaN;
c) dispositifs et solutions ci-dessus au niveau des plaquettes et des boîtiers.
Les méthodes d’essai spécifiées peuvent être utilisées pour la caractérisation des dispositifs, les essais de production, les évaluations de fiabilité et les évaluations de l’application des dispositifs de conversion de puissance en GaN. Le présent document n’est pas destiné à couvrir les mécanismes sous-jacents de la résistance dynamique à l’état passant et sa représentation symbolique pour les spécifications du produit.

General Information

• Status: Published
• Publication Date: 09-Feb-2022
• ICS: 31.080.99 - Other semiconductor devices
• Technical Committee: TC 47 - Semiconductor devices
• Drafting Committee: WG 5 - TC 47/WG 5
• Current Stage: PPUB - Publication issued
• Start Date: 10-Mar-2022
• Completion Date: 10-Feb-2022

Standards Content (Sample)

IEC 63373 ®
Edition 1.0 2022-02
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
colour
inside
Dynamic on-resistance test method guidelines for GaN HEMT based power
conversion devices
Lignes directrices pour les méthodes d’essai de résistance dynamique à l’état
passant des dispositifs de conversion de puissance fondés sur les HEMT en
GaN
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IEC 63373 ®
Edition 1.0 2022-02
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
colour
inside
Dynamic on-resistance test method guidelines for GaN HEMT based power

conversion devices
Lignes directrices pour les méthodes d’essai de résistance dynamique à l’état

passant des dispositifs de conversion de puissance fondés sur les HEMT en

GaN
INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
COMMISSION
ELECTROTECHNIQUE
INTERNATIONALE
ICS 31.080.99 ISBN 978-2-8322-1076-6

– 2 – IEC 63373:2022 © IEC 2022
CONTENTS
FOREWORD . 3
INTRODUCTION . 5
1 Scope . 6
2 Normative references . 6
3 Terms, definitions, symbols and abbreviated terms . 6
3.1 Terms and definitions . 6
3.2 Symbols and abbreviated terms . 6
4 Test circuits and waveforms . 7
4.1 General . 7
4.2 Inductive and resistive switching methods . 7
4.3 Pulsed current-voltage (I-V) method . 10
5 Requirements . 12
Bibliography . 14

Figure 1 – Inductive-resistive load “double-pulse” test circuit for hard-switching
evaluation . 8
Figure 2 – Depiction of the hard-switching “double-pulse” test circuit (showing its
similarity to a boost converter) . 8
Figure 3 – Simplified flowchart for inductive and/or resistive switching based dynamic
on-resistance test . 9
Figure 4 – Representative continuous-pulse hard-switching waveforms for measuring
dynamic on-resistance using the test circuits in Figure 1 and Figure 2 . 10
Figure 5 – Example test circuit for soft-switching on-resistance measurement (the gate
and drain terminals are pulsed with independent voltage signals) . 10
Figure 6 – Simplified flowchart for soft switching based dynamic on-resistance test . 11
Figure 7 – Illustrative timing diagram for measuring dynamic ON-resistance under
OFF-state stress in soft-switching mode . 12

INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________
DYNAMIC ON-RESISTANCE TEST METHOD GUIDELINES
FOR GaN HEMT BASED POWER CONVERSION DEVICES

FOREWORD
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IEC 63373 has been prepared by IEC technical committee 47: Semiconductor devices. It is an
International Standard.
This standard is based upon JEP173 [1]. It is used with permission of the copyright holder,
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The text of this International Standard is based on the following documents:
Draft Report on voting
47/2690/CDV 47/2735/RVC
Full information on the voting for its approval can be found in the report on voting indicated in
the above table.
The language used for the development of this International Standard is English.
___________
Numbers in square brackets refer to the Bibliography.

– 4 – IEC 63373:2022 © IEC 2022
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INTRODUCTION
This document is intended for use in the GaN power semiconductor and related power electronic
industries, and provides guidelines for measuring the dynamic ON-resistance of GaN power
devices.
Gallium Nitride (GaN) lateral power High Electron Mobility Transistor (HEMT) conducts through
a two-dimensional electron gas (2DEG) in ON-state operation. Due to the various stress
conditions that the device encounters during power electronic switching applications, some
charge could get trapped in specific regions of
...