IEC 62116:2008

Test procedure of islanding prevention measures for utility-interconnected photovoltaic inverters

IEC 62116:2008 describes a guideline for testing the performance of automatic islanding prevention measures installed in or with single or multi-phase utility interactive PV inverters connected to the utility grid. The test procedure and criteria described are minimum requirements that will allow repeatability. Additional requirements or more stringent criteria may be specified if demonstrable risk can be shown. Inverters and other devices meeting the requirements of this standard are considered non-islanding as defined in IEC 61727.

Procédure d'essai des mesures de prévention contre l'îlotage pour onduleurs photovoltaïques interconnectés au réseau public

La CEI 62116:2008 décrit des lignes directrices pour les essais de performance des mesures de prévention contre l'îlotage automatique installées dans ou avec des onduleurs PV interactifs avec le réseau public monophasés ou multiphasés, connectés au réseau public d'électricité. La procédure et les critères d'essai décrits sont les exigences minimales qui permettent la répétabilité. Des exigences supplémentaires ou des critères plus sévères peuvent être spécifiés si l'on peut démontrer l'existence de risque. Les onduleurs et autres dispositifs satisfaisant aux exigences de cette norme sont considérés comme étant sans îlotage, comme cela est défini dans la CEI 61727.

General Information

• Status: Published
• Publication Date: 23-Sep-2008
• ICS: 27.160 - Solar energy engineering
• Technical Committee: TC 82 - Solar photovoltaic energy systems
• Drafting Committee: WG 6 - TC 82/WG 6
• Current Stage: DELPUB - Deleted Publication
• Start Date: 26-Feb-2014
• Completion Date: 26-Oct-2025

Relations

• Revised: IEC 62116:2014 - Utility-interconnected photovoltaic inverters - Test procedure of islanding prevention measures
• Effective Date: 05-Sep-2023

Overview

IEC 62116:2008 is an international standard developed by the International Electrotechnical Commission (IEC) that provides a test procedure for islanding prevention measures specifically for utility-interconnected photovoltaic (PV) inverters. The standard sets out minimum requirements for testing the performance of automatic anti-islanding functions integrated into single or multi-phase PV inverters connected to the utility grid. It is a crucial guideline ensuring that PV inverters can effectively detect and prevent islanding conditions-where a portion of the grid continues to be energized by distributed generation despite losing connection to the main utility supply-thus enhancing grid safety and reliability.

This standard aligns with the broader goal of safe and efficient integration of photovoltaic systems with the public electric network, facilitating compliance and interoperability among manufacturers and utilities.

Key Topics

• Islanding and Anti-Islanding: IEC 62116 defines islanding as the condition where a segment of the utility grid, containing both load and generation, operates electrically isolated from the main grid. The standard emphasizes preventing unintentional islands to protect personnel and equipment.

• Test Procedures: The document specifies repeatable test circuits and conditions for evaluating automatic islanding prevention measures, including:

  • Setup of the PV array simulator, AC sources, and loads to mimic realistic grid conditions.
  • Parameters and measurement techniques to assess inverter response during islanding events.
  • Pass/fail criteria to determine effectiveness of anti-islanding features.

• Scope and Applicability: Though oriented towards PV inverters, IEC 62116 can be adapted for testing islanding protections in other inverter-based distributed generation devices (e.g., microturbines, fuel cells) with appropriate technical modifications.

• Relation to Other Standards: Inverters compliant with IEC 62116 are considered “non-islanding” devices as defined by IEC 61727, which details utility interface characteristics for PV systems.

• Terminology and Definitions: Key concepts such as PV array simulator, Equipment Under Test (EUT), Maximum Power Point Tracking (MPPT), and quality factor (Q) of test loads are clearly defined.

Applications

• Photovoltaic Inverter Certification: Manufacturers can use the IEC 62116 test procedure to demonstrate that their inverters meet global anti-islanding safety requirements, facilitating product certification and market access.

• Utility Grid Safety: Grid operators rely on inverters tested against IEC 62116 to minimize hazards caused by islanding, such as equipment damage, synchronization issues, and electric shock risks to lineworkers.

• System Design and Testing: Engineers designing utility-interconnected PV systems can apply the standard’s guidelines to select and verify inverter performance, ensuring compliance with national and international grid codes.

• Extension to Other Distributed Energy Resources (DERs): The test procedure may also be adapted for DER devices with inverter interfaces, supporting the evolving integration of renewable and distributed generation technologies into grids worldwide.

Related Standards

• IEC 61727: Photovoltaic (PV) systems – Characteristics of the utility interface
  Defines non-islanding performance and interface requirements for PV systems connected to utility grids; IEC 62116 test compliance supports meeting this standard.

• IEC 61836: Solar photovoltaic energy systems – Terms, definitions and symbols
  Provides standardized vocabulary for solar PV technology, supplementing IEC 62116’s terminology.

• National and Regional Grid Codes
  Many jurisdictions incorporate IEC 62116 test procedures or equivalent requirements to regulate interconnection and safety of distributed PV systems.

Summary

IEC 62116:2008 establishes a rigorous, internationally recognized test procedure critical for ensuring that utility-interconnected photovoltaic inverters include effective islanding prevention measures. Incorporating this standard enhances grid safety by reliably identifying and shutting down generation during unintended islanding events, thereby protecting utility infrastructure, customer equipment, and personnel. Compliance with IEC 62116 is essential for stakeholders aiming to deploy safe, reliable, and grid-compatible photovoltaic solutions across global markets.

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Keywords: IEC 62116, islanding prevention, photovoltaic inverters, PV systems, utility-interconnected, anti-islanding test, grid safety, inverter certification, distributed generation, IEC standards, PV array simulator, non-islanding inverter, PV inverter testing.

Standards Content (Sample)

IEC 62116
Edition 1.0 2008-09
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
Test procedure of islanding prevention measures for utility-interconnected
photovoltaic inverters
Procédure d’essai des mesures de prévention contre l’îlotage pour onduleurs
photovoltaïques interconnectés au réseau public

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IEC 62116
Edition 1.0 2008-09
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
Test procedure of islanding prevention measures for utility-interconnected
photovoltaic inverters
Procédure d’essai des mesures de prévention contre l’îlotage pour onduleurs
photovoltaïques interconnectés au réseau public

INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
COMMISSION
ELECTROTECHNIQUE
PRICE CODE
INTERNATIONALE
T
CODE PRIX
ICS 27.160 ISBN 978-2-88910-623-3
– 2 – 62116 © IEC:2008
CONTENTS
FOREWORD.3
INTRODUCTION.5
1 Scope and object.6
2 Normative references .6
3 Terms and definitions .6
4 Testing circuit.8
5 Testing equipment .9
5.1 Measuring instruments .9
5.2 DC power source.9
5.2.1 PV array simulator.9
5.2.2 Current and voltage limited DC power supply with series resistance .10
5.2.3 PV array .10
5.3 AC power source.11
5.4 AC loads .11
6 Test for single or multi-phase inverter.11
6.1 Test procedure .11
6.2 Pass/fail criteria .14
7 Documentation .14
Annex A (informative) Islanding as it applies to PV systems .18
Annex B (informative) Test for independent islanding detection device (relay) .20
Annex C (informative) Gate blocking signal.22

Figure 1 – Test circuit for islanding detection function in a power conditioner (inverter) .9
Figure B.1 – Test circuit for independent islanding detection device (relay) .20

Table 1 – Parameters to be measured in real time .8
Table 2 – Specification of array simulator (test conditions).10
Table 3 – PV array test conditions .10
Table 4 – AC power source requirements .11
Table 5 – Test conditions.12
Table 6 – Load imbalance (real, reactive load) for test condition A (EUT output = 100 %).14
Table 7 – Load imbalance (reactive load) for test condition B (EUT output = 50 % –
66 %) and test condition C (EUT output = 25 % – 33 %) .14
Table 8 – Specification of the EUT provided by manufacturer (example) .15
Table 9 – List of tested condition and run on time (example).16
Table 10 – Specification of testing equipment (example).17

62116 © IEC:2008 – 3 –
INTERNATIONAL ELECTROTECHNICAL COMMISSION
_____________
TEST PROCEDURE OF ISLANDING PREVENTION MEASURES
FOR UTILITY-INTERCONNECTED PHOTOVOLTAIC INVERTERS

FOREWORD
1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising
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8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is
indispensable for the correct application of this publication.
9) Attention is drawn to the possibility that some of the elements of this IEC Publication may be the subject of
patent rights. IEC shall not be held responsible for identifying any or all such patent rights.
International Standard IEC 62116 has been prepared by IEC technical committee 82: Solar
photovoltaic energy systems.
The text of this standard is based on the following documents:
FDIS Report on voting
82/531/FDIS 82/542/RVD
Full information on the voting for approval can be found in the report on voting indicated in the
above table.
– 4 – 62116 © IEC:2008
The committee has decided that the contents of this publication will remain unchanged until
the maintenance result date indicated on the IEC web site under "http://webstore.iec.ch" in
the data related to the specific publication. At this date, the publication will be
• reconfirmed,
• withdrawn,
• replaced by a revised edition, or
• amended.
62116 © IEC:2008 – 5 –
INTRODUCTION
Islanding is a condition in which a portion of an electric power grid, containing both load and
generation, is isolated from the remainder of the electric power grid. This situation is one with
which electric power providers (utilities) must regularly contend. When an island is created
purposely by the controlling utility—to isolate large sections of the utility grid, for example—it
is called an intentional island. Conversely, an unintentional island can be created when a
segment of the utility grid containing only customer-owned generation and load is isolated
from the utility control.
Normally, the customer-owned generation is required to sense the absence of utility-
controlled generation and cease energizing the grid. However, when the generation and load
within the segment are well balanced prior to the isolation event, the utility is providing little
power to the grid segment, thus making it difficult to detect when the isolation occurs.
Damage can occur to customer equipment if the generation in the island, no longer under
utility control, operates outside of normal voltage and frequency conditions. Customer and
utility equipment can be damaged if the main grid recloses into the island out of
synchronization. Energized lines within the island present a shock hazard to unsuspecting
utility lineworkers who think the lines are dead.
The PV industry has pioneered the development of islanding detection and prevention
measures. To satisfy the concerns of electric power providers, commercially-available utility-
interconnected PV inverters have implemented a variety of islanding detection and prevention
(also called anti-islanding) techniques. The industry has also developed a test procedure to
demonstrate the efficacy of these anti-islanding techniques; that procedure is the subject of
this document.
This standard provides a consensus test procedure to evaluate the efficacy of islanding
prevention measures used by the power conditioner of utility-interconnected PV systems.
Note that while this document specifically addresses inverters for photovoltaic systems, with
some modifications the setup and procedure may also be used to evaluate inverters used with
other generation sources or to evaluate separate anti-islanding devices intended for use in
conjunction with PV inverters or other generation sources acting as or supplementing the anti-
islanding feature of those sources.
Inverters and other devices meeting the requirements of this document can be considered
non-islanding, meaning that under reasonable conditions, the device will detect island
conditions and cease to energize the public electric power grid.

– 6 – 62116 © IEC:2008
TEST PROCEDURE OF ISLANDING PREVENTION MEASURES
FOR UTILITY-INTERCONNECTED PHOTOVOLTAIC INVERTERS

1 Scope and object
The purpose of this International Standard is to provide a test procedure to evaluate the
performance of islanding prevention measures used with utility-interconnected PV systems.
This standard describes a guideline for testing the performance of automatic islanding
prevention measures installed in or with single or multi-phase utility interactive PV inverters
connected to the utility grid. The test procedure and criteria described are minimum
requirements that will allow repeatability. Additional requirements or more stringent criteria
may be specified if demonstrable risk can be shown. Inverters and other devices meeting the
requirements of this standard are considered non-islanding as defined in IEC 61727.
This standard may be applied to other types of utility-interconnected systems (e.g. inverter-
based microturbine and fuel cells, induction and synchronous machines). However, technical
review may be necessary for other than inverter-based PV systems.
2 Normative references
The following referenced documents are indispensable for the application of this document.
For dated references, only the edition cited applies. For undated references, the latest edition
of the referenced document (including any amendments) applies.
IEC 61727, Photovoltaic (PV) systems – Characteristics of the utility interface
IEC 61836, Solar photovoltaic energy systems – Terms, definitions and symbols
3 Terms and definitions
For the purposes of this document, the terms and definitions of IEC 61836 apply as well as
the following.
3.1
PV array simulator
DC power source used to simulate PV array output
3.2
EUT (Equipment Under Test)
EUT indicates the inverter or anti-islanding device on which these tests are performed
3.3
MPPT (Maximum Power Point Tracking)
MPPT is a PV array control strategy used to maximize the output of the system under the
prevailing conditions
3.4
non-islanding inverter
an inverter that will cease to energize a utility distribution system that is out of the nominal
operation specifications for voltage and/or frequency (from IEC 61727 Ed. 2.0)

62116 © IEC:2008 – 7 –
3.5
island
a state in which a portion of the electric utility grid, containing load and generation, continues
to operate isolated from the rest of the grid. The generation and loads may be any
combination of customer-owned and utility-owned.
3.6
intentional island
an island that is intentionally created, usually to restore or maintain power to a section of the
utility grid affected by a fault. The generation and loads may be any combination of customer-
owned and utility-owned, but there is an implicit or explicit agreement between the controlling
utility and the operators of customer-owned generation for this situation.
3.7
quality factor, Q
f
a measure of the strength of resonance of the islanding test load.
NOTE In a parallel resonant circuit, such as a load on a power system
C
Q = R
f
L
where
Q is quality factor
f
R is effective load resistance
C is reactive load capacitance (including shunt capacitors)
L is reactive load inductance
With C and L tuned to the power system fundamental frequency, Q for the resonant circuit
f
drawing real power, P, reactive powers Q , for inductive load and Q for capacitive load, Q
L C f
can be determined by
Q =()1 P Q ⋅ Q
f L C
where
P is real power, in W
Q is inductive load, in VAr
L L
Q is capacitive load, in VAr
C C
3.8
run-on time, t
R
the amount of time that an unintentional island condition exists. Run-on time is defined as the
interval between the opening of the switch S1 (Figure 1) and the cessation of EUT output
current.
3.9
stopping signal
a signal provided by the inverter indicating it has ceased energizing its utility grid-connected
output terminals (see Annex C)
3.10
unintentional island
an islanding condition in which the generation within the island that is supposed to cease
energizing the utility grid instead continues to energize the utility grid

– 8 – 62116 © IEC:2008
4 Testing circuit
The testing circuit shown in Figure 1 shall be employed. Similar circuits shall be used for
three-phase output.
Parameters to be measured are shown in Table 1 and Figure 1. Parameters to be recorded in
the test report are discussed in Clause 7.
Table 1 – Parameters to be measured in real time
Parameter Symbol Units
1,2)
EUT DC input
DC voltage V V
DC
DC current I A
DC
P
DC power W
DC
3) 2
Irradiance G W/m
EUT AC output
2, 4, 5)
AC voltage V V
EUT
2, 4, 5)
AC current I A
EUT
2)
Real power P
W
EUT
2)
Reactive power Q VAr
EUT
4, 5, 6, 7)
Voltage waveform
4, 5, 6, 7)
Current waveform
4)
EUT (relay) output control signal
Run-on time t s
R
8)
Stopping signal SS --
2)
Test load
Resistive load current I A
R
Inductive load current I A
L
Capacitive load current I A
C
2)
AC (utility) power source
9)
Utility real power P W
AC
9)
Utility reactive power Q VAr
AC
9)
Utility current I A
AC
1)
If applicable.
2)
Record values measured before switch S1 is opened.
3)
Recorded when the test is carried out using a PV array. Pyranometer should be fast response silicon-
type not thermopile-type.
4)
The response time of voltage and current transducer shall be suitable for the sampling rate used.

5)
The waveform, AC voltage and current, shall be measured on all phases.
6)
The waveform data shall be recorded from the beginning of the islanding test until the EUT ceases
output. The measurement of time shall have an accuracy and resolution of better than 1 ms.
7)
When the waveform is recorded, the synchronizing signal of the S1 opening and stopping signal may be
simultaneously recorded.
8)
If available from the EUT.
9)
Signal shall be filtered as necessary to provide fundamental (50 Hz or 60 Hz) frequency value.
Fundamental values will ignore incidental harmonics, caused by utility voltage distortion, absorbed by
the load and EUT filtering capacitors.

Trigger
62116 © IEC:2008 – 9 –
Waveform
monitor
V I V I I
DC power EUT AC power
DC DC EUT AC
EUT
source
source
(inverter)
(PV)
(utility)
S1
P Q
P EUT EUT
DC P Q
AC AC
S2
I I I
R L C
AC loads
IEC  1567/08
Figure 1 – Test circuit for islanding detection function in a power conditioner (inverter)
5 Testing equipment
5.1 Measuring instruments
Waveform observation shall be measured by a device with memory function, for example, a
storage or digital oscilloscope or high speed data acquisition system. The waveform
measurement/capture device shall be able to record the waveform from the beginning of the
islanding test until the EUT ceases to energize the island. For multi-phase EUT, all phases
shall be monitored. A waveform monitor designed to detect and calculate the run-on time may
be used.
For multi-phase EUT, the test and measurement equipment shall record each phase current
and each phase-to-neutral or phase-to-phase voltage, as appropriate, to determine
fundamental frequency real and reactive power flow over the duration of the test. A sampling
rate of 10 kHz or higher is recommended. The minimum measurement accuracy shall be 1 %
or less of rated EUT nominal output voltage and 1 % or less of rated EUT output current.
Current, real power, and reactive power measurements through switch S1 used to determine
the circuit balance conditions shall report the fundamental (50 Hz or 60 Hz) component.
5.2 DC power source
A PV array or PV array simulator (preferred) may be used. If the EUT can operate in utility-
interconnected mode from a storage battery, a DC power source may be used in lieu of a
battery as long as the DC power source is not the limiting device as far as the maximum EUT
input current is concerned.
The DC power source shall provide voltage and current necessary to meet the testing
requirements described in Clause 6.
5.2.1 PV array simulator
A unit intended to be energized directly from a photovoltaic source shall be energized from a
supply that simulates the current-voltage characteristics and time response of a photovoltaic
array. The tests shall be conducted at the input voltage defined in Table 2 below, and the
current shall be limited to 1,5 times the rated photovoltaic input current, except when
specified otherwise by the test requirements.

– 10 – 62116 © IEC:2008
A PV array simulator is recommended, however, any type of power source may be used if it
does not influence the test results.
Table 2 – Specification of array simulator (test conditions)
1)
Items Conditions
Sufficient to provide maximum EUT output power and other levels specified by test conditions
Output power
of Table 5.
The response time of a simulator to a step in output voltage, due to a 5 % load change, should
2)
Response speed
result in a settling of the output current to within 10 % of its final value in less than 1 ms.
Excluding the variations caused by the EUT MPPT, simulator output power should remain
stable within 2 % of specified power level over the duration of the test: from the point where
Stability
load balance is achieved until the island condition is cleared or the allowable run-on time is
exceeded.
3)
Fill factor 0,25 to 0,8
1)
For the purpose of this standard, it is assumed that there is no influence of cell technology on islanding detection.
2)
Response speed is indicated to avoid influence caused by MPPT control system, ripple frequency on DC side of a EUT,
or active methods of anti islanding.
3)
Fill factor = (V × I )/(V × I ), where V and I are the maximum power point voltage and current, respectively,
mp mp oc sc mp mp
V is the open circuit voltage, and I is the short circuit current. It should be maintained at one value for all test
oc sc
conditions.
5.2.2 Current and voltage limited DC power supply with series resistance
A DC power source used as the EUT input source shall be capable of EUT maximum input
power (so as to achieve EUT maximum output power) at minimum and maximum EUT input
operating voltage.
The power source should provide adjustable current and voltage limit, set to provide the
desired short circuit current and open circuit voltage when combined with the series and shunt
resistance described below.
A series resistance (and, optionally, a shunt resistance) should be selected to provide a fill
factor within the range shown in Table 2.
5.2.3 PV array
A PV array used as the EUT input source shall be capable of EUT maximum input power at
minimum and maximum EUT input operating voltage. Testing is limited to times when the
irradiance varies by no more than 2 % over the duration of the test as measured by a silicon-
type pyranometer or reference device. It may be necessary to adjust the array configuration to
achieve the input voltage and power levels prescribed in 6.1.
Table 3 – PV array test conditions
Items Conditions
Sufficient to provide maximum EUT output power and
Output power
other levels specified by test conditions of Table 5.
Climate condition Irradiance, ambient temperature, etc.
To achieve a balanced load condition, the output of the PV array shall be stable. Thus, it is important to perform the
test only during times of stable irradiance (e.g., clear sky, near solar noon).

62116 © IEC:2008 – 11 –
5.3 AC power source
The utility grid or other AC power source may be used as long as it meets the conditions
specified in Table 4.
Table 4 – AC power source requirements
Items Conditions
Voltage Nominal ±2,0 %
Voltage THD < 2,5 %
Frequency Nominal ±0,1 Hz
1)
Phase angle distance 120 º ± 1,5 º

1)
Three-phase case only
5.4 AC loads
On the AC side of the EUT, variable resistance, capacitance, and inductance shall be
connected in parallel as loads between the EUT and the AC power source. Other sources of
load, such as electronic loads, may be used if it can be shown that the source does not cause
results that are different than would be obtained with passive resistors, inductors, and
capacitors.
All AC loads shall be rated for and adjustable to all test conditions. The equations for Q are

f
based upon an ideal parallel RLC circuit. For this reason, non-inductive resistors, low loss
(high Q ) inductors, and capacitors with low effective series resistance and effective series
f
inductance shall be utilized in the test circuit. Iron core inductors, if used, shall not exceed a
current THD of 2 % when operated at nominal voltage. Load components should be
conservatively rated for the voltage and power levels expected. Resistor power ratings should
be chosen so as to minimize thermally-induced drift in resistance values during the course of
the test.
Real and reactive power should be calculated (using the measurements provided in Table 1)
in each of the R, L and C legs of the load so that these parasitic parameters (and parasitics
introduced by variacs or autotransformers) are properly accounted for when calculating Q .
f
6 Test for single or multi-phase inverter
6.1 Test procedure
The following test is designed for EUT consisting of a single or multi-phase inverter . The test
uses an RLC load, resonant at the EUT nominal frequency (50 Hz or 60 Hz) and matched to
the EUT output power. For multi-phase EUT, the load shall be balanced across all phases and
the switch S1 as in Figure 1 shall open all phases . This test shall be performed with the EUT
conditions as in Table 5, where power and voltage values are given as a percent of EUT full
output rating.
EUT settings for voltage and frequency trip parameters (magnitude and timing) can affect the
measured run-on time. Passing this test verifies that the unit will provide adequate islanding
protection for the settings tested as well as for tighter settings (e.g., an EUT that passes the
—————————
Annex B describes the test for independent islanding detection device (relay).
A loss of one or two phases in three-phase system is not considered an islanding phenomenon.

– 12 – 62116 © IEC:2008
test with frequency trip settings of ± 1,5 Hz of nominal should also trip within the maximum
measured run-on time for settings of, say, ± 0,5 Hz.) Conversely, when adjusted to settings
outside of those tested, the EUT may experience extended run-on times. Frequency settings
of ±1,5 Hz around nominal frequency and voltage settings of ±15 % around nominal voltage,
for the purposes of this test procedure, should be wide enough to address the majority of
utility requirements. Note that as trip settings are widened, more aggressive active anti-
islanding schemes may be required that could negatively impact power quality.
Table 5 – Test conditions
EUT output power,
3) 4)
Condition EUT input voltage EUT trip settings
P
EUT
Manufacturer specified voltage and
1)
A Maximum >90 % of rated input voltage range
frequency trip settings
50 % of rated input voltage range,
50 % – 66 % of Set voltage and frequency trip settings
B
maximum ±10 % to nominal values
2)
25 % – 33 % of Set voltage and frequency trip settings
C <10 % of rated input voltage range
maximum to nominal values
1)
Maximum EUT output power condition should be achieved using the maximum allowable input power. Actual output
power may exceed nominal rated output.
2)
Or minimum allowable EUT output level if greater than 33 %.
3)
Based on EUT rated input operating range. For example, If range is between X volts and Y volts, 90 % of range
=X + 0,9 × (Y – X). Y shall not exceed 0,8 × EUT maximum system voltage (i.e., maximum allowable array open
circuit voltage). In any case, the EUT should not be operated outside of its allowable input voltage range.
4)
The manufacturer shall specify voltage and frequency trip magnitude and trip time settings with which the unit shall
be tested. The recommended settings shown below should address the majority of utility requirements.

Parameter Magnitude Timing
s
Over voltage 115 % of nominal voltage 2
Under voltage 85 % of nominal voltage 2
Over frequency 1,5 Hz above nominal frequency 1
Under frequency 1,5 Hz below nominal frequency 1

If fast over and under voltage and frequency settings are provided, similarly extended values should also be specified
by the manufacturer.
a) Determine EUT test output power, P , to be used from Table 5. Test conditions A, B,
EUT
and C may be performed in any order convenient to testing.
b) By adjusting the DC input source, operate the EUT at the selected P and measure EUT
EUT
reactive power output, Q , as follows. The utility disconnect switch S1 should be closed.
EUT
With no local load connected (that is, S2 is open so that the RLC load is not connected at
this time), and the EUT connected to the utility (S1 is closed), turn the EUT on and
operate it at the output determined in step a). Measure the fundamental frequency (50 Hz
or 60 Hz) real and reactive power flow, P and Q . The real power should equal P .
AC AC AC
The reactive power, Q measured in this step is designated Q in the following steps.
AC EUT
NOTE EUT output for condition A is achieved by providing sufficient (excess) input power to allow unit to
produce its maximum output without causing it to shutdown. Condition B is achieved by adjusting the DC input
power source, if the EUT provides this mode of operation. Condition C is achieved using inverter control to
limit the output power, if the EUT provides this mode of operation.
c) Turn off the EUT and open S1.
NOTE When the load component levels are adjusted using real-time measurement of resistive, inductive, and
capacitive power levels, it may be necessary to leave S1 closed.

62116 © IEC:2008 – 13 –
d) Adjust the RLC circuit to have Q = 1,0 ± 0,05 using the following steps:

f
1) Determine the amount of inductive reactance required in the resonant RLC circuit
using the relation Q = Q × P = 1,0 × P .
L f EUT EUT
2) Connect an inductor as the first element of the RLC circuit. Adjust the inductance to
Q .
L
3) Connect a capacitor in parallel with the inductor. Adjust the capacitive reactance so
that Q + Q = – Q .
C L EUT
4) Connect a resistor that results in the power consumed by the RLC circuit equaling
P .
EUT
NOTE Real and reactive power are calculated (using the measurements provided in Table 1) for each of the
R, L and C legs of the load so that these parasitic parameters (and parasitics introduced by variacs or
autotransformers) are properly accounted for when calculating Q .
f
e) Connect the RLC load configured in step d) to the EUT by closing S2. Close S1 and turn
the EUT on, making certain that the power output is as determined in step a). Adjust R, L,
and C as necessary to ensure that the fundamental (50 Hz or 60 Hz) component of current
I through S1 is 0,0 A with tolerance of ±1 % of the rated current of the EUT on a steady
AC
state basis in each phase.
NOTE The purpose of the procedure up to this point is to zero out the fundamental frequency components
(50 Hz or 60 Hz) of real and reactive power, or to zero out the fundamental frequency component of current
flow, at the utility disconnect switch. System resonance will typically generate harmonic currents in the test
circuit. These harmonic currents will typically make it impossible to zero out an r.m.s. measurement of power
or current flow at the disconnect switch. Because of test equipment measurement error and some impact from
harmonic currents, it may be necessary to make small adjustments in the test circuit to achieve worst case
islanding behavior. Step h) is performed to make these small adjustments.
f) Open the utility-disconnect switch S1 to initiate the test. Run-on time, t , shall be recorded
R
as the time between the opening of switch S1 and the point at which the EUT output
current drops and remains below 1 % of its rated output levels. Annex C gives some
information related to the use of gate blocking signal.
g) For test condition A in Table 5 (100 %), adjust the real load and only one of the reactive
load components (either capacitance, C, or inductance, L, may be chosen) to each of the
load imbalance conditions shown in the shaded portion of Table 6. The values in Table 6
represent changes from the nominal values determined in steps d) and e) as a percentage
of those nominal values. The values in Table 6 show the real and reactive power flow at
S1 in Figure 1, with positive value denoting power flow from EUT to AC power source.
After each adjustment, an island test is run and run-on time is recorded. If any of the
recorded run-on times are longer than the one recorded for the rated balance condition,
i.e. test f), then the non-shaded parameter combinations also require testing. If no run-on
Time exceeds the one of balance condition, then this part of test sequence is deemed to
be completed.
h) For test conditions B and C, adjust the only one reactive load components (either
capacitance, C, or inductance, L, may be chosen) by approximately 1,0 % per test, within
a total range of 95 % to 105 % of the operating point as shown in Table 7. The values in
Table 7 show the reactive power flow at S1 in Figure 1, with positive value denoting power
flow from EUT to AC power source. After each adjustment, an island test is run and run-on
time is recorded. If run-on times are still increasing at the 95 % or 105 % points, additional
1 % increments shall be taken until run-on times begin decreasing. Test C load conditions
may be achieved using inverter control to limit the output power rather than using the
power supply to limit the power.
—————————
The appropriate value for Q was investigated using 723 measurement points in Japan. A value of Q was
f f
calculated as the ratio of the contract demand (kW) at the measurement point to the installed shunt capacitor
(kVAr) needed to make the power factor 1,0 at that point. Based on the variety of load conditions encountered,
Q = 1,0 appears to be suitable test condition.
f
Certain anti-islanding algorithms will sufficiently perturb the fundamental frequency current through S1 such
that the 1 % limit cannot be achieved on a continuous basis. Averaging of the r.m.s. current over a number of
cycles in a manner that captures the quiescent magnitude of this current shall be utilized for the determination
of matched load during this quiescent period.

– 14 – 62116 © IEC:2008
Table 6 – Load imbalance (real, reactive load) for test condition A (EUT output = 100 %)
% change in real load, reactive load from nominal
–10, +10 –5, +10 0, +10 +5, +10 +10, +10
–10, +5 –5, +5 0, +5 +5, +5 +10, +5
–10, 0 –5, 0 +5, 0 +10, 0
–10, –5 –5, –5 0, –5 +5, –5 +10, –5
–10, –10 –5, –10 0, –10 +5, –10 +10, –10
NOTE The numbers in each cell, e.g. +M, +N, are used to represent the % change for real and reactive power.
The first number M represents the real power % and the second number N represents the reactive power %. Actual
load values shall be within ±1 % of those specified.
Table 7 – Load imbalance (reactive load) for test condition B (EUT output = 50 % – 66 %)
and test condition C (EUT output = 25 % – 33 %)
% change in real load, reactive load from
nominal
0, –5
0, –4
0, –3
0, –2
0, –1
0, 1
0, 2
0, 3
0, 4
0, 5
NOTE In Table 7 the numbers in each box, e.g. +M, +N, are used to represent the % change for real and reactive
power. The first number M represents the real power % and the second number N represents the reactive power %.
Actual load values shall be within ±1 % of those specified.
6.2 Pass/fail criteria
An EUT is considered to comply with the requirements for islanding protection when each
case of recorded run-on time is less than 2 s or meets the requirements of local codes.
7 Documentation
At a minimum, the following information shall be recorded and maintained in the test report.
a) Specifications of EUT. Table 8 provides an example of the type of information that should
be provided.
62116 © IEC:2008 – 15 –
b) Measurement results. Table 9 provides an example of the type of information that should
be provided. Actual measured values should be recorded.
c) Block diagram of test circuit.
d) Specifications of the test and measurement equipment. Table 10 provides an example of
the type of information that should be provided.
e) Any test configuration or procedure details such as methods of achieving specified load
and EUT output conditions.
f) Any additional information required by the testing laboratory's accreditation.
g) Specify the evaluation criterion from clause 6.2 that was utilized to determine if the
product passed or failed the test.
Table 8 – Specification of the EUT provided by manufacturer (example)
Parameter Value Remarks
1) Rating
a) Maximum output power
b) DC. voltage range
c) DC. current limits
d) AC voltage range
e) Frequency range
f) AC current limits
g) Efficiency
h) Voltage and frequency trip
settings (magnitude and
timing)
i) Other software settings
j) Firmware version
2) Others
a) Displays
b) Temperature range
c) Humidity
d) Size
e) Weight
– 16 – 62116 © IEC:2008
Table 9 – List of tested condition and run on time (example)
1) 2) 3) 4)
No. P (% Reactive P Q Run on P Actual V Remarks

EUT AC AC EUT DC
of EUT load (% of time Q
f
(% of (% of (W)
rating) Q in
L
nominal) nominal) (ms)
6.1.d)1)
1 100 100 0 0   Test A at BL
2 66 66 0 0   Test B at BL
3 33 33 0 0   Test C at BL
4 100 100 –5 –5   Test A at IB
5 100 100 –5 0   Test A at IB
6 100 100 –5 +5   Test A at IB
7 100 100 0 –5   Test A at IB
8 100 100 0 +5   Test A at IB
9 100 100 +5 –5   Test A at IB
10 100 100 +5 0   Test A at IB
11 100 100 +5 +5   Test A at IB
12 66 66 0 –5   Test B at IB
13 66 66 0 –4   Test B at IB
14 66 66 0 –3   Test B at IB
15 66 66 0 –2   Test B at IB
16 66 66 0 –1   Test B at IB
17 66 66 0 1   Test B at IB
18 66 66 0 2   Test B at IB
19 66 66 0 3   Test B at IB
20 66 66 0 4   Test B at IB
21 66 66 0 5   Test B at IB
22 33 33 0 –5   Test C at IB
23 33 33 0 –4   Test C at IB
24 33 33 0 –3   Test C at IB
25 33 33 0 –2   Test C at IB
26 33 33 0 –1   Test C at IB
27 33 33 0 1   Test C at IB
28 33 33 0 2   Test C at IB
29 33 33 0 3   Test C at IB
30 33 33 0 4   Test C at IB
31 33 33 0 5   Test C at IB
1)
P : EUT output power
EUT
2)
P : Real power flow at S1 in Figure 1. Positive means power from EUT to utility. Nominal is the 0 % test condition
AC
value.
3)
Q : Reactive power flow at S1 in Figure 1. Positive means power from EUT to utility. Nominal is the 0 % test
AC
condition value.
4)
BL: Balance condition, IB: Imbalance condition.

62116 © IEC:2008 – 17 –
Table 10 – Specification of testing equipment (example)
Items Specifications Remarks
1) DC power source (or PV array simulator)
a) Voltage range 0 to 400,0 V (0,1 V step)
b) Current range 0 to 30,0 A (0,1 A step)
2) AC power source
a) Output wiring Single phase, 3 wires
b) Output capacity 16 kVA
c) Output voltage (accuracy) 0 to 576 V (0,2 V )
rms rms
d) Output frequency (accuracy) 5 Hz to 1 100 Hz (0,01 Hz)
±100 ppm/°C (typical)
e) Voltage stability
±100 ppm/8 h (typical)
f) Output voltage distortion 0,05 % max
3) Digital meter
a) Voltage range 15/30/60/150/300/600 V
b) Current range 0,5/1/2/5/10/20 A
c) Frequency range (accuracy) DC, 10 Hz to 50 kHz (0,5 %)
Voltage (V)
Current (A)
Active power (W)
Reactive power (VAr)
d) Measurement items
...