IEC 60748-23-2:2002

Semiconductor devices - Integrated circuits - Part 23-2: Hybrid integrated circuits and film structures - Manufacturing line certification - Internal visual inspection and special tests

Applies to high quality approval systems for hybrid integrated circuits and film structures. The purpose of the tests is to perform visual inspections on the internal materials, construction and workmanship of hybrid, multichip and multichip module microcircuits and passive elements used for microelectronic applications including r.f./microwave. These tests will normally be used on microelectronic devices prior to capping or encapsulation to detect and eliminate devices with internal non-conformances that could lead to device failure in normal application. They may also be employed on a sampling basis to determine the effectiveness of the manufacturers' quality control and handling procedures.

General Information

• Status: Published
• Publication Date: 22-May-2002
• ICS: 01 - GENERALITIES. TERMINOLOGY. STANDARDIZATION. DOCUMENTATION
• ICS: 31.200 - Integrated circuits. Microelectronics
• Technical Committee: SC 47A - Integrated circuits
• Drafting Committee: WG 7 - TC 47/SC 47A/WG 7
• Current Stage: PPUB - Publication issued
• Start Date: 15-Jun-2002
• Completion Date: 23-May-2002

Standards Content (Sample)

INTERNATIONAL IEC
STANDARD
60748-23-2
QC 165000-2
First edition
2002-05
Semiconductor devices –
Integrated circuits –
Part 23-2:
Hybrid integrated circuits and film structures –
Manufacturing line certification –
Internal visual inspection and special tests
Dispositifs à semiconducteurs –
Circuits intégrés –
Partie 23-2:
Circuits intégrés hybrides et structures par films –
Certification de la ligne de fabrication –
Contrôle visuel interne et essais spéciaux
Reference number
Publication numbering
As from 1 January 1997 all IEC publications are issued with a designation in the
60000 series. For example, IEC 34-1 is now referred to as IEC 60034-1.
Consolidated editions
The IEC is now publishing consolidated versions of its publications. For example,
edition numbers 1.0, 1.1 and 1.2 refer, respectively, to the base publication, the
base publication incorporating amendment 1 and the base publication incorporating
amendments 1 and 2.
Further information on IEC publications
The technical content of IEC publications is kept under constant review by the IEC,
thus ensuring that the content reflects current technology. Information relating to
this publication, including its validity, is available in the IEC Catalogue of
publications (see below) in addition to new editions, amendments and corrigenda.
Information on the subjects under consideration and work in progress undertaken
by the technical committee which has prepared this publication, as well as the list
of publications issued, is also available from the following:
• IEC Web Site (www.iec.ch)
• Catalogue of IEC publications
The on-line catalogue on the IEC web site (www.iec.ch/catlg-e.htm) enables
you to search by a variety of criteria including text searches, technical
committees and date of publication. On-line information is also available on
recently issued publications, withdrawn and replaced publications, as well as
corrigenda.
• IEC Just Published
This summary of recently issued publications (www.iec.ch/JP.htm) is also
available by email. Please contact the Customer Service Centre (see below) for
further information.
• Customer Service Centre
If you have any questions regarding this publication or need further assistance,
please contact the Customer Service Centre:
Email: [e-mail]
Tel: [phone]
Fax: [phone]
INTERNATIONAL IEC
STANDARD
60748-23-2
QC165000-2
First edition
2002-05
Semiconductor devices –
Integrated circuits –
Part 23-2:
Hybrid integrated circuits and film structures –
Manufacturing line certification –
Internal visual inspection and special tests
Dispositifs à semiconducteurs –
Circuits intégrés –
Partie 23-2:
Circuits intégrés hybrides et structures par films –
Certification de la ligne de fabrication –
Contrôle visuel interne et essais spéciaux
 IEC 2002  Copyright - all rights reserved
No part of this publication may be reproduced or utilized in any form or by any means, electronic or
mechanical, including photocopying and microfilm, without permission in writing from the publisher.
International Electrotechnical Commission, 3, rue de Varembé, PO Box 131, CH-1211 Geneva 20, Switzerland
Telephone: [phone] Telefax: [phone] E-mail: [e-mail]  Web: www.iec.ch
PRICE CODE
Commission Electrotechnique Internationale
XD
International Electrotechnical Commission
Международная Электротехническая Комиссия
For price, see current catalogue

– 2 – 60748-23-2  IEC:2002(E)
CONTENTS
FOREWORD . 7
INTRODUCTION .9
1 Scope .10
2 Normative references.10
3 Definitions .11
4 Apparatus .18
5 Procedure.18
5.1 General .18
5.2 Sequence of inspection.19
5.3 Inspection control .19
5.4 Re-inspection .19
5.5 Exclusions .19
5.6 Magnification .19
5.7 Format and conventions .19
5.8 Interpretations .20
6 Thin film element inspection .20
6.1 Operating metallization non-conformances – "high magnification".20
6.2 Passivation non-conformances "high magnification".26
6.3 Glassivation non-conformances, "high magnification" .27
6.4 Substrate non-conformances "high magnification" .28
6.5 Foreign material non-conformances "low magnification".30
6.6 Thin film resistor non-conformances, "high magnification".31
6.7 Laser trimmed thin film resistor non-conformances, "high magnification" .36
6.8 Multilevel thin film non-conformances, "high magnification" .45
6.9 Coupling (air) bridge non-conformances "high magnification".45
7 Planar thick film element inspection .47
7.1 Operating metallization non-conformances "low magnification" .47
7.2 Substrate non-conformances, "low magnification".51
7.3 Thick film resistor non-conformances, "low magnification" .54
7.4 Trimmed thick film resistor non-conformances, "low magnification".56
7.5 Multilevel thick film non-conformances, "low magnification" .58
7.6 All thin film capacitors and overlay capacitors used in GaAs microwave
devices, "low magnification".59
8 Active and passive elements.59
9 Element attachment (assembly), "magnification 10× to 60×".59
9.1 Solder connections (general appearance).59
9.2 Element attachment requirements.60
9.3 Leaded and leadless element attachment .64
9.4 Dual-in-line integrated circuit attachment (butt joints) .64
9.5 Axial and radial leaded components (lap joints) .67
9.6 Components with feet (combined butt and lap joints) .68
9.7 Leadless chip carriers.70
10 Element orientation.71
11 Separation .71

60748-23-2  IEC:2002(E) – 3 –
12 Bond inspection, magnification 30× to 60× .72
12.1 Ball bonds .72
12.2 Wire wedge bonds .72
12.3 Tailless bonds (crescent).73
12.4 Compound bond .73
12.5 Beam lead .74
12.6 Mesh bonding .76
12.7 Ribbon bonds .76
12.8 General .77
13 Internal leads (e.g. wires, ribbons, beams, wire loops, ribbon loops, beams, etc.),
"magnification 10× to 60×" .77
14 Screw tabs and through-hole mounting, magnification 3× to 10× .78
15 Connector and feedthrough centre contact soldering, magnification 10× to 30×.78
16 Package conditions, solder assemblies, lead frame attachments, conformal
coating, "magnification 10× to 60×" .81
16.1 Package conditions.81
16.2 Lead frame attachment .81
16.3 Conformal coating .84
17 Non-planar element inspection.84
17.1 General non-planar element non-conformances, "low magnification" .84
17.2 Foreign material non-conformances "low magnification".85
17.3 Ceramic chip capacitor non-conformances "low magnification" .85
17.4 Tantalum chip capacitor non-conformances, "low magnification".88
17.5 Parallel plate chip capacitor non-conformances, "low magnification".88
17.6 Inductor and transformer non-conformances, "low magnification".89
17.7 Chip resistor non-conformances, "low magnification" .90
18 Surface acoustic wave (SAW) element inspection.92
18.1 Operating metallization non-conformances "low magnification" .92
18.2 Substrate material non-conformances "low magnification" .92
18.3 Foreign material non-conformances "low magnification".92
19 Summary .93
20 Radiographic inspection.93
20.1 Requirements .93
21 Particle impact noise detection (PIND) test .95
21.1 General .95
21.2 Equipment .95
21.3 Test procedure .96
21.4 Failure criteria .96
21.5 Lot acceptance .96
21.6 The detail specification .97
Figure 1 – Class H – Metallization scratch criteria .14
Figure 2 – Class H – Metallization scratch criterion .21
Figure 3 – Class H – Metallization width reduction at bonding pad criterion.21
Figure 4 – Class K – Metallization width pad reduction at bonding pad criterion .21
Figure 5 – Class H – Metallization void criterion.22
Figure 6 – Class H – Interdigitated capacitor metallization void criterion .23

– 4 – 60748-23-2  IEC:2002(E)
Figure 7 – Class K – Interdigitated capacitor metallization void criterion.23
Figure 8 – Class H – Operating metallization protrusion criterion .24
Figure 9 – Class H – Interdigitated capacitor metallization protrusion criterion .24
Figure 10 – Class H – Metallization alignment criterion .25
Figure 11 – Class K – Metallization alignment criterion .25
Figure 12 – Class H – Wrap-around connection unmetallized area criterion .26
Figure 13 – Class H – Passivation non-conformance criteria .26
Figure 14 – Class H – Laser trimmed glassivation non-conformance criteria .27
Figure 15 – Class
...