IEC 62490-2:2010

ESL measuring method - Part 2: Surface mount capacitors for use in electronic equipment

IEC 62490-2:2010 provides the ESL measuring method for the surface mount capacitors for use in electronic equipment.

Méthode de mesure de l'ESL - Partie 2: Condensateurs pour montage en surface utilisés dans les équipements électroniques

La CEI 62490-2:2010 fournit la méthode de mesure de l'inductance série équivalente L (ESL) destinée aux condensateurs pour montage en surface utilisés dans les équipements électroniques.

General Information

• Status: Published
• Publication Date: 27-Jul-2010
• ICS: 31.060.01 - Capacitors in general
• Technical Committee: TC 40 - Capacitors and resistors for electronic equipment
• Current Stage: PPUB - Publication issued
• Start Date: 31-Aug-2010
• Completion Date: 28-Jul-2010

Standards Content (Sample)

IEC 62490-2 ®
Edition 1.0 2010-07
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
colour
inside
ESL measuring method –
Part 2: Surface mount capacitors for use in electronic equipment

Méthode de mesure de l’ESL –
Partie 2: Condensateurs pour montage en surface utilisés dans les équipements
électroniques
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IEC 62490-2 ®
Edition 1.0 2010-07
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
colour
inside
ESL measuring method –
Part 2: Surface mount capacitors for use in electronic equipment

Méthode de mesure de l’ESL –
Partie 2: Condensateurs pour montage en surface utilisés dans les équipements
électroniques
INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
COMMISSION
ELECTROTECHNIQUE
PRICE CODE
INTERNATIONALE
N
CODE PRIX
ICS 31.060.01 ISBN 978-2-88912-069-7
– 2 – 62490-2 © IEC:2010
CONTENTS
FOREWORD.3
1 Scope.5
2 Normative references .5
3 Terms and definitions .6
4 Test fixture and compensation chip .6
4.1 Test fixture .6
4.2 The open, short, and load compensation chip.9
4.2.1 The open compensation chip .9
4.2.2 The load compensation chip .9
4.2.3 The short compensation chip .9
5 Measuring method.10
5.1 Measuring equipment .10
5.2 Measurement conditions.10
5.3 Measurement points .10
5.4 Frequency and signal level.10
5.5 Measurement procedure.11
5.5.1 General .11
5.5.2 Open compensation.11
5.5.3 Load compensation .11
5.5.4 Short compensation.12
5.5.5 ESL measurement .13
6 Items to be indicated in the test result report .13
Annex A (informative) Theoretical ESL value of the short compensation chip.14

Figure 1 – Lead frame and thin coating types of surface mount capacitors and the
specification of the dimensions (L, W, and H).5
Figure 2 – Surface mount capacitors with face down terminal .5
Figure 3 – Test fixture and terminals of test fixture .6
Figure 4 – Connection diagram .7
Figure 5 – Sectional view of the test fixture with an inserted surface mount capacitor
pressured to the terminals of the test fixture .8
Figure 6 – Example of surface mount capacitor mounted on terminals of test fixture .8
Figure 7 – Front view of mounting position of objects on test fixture.9
Figure 8 – Measurement points.10
Figure 9 – Open compensation-chip position.11
Figure 10 – Load compensation-chip position .12
Figure 11 – Short compensation-chip position.12
Figure A.1 – Points of contact of the short compensation chip and terminals of test
fixture .15

Table A.1 – The calculation results of inductance of the short compensation chip.14

62490-2 © IEC:2010 – 3 –
INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________
ESL MEASURING METHOD –
Part 2: Surface mount capacitors
for use in electronic equipment

FOREWORD
1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising
all national electrotechnical committees (IEC National Committees). The object of IEC is to promote
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8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is
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9) Attention is drawn to the possibility that some of the elements of this IEC Publication may be the subject of
patent rights. IEC shall not be held responsible for identifying any or all such patent rights.
International Standard IEC 62490-2 has been prepared by IEC technical committee 40:
Capacitors and resistors for electronic equipment.
The text of this standard is based on the following documents:
FDIS Report on voting
40/2045/FDIS 40/2057/RVD
Full information on the voting for the approval of this standard can be found in the report on
voting indicated in the above table.
This publication has been drafted in accordance with the ISO/IEC Directives, Part 2.

– 4 – 62490-2 © IEC:2010
A list of all the parts in the IEC 62490 series, under the general title ESL measuring method,
can be found on the IEC web site.
The committee has decided that the contents of this publication will remain unchanged until
the stability date indicated on the IEC web site under "http://webstore.iec.ch" in the data
related to the specific publication. At this date, the publication will be
• reconfirmed,
• withdrawn,
• replaced by a revised edition, or
• amended.
IMPORTANT – The 'colour inside' logo on the cover page of this publication indicates
that it contains colours which are considered to be useful for the correct
understanding of its contents. Users should therefore print this document using a
colour printer.
62490-2 © IEC:2010 – 5 –
ESL MEASURING METHOD –
Part 2: Surface mount capacitors
for use in electronic equipment

1 Scope
This part of IEC 62490 provides the ESL measuring method for the surface mount capacitors
for use in electronic equipment.

H
H
W
W L
L
IEC  1731/10 IEC  1732/10
Figure 1a – Lead frame electrode terminal Figure 1b – Thin coating electrode terminal
Figure 1 – Lead frame and thin coating types of surface mount capacitors
and the specification of the dimensions (L, W, and H)
The ESL measurement method can be applicable to the surface mount capacitors with the
following properties, but not limited to these:
a) capacitance range: 10 μF to 1 000 μF;
b) size: L × W = 3,2 mm × 1,6 mm to 7,3 mm × 4,3 mm, H = 4,0 mm;
c) ESL range: 5 nH or less.
NOTE The surface mount capacitors in this document are limited to capacitors with lead frame or with thin coated
terminals, see Figure 1. The scope of this document does not include capacitors with face down terminals, see
Figure 2.
IEC  1733/10
Key
1 terminals (shaded section)
Figure 2 – Surface mount capacitors with face down terminal
2 Normative references
The following referenced documents are indispensable for the application of this document.
For dated references, only the edition cited applies. For undated references, the latest edition
of the referenced document (including any amendments) applies.
IEC 60384-1:2008, Fixed capacitors for use in electronic equipment – Part 1: Generic
specification
– 6 – 62490-2 © IEC:2010
3 Terms and definitions
For the purpose of this document, the terms and definitions given in IEC 60384-1 and the
following apply.
3.1
equivalent series inductance L
ESL
inductive part of the impedance of capacitors
NOTE The unit of ESL is Henry (H).
4 Test fixture and compensation chip
4.1 Test fixture
(Low ESL measuring equipment)
Lc Lp Hp Hc
Hc
Lc
0,5 ± 0,1
Zoom
Lp Hp
Capacitor to
1,0 ± 0,1
be measured
Terminal of
test fixture
IEC  1734/10
Dimensions in millimetres
Figure 3a – Top view of test fixture Figure 3b – Enlarge view of the terminals
of test fixture
Figure 3 – Test fixture and terminals of test fixture
The test fixture shall have the following features.
a) The test fixture has a 4-terminal structure. The capacitors can be mounted on the test
fixture as shown in Figure 3. The terminals of the test fixture shall be connected to the low
current terminal (Lc), the low voltage terminal (Lp), the high current terminal (Hc), and the
high voltage terminal (Hp).
62490-2 © IEC:2010 – 7 –
Hc
Hc
Hp
Hp
Lp
Lc Lp
Lc
7*
IEC  1735/10
Key
5 coaxial cables (dotted section)
1 one of fixture terminals (shaded section)
6 ESL measuring equipment (thick line)
2 capacitor (dashed line)
7 connect shielding wire (dotted line)
3 capacitor terminal (dotted section)
4 fixture (within dashed-dotted line)
* Connect sheaths of 4 coaxial cables to each other
within very short distance of fixture terminals

Figure 4 – Connection diagram
b) Anchoring the capacitor with pressure terminals which make stable contact provides high
repeatability and reproducibility (see Figure 5).

– 8 – 62490-2 © IEC:2010
3 3
4 4
* ** *
5 5
Pressure
Pressure
IEC  1736/10
Key
1 lid of test fixture for fixing capacitor (thick line) 4 terminals of test fixture (shaded section)
2 capacitor (dashed line) 5 guides for capacitor (shaded section)
3 capacitor terminal (dotted section)
* 0,5 mm ± 0,1 mm
** See Figure 3.
Figure 5 – Sectional view of the test fixture with an inserted surface mount capacitor
pressured to the terminals of the test fixture
c) Figure 6 is an example of surface mount capacitor mounted on terminals of test fixture.

2 3 3
Lc
Hc
3 3
Lp
Hp
See Figure 3
IEC  1737/10
Key for Figure 6b
Key for Figure 6a
1 fixture terminal (shaded section)
1 one of fixture terminals (shaded section)
2 capacitor (dashed line)
2 capacitor (dashed line)
3 capacitor terminal (dotted section)
3 capacitor terminal (dotted section)
4 low side terminals (shaded section)
5 high side terminals (shaded section)

Figure 6b – Front view of the fixture terminals
Figure 6a – Top view of the fixture terminals
Figure 6 – Example of surface mount capacitor mounted on terminals of test fixture
d) The test fixture-terminals should be plain and be sloped to ensure the contact with the
measuring point of short compensation chip (Figure 7a) and a capacitor to be measured
(Figure 7b). However, the gap in the measuring points between short compensation chip
and capacitor to be measured shall be 0,2 mm or less as shown in Figure 7.

62490-2 © IEC:2010 – 9 –
3 3 3
1 1 1
0,2 mm or less
IEC  1739/10
IEC  1738/10
Key for Figure 7a Key for Figure 7b
1 fixture terminals (shaded section) 1 fixture terminals (shaded section)
2 short compensation jig (dotted line) 2 capacitor (dashed line)
3 position of contact points (dashed-dotted line) 3 capacitor terminals (dotted section)
4 position of contact points (dashed-dotted line)
Figure 7a – Short compensation chip Figure 7b – Measured capacitor
Figure 7 – Front view of mounting position of objects on test fixture
4.2 The open, short, and load compensation chip
4.2.1 The open compensation chip
The shape and size of electrode terminals of the open compensation chip shall be the same
as that of the capacitors to be measured. The open compensation chip shall connect each
terminal as follows:
a) connect between "High voltage terminal (Hp)" and "High current terminal (Hc)";
b) connect between "Low voltage terminal (Lp)" and "Low current terminal (Lc)";
c) insulate terminals of “High side” and “Low side” from each other.
4.2.2 The load compensation chip
The standard load-compensation chip shall be a thick film resistor whose resistance is 49,9 Ω
(tolerance 1 %), and whose size is 3,2 mm (L) × 1,6 mm (W) with terminals exposed to the
right-and-left side and the bottom part. The load compensation chip shall connect each
terminal as follows:
a) connect between "High voltage terminal (Hp)" and "High current terminal (Hc)";
b) connect between "Low voltage terminal (Lp)" and "Low current terminal (Lc)".
4.2.3 The short compensation chip
The short compensation chip shall be a rectangular solid conductor which shall have a feature
to make all four terminals of test fixture be short-circuited between each other.
Its base metal is made of copper, and plated with gold whose thickness is 1 μm to 2 μm.
To maintain measurement accuracy, the inductance value of the short compensation chip
shall be 1/5 or less of that of the capacitors to be measured. The size shall be 2,0 mm ± 0,05
mm (L) × 3,0 mm ± 0,05 mm (W) × 0,5 mm ± 0,05 mm (H).

– 10 – 62490-2 © IEC:2010
5 Measuring method
5.1 Measuring equipment
The impedance analyser (balance bridge method) with the following specification or
equivalent shall be used:
a) inductance value (ESL) can be measured at a frequency of 40 MHz or higher;
b) basic impedance accuracy shall be ±0,08 % or better;
c) impedance value of 3 mΩ or less can be measured.
5.2 Measurement conditions
Measurements shall be made under the standard atmospheric conditions for testing, as
specified in IEC 60384-1:2008, 4.2.1. In addition, if there is any doubt as to the validity of
measurements, the recovery conditions, as specified in IEC 60384-1:2008, 4.2.2, shall be
implemented.
5.3 Measurement points
ESL is measured along the points or lines which contact with the bearing points at the bottom
of the terminal electrode of the capacitor as shown in Figure 8.
Front view
3 3
Front view 3
3 3
Bottom view
Bottom view
IEC  1741/10
IEC  1740/10
Key for figure 8a Key for Figure 8b
1 capacitor (dotted line) 1 capacitor (dotted line)
2 capacitor terminal (dotted section) 2 capacitor terminal (dotted section)
3 measurement points (line of contacting points
3 measurement points (line of contacting points
between fixture terminals and capacitor terminals)
between fixture terminals and capacitor
terminals)
Figure 8a – Lead frame electrode terminal Figure 8b –Thin coating electrode terminal
Figure 8 – Measurement points
5.4 Frequency and signal level
Unless otherwise specified in the product specification, the frequency and signal shall be as
follows:
a) the measurement frequency shall be 40 MHz;
b) the signal level of an oscillation of a measuring equipment shall be 0,5 V to 1,0 V in r.m.s.

62490-2 © IEC:2010 – 11 –
5.5 Measurement procedure
5.5.1 General
The measurement should be performed in sequence of open compensation, load
compensation, short compensation, and then the ESL measurement of the capacitor. Before
beginning the procedure, the number of times to average and integration time shall be set so
that measurement accuracy in less than 2 %. The compensation chips shall be mounted on
terminals of the test fixture horizontally and symmetrically.
NOTE Use a magnifying glass when verifying the mounted state of the compensation chips.
5.5.2 Open compensation
The open compensation chips specified in 4.2.1 shall be mounted on the test fixture as shown
in Figure 9. Then open compensation shall be performed according to the instructions for the
measuring equipment.
1 2
1 1
Lc
Hc
3 3
Lp
Hp
IEC  1742/10
Key for figure 9a Key for Figure 9b
1 One of the fixture terminals (shaded section) 1 fixture terminals (shaded section)
2 open compensation chip (dashed line) 2 open compensation chip (dashed line)
3 capacitor terminal (dotted section) 3 chip terminal (dotted section)
4 low side terminals (shaded section)
5 high side terminals (shaded section)
Figure 9a – Top view Figure 9b – Front view
Figure 9 – Open compensation-chip position
5.5.3 Load compensation
The load compensation chip specified in 4.2.2 shall be mounted on the test fixture as shown
in Figure 10. At this time, input the resistance of the load compensation chip into a measuring
equipment as 49,9 Ω. Then the load compensation shall be performed according to the
instructions for the measuring equipment.

– 12 – 62490-2 © IEC:2010
2 3 3
Hc
Lc
Lp 4
Hp
IEC  1743/10
Key for Figure 10a Key for Figure 10b
1 fixture terminal (shaded section) 1 fixture terminal (shaded section)
2 load compensation chip (dashed line) 2 load compensation chip (dashed line)
3 chip terminal (dotted section) 3 chip terminal (dotted section)
4 low side terminals (shaded section)
5 high side terminals (shaded section)
Figure 10a – Top view Figure 10b – Front view
Figure 10 – Load compensation-chip position
5.5.4 Short compensation
The short compensation chips specified in 4.2.3 shall be performed on the test fixture, as
shown in Figure 11. At this time, the calculated inductance value of the short compensation
chips shall be the input to measuring equipment. The short compensation shall be performed
according to the instructions for the measuring equipment. The ESL calculation method is
described in Annex A.
2 1
Lc
Hc
Lp
Hp
2,0 ± 0,05
IEC  1744/10
Dimensions in millimetres
Key for Figure 11a Key for Figure 11b
1 one of fixture terminals (shaded section) 1 fixture terminals (shaded section)
2 short compensation chip (dashed line) 2 short compensation chip (dashed line)
3 low side terminals (shaded section)
4 high side terminals (shaded section)
Figure 11a – Top view Figure 11b – Front view
Figure 11 – Short compensation-chip position
3,0 ± 0,05
0,5 ± 0,05
62490-2 © IEC:2010 – 13 –
5.5.5 ESL measurement
After performing the compensation specified in 5.5.2, 5.5.3, and 5.5.4, replace compensation
chip with the capacitor to be measured. A capacitor onto the test fixture as shown in Figure 3
and Figure 4 shall be mounted, then make measurement.
6 Items to be indicated in the test result report
The test report shall include at least the following information:
a) test date*;
b) test site (name and place)*;
c) detail description of capacitor under test*;
d) measuring equipment (manufacturer and type);
e) test fixture (manufacturer and type);
f) measurement frequency and a measurement signal level; and
h) measured ESL value.
* Optional
– 14 – 62490-2 © IEC:2010
Annex A
(informative)
Theoretical ESL value of the short compensation chip

The inductance value of the short compensation chip shall be inputted as a definition value
during the time of short compensation of the measuring equipment. This value can be
calculated theoretically by using Formula A.1:
⎡ ⎤
⎛ ⎞
⎛ 2d ⎞ r
⎜ ⎟
L = 0,2d ln – 1+     r =0,2335()W + H (A.1)
⎢ ⎜ ⎟ ⎥
SH 1
⎜ ⎟
r d
⎝ ⎠
⎢ 1 ⎥
⎝ ⎠
⎣ ⎦
where
L is the inductance of the short compensation chip (nH);
SH
W is the width of the short compensation chip (mm);
H is the height of the short compensation
...