IEC 62889:2015

Digital video interface - Gigabit video interface for multimedia systems

IEC 62889:2015 describes a serial digital interface, gigabit video interface (GVIF) for the interconnection of digital video equipment. The GVIF is primarily intended to carry high-speed digital video data for general usage and is well suited for multimedia entertainment systems in a vehicle. It specifies the physical layer of the interface including transmission line characteristics and electrical characteristics of transmitter and receiver. Mechanical and physical specifications of connectors are not included.

Interface vidéo numérique – Interface vidéo gigabit pour les systèmes multimédias

L'IEC 62889:2015 décrit une interface numérique série, l'interface vidéo gigabit (GVIF) pour l'interconnexion de matériels vidéonumériques. La GVIF est principalement destinée à transporter des données vidéonumériques à grande vitesse pour un usage général et est bien adaptée aux systèmes de divertissement multimédia pour véhicule.
L'IEC 62889:2015 spécifie la couche physique de l'interface, y compris les caractéristiques de la ligne de transmission et les caractéristiques électriques de l'émetteur et du récepteur. Les spécifications mécaniques et physiques des connecteurs ne sont pas incluses.

General Information

• Status: Published
• Publication Date: 21-Apr-2015
• ICS: 33.160.40 - Video systems
• ICS: 33.160.60 - Multimedia systems and teleconferencing equipment
• ICS: 35.200 - Interface and interconnection equipment
• Technical Committee: TC 100 - Audio, video and multimedia systems and equipment
• Drafting Committee: PT 62889 - TC 100/PT 62889
• Current Stage: DELPUB - Deleted Publication
• Start Date: 06-Feb-2024
• Completion Date: 28-Feb-2023

Relations

• Revised: IEC 62889:2024 - Digital video interface - Gigabit video interface for multimedia systems
• Effective Date: 05-Sep-2023

Overview

IEC 62889:2015 - "Digital video interface – Gigabit video interface (GVIF) for multimedia systems" - specifies the physical layer of a serial digital video interface designed for high‑speed, uncompressed video interconnection. GVIF uses low voltage differential signaling (LVDS) over a single shielded twisted pair to deliver baseband video (up to 24‑bit colour) for automotive and embedded multimedia systems. The standard defines transmission line characteristics and electrical requirements for transmitters and receivers, but does not include mechanical connector specifications.

Keywords: IEC 62889:2015, GVIF, gigabit video interface, digital video interface, LVDS, automotive multimedia.

Key topics and technical requirements

• Physical layer specification: electrical DC and AC characteristics for GVIF transmitters and receivers, eye‑mask requirements and LOS detection.
• Transmission line characteristics: tolerance impedance, transmission loss profiles and guidance for shielded twisted‑pair cabling optimized for low EMI and high noise immunity.
• Front‑end and link management: TX/RX front‑end behavior, transition state handling and reference clock signaling.
• Protocol elements: encoder/decoder mapping (including 4B5B conversion and header formats), data framing for pixel‑based video (supporting RGB and YUV formats), and optional audio/user data channels.
• Multi‑link operation: informative annex covering single‑pair and multi‑pair parallel link configurations for higher bandwidth or pixel packing.
• Performance scope: supports display resolutions from WQVGA through WUXGA, 24‑bit per pixel color, and reliable transmission over cable lengths exceeding 10 m in automotive environments.
• Content protection support: designed to pair with HDCP for protected content delivery (optional).

Keywords: transmission line, electrical characteristics, encoder/decoder, 4B5B, eye mask, LVDS, WUXGA.

Applications

• In‑vehicle infotainment (IVI) links: camera, navigation, head‑unit to display connections where small lightweight cabling, low EMI and robust noise immunity matter.
• Automotive displays and rear‑seat entertainment systems.
• Embedded multimedia devices requiring point‑to‑point uncompressed video over short to medium cable runs.
• Any system needing a standardized gigabit serial video physical layer with optional audio and user data channels.

Keywords: automotive video interface, in‑vehicle display, uncompressed video, infotainment.

Who should use this standard

• Automotive OEMs and Tier‑1 suppliers designing display and camera subsystems.
• Hardware and IP developers implementing GVIF TX/RX PHYs.
• System integrators and test labs validating electrical conformance and EMI performance.
• Standards and compliance engineers aligning product interfaces with IEC/industry norms.

Related standards

• IEC 62315‑1 (DTV profiles for uncompressed digital video interfaces)
• ITU‑R BT.601‑5 and ITU‑R BT.656‑5 (video encoding and interface parameters)
• JEITA CP‑6101 (original GVIF specification), ARIB STD‑B21 (referenced in automotive context)

Keywords: IEC 62315, ITU‑R BT.601, JEITA GVIF, ARIB.

Standards Content (Sample)

IEC 62889 ®
Edition 1.0 2015-04
INTERNATIONAL
STANDARD
colour
inside
Digital video interface – Gigabit video interface for multimedia systems
All rights reserved. Unless otherwise specified, no part of this publication may be reproduced or utilized in any form
or by any means, electronic or mechanical, including photocopying and microfilm, without permission in writing from
either IEC or IEC's member National Committee in the country of the requester. If you have any questions about IEC
copyright or have an enquiry about obtaining additional rights to this publication, please contact the address below or
your local IEC member National Committee for further information.

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About the IEC
The International Electrotechnical Commission (IEC) is the leading global organization that prepares and publishes
International Standards for all electrical, electronic and related technologies.

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IEC 62889 ®
Edition 1.0 2015-04
INTERNATIONAL
STANDARD
colour
inside
Digital video interface – Gigabit video interface for multimedia systems

INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
ICS 33.160.40; 33.160.60; 35.200 ISBN 978-2-8322-2543-1

– 2 – IEC 62889:2015 © IEC 2015
CONTENTS
FOREWORD . 4
INTRODUCTION . 6
1 Scope . 7
2 Normative references . 7
3 Terms, definitions and abbreviations . 7
3.1 Terms and definitions . 7
3.2 Abbreviations . 9
4 Architecture . 10
5 Electrical characteristics . 11
5.1 DC electrical specifications . 11
5.2 AC electrical specifications . 12
6 Front-end. 13
6.1 General . 13
6.2 TX front-end . 13
6.3 RX front-end . 13
7 Transition state link . 14
8 Protocol . 15
8.1 General . 15
8.2 Encoder . 15
8.3 Decoder . 17
9 Transmission system and transmission line of electrical characteristics . 17
Annex A (informative) Multiple link application . 19
A.1 Single link application example . 19
A.1.1 Block diagram for single link transmission . 19
A.1.2 Data mapping of single link transmission . 20
A.2 Multiple link application example . 20
A.2.1 Block diagram for 2-pair parallel transmission . 20
A.2.2 Data mapping of 2-pair transmission . 21
Bibliography . 22

Figure 1 – Architecture of the GVIF . 10
Figure 2 – VOD, VOS diagram . 11
Figure 3 – Transmitter eye mask specifications (TP1) . 12
Figure 4 – Front-end block diagram . 13
Figure 5 – Transition state link . 14
Figure 6 – Encoder output diagram . 15
Figure 7 – C format word . 16
Figure 8 – H format word . 16
Figure 9 – Transmission system . 17
Figure 10 – Transmission line tolerance impedance . 18
Figure 11 – Transmission loss . 18
Figure A.1 – Differential single link block diagram . 19
Figure A.2 – Pixel configuration . 20

Figure A.3 – Multiple link application block diagram . 20
Figure A.4 – Pixel configuration when using 2-pairs . 21

Table 1 – DC electrical specifications of the transmitter . 11
Table 2 – DC electrical specifications of the receiver . 12
Table 3 – AC electrical specifications of the transmitter . 12
Table 4 – AC electrical specifications of the receiver . 12
Table 5 – 4B5B conversion . 16
Table 6 – VSYNC, HSYNC, DE, CNTL/AUX, SDA, TDA transition and the
corresponding header . 17

– 4 – IEC 62889:2015 © IEC 2015
INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________
DIGITAL VIDEO INTERFACE –
GIGABIT VIDEO INTERFACE FOR MULTIMEDIA SYSTEMS

FOREWORD
1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising
all national electrotechnical committees (IEC National Committees). The object of IEC is to promote
international co-operation on all questions concerning standardization in the electrical and electronic fields. To
this end and in addition to other activities, IEC publishes International Standards, Technical Specifications,
Technical Reports, Publicly Available Specifications (PAS) and Guides (hereafter referred to as “IEC
Publication(s)”). Their preparation is entrusted to technical committees; any IEC National Committee interested
in the subject dealt with may participate in this preparatory work. International, governmental and non-
governmental organizations liaising with the IEC also participate in this preparation. IEC collaborates closely
with the International Organization for Standardization (ISO) in accordance with conditions determined by
agreement between the two organizations.
2) The formal decisions or agreements of IEC on technical matters express, as nearly as possible, an international
consensus of opinion on the relevant subjects since each technical committee has representation from all
interested IEC National Committees.
3) IEC Publications have the form of recommendations for international use and are accepted by IEC National
Committees in that sense. While all reasonable efforts are made to ensure that the technical content of IEC
Publications is accurate, IEC cannot be held responsible for the way in which they are used or for any
misinterpretation by any end user.
4) In order to promote international uniformity, IEC National Committees undertake to apply IEC Publications
transparently to the maximum extent possible in their national and regional publications. Any divergence
between any IEC Publication and the corresponding national or regional publication shall be clearly indicated in
the latter.
5) IEC itself does not provide any attestation of conformity. Independent certification bodies provide conformity
assessment services and, in some areas, access to IEC marks of conformity. IEC is not responsible for any
services carried out by independent certification bodies.
6) All users should ensure that they have the latest edition of this publication.
7) No liability shall attach to IEC or its directors, employees, servants or agents including individual experts and
members of its technical committees and IEC National Committees for any personal injury, property damage or
other damage of any nature whatsoever, whether direct or indirect, or for costs (including legal fees) and
expenses arising out of the publication, use of, or reliance upon, this IEC Publication or any other IEC
Publications.
8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is
indispensable for the correct application of this publication.
9) Attention is drawn to the possibility that some of the elements of this IEC Publication may be the subject of
patent rights. IEC shall not be held responsible for identifying any or all such patent rights.
International Standard IEC 62889 has been prepared by subcommittee technical area 4:
Digital system interfaces and protocols, of IEC technical committee 100: Audio, video and
multimedia systems and equipment.
The text of this standard is based on the following documents:
CDV Report on voting
100/2193/CDV 100/2298/RVC
Full information on the voting for the approval of this standard can be found in the report on
voting indicated in the above table.
This publication has been drafted in accordance with the ISO/IEC Directives, Part 2.

The committee has decided that the contents of this publication will remain unchanged until
the stability date indicated on the IEC website under "http://webstore.iec.ch" in the data
related to the specific publication. At this date, the publication will be
• reconfirmed,
• withdrawn,
• replaced by a revised edition, or
• amended.
A bilingual version of this publication may be issued at a later date.

IMPORTANT – The 'colour inside' logo on the cover page of this publication indicates
that it contains colours which are considered to be useful for the correct
understanding of its contents. Users should therefore print this document using a
colour printer.
– 6 – IEC 62889:2015 © IEC 2015
INTRODUCTION
This International Standard is based on a standard JEITA CP-6101: Digital monitor interface
GVIF that was originally specified by the Japan Electronics and Information Technology
Industries Association (JEITA).
The gigabit video interface (GVIF) is a serial point to point interface supporting uncompressed
digital video links that was designed to address the needs of automotive navigation and
entertainment systems, etc., to transport base band digital video information. The GVIF
applies low voltage differential signaling (LVDS) technology and makes use of a thin cable
consisting of a single shielded twisted pair of conductors that exhibits high noise immunity
and low EMI, and is optimized for small size and low weight. The GVIF supports display
resolutions ranging from WQVGA through WUXGA with maximum 24 bit per pixel colour video
data, and can transmit base band video signal over cable lengths over 10 m. When paired
with high bandwidth data content protection (HDCP), the GVIF's standard functions and
features address all of the requirements for delivering content protected video from a source
to a video display monitor. Optionally, the GVIF supports audio data transmission and user
data transmission.
The Association of Radio Industry Business (ARIB) refers the GVIF in its standard
ARIB STD-B21 as one of authorized digital video output interfaces.

DIGITAL VIDEO INTERFACE –
GIGABIT VIDEO INTERFACE FOR MULTIMEDIA SYSTEMS

1 Scope
This International Standard describes a serial digital interface, gigabit video interface (GVIF)
for the interconnection of digital video equipment. The GVIF is primarily intended to carry
high-speed digital video data for general usage and is well suited for multimedia
entertainment systems in a vehicle.
This International Standard specifies the physical layer of the interface including transmission
line characteristics and electrical characteristics of transmitter and receiver. Mechanical and
physical specifications of connectors are not included.
2 Normative references
The following documents, in whole or in part, are normatively referenced in this document and
are indispensable for its application. For dated references, only the edition cited applies. For
undated references, the latest edition of the referenced document (including any
amendments) applies.
IEC 62315-1:2003, DTV profiles for uncompressed digital video interfaces – Part 1: General
ITU-R BT.601-5, Studio encoding parameters of digital television for standard 4:3 and wide-
screen 16:9 aspect ratios
ITU-R BT.656-5, Interface for digital component video signals in 525-line and 625-line
television systems operating at the 4:2:2 level of Recommendation ITU-R BT.601
3 Terms, definitions and abbreviations
3.1 Terms and definitions
For the purposes of this document, the following terms and definitions apply.
3.1.1
DE
display enable signal given in IEC 62315-1
3.1.2
HSYNC
display horizontal synchronous signal given in IEC 62315-1
3.1.3
VSYNC
display vertical synchronous signal given in IEC 62315-1
3.1.4
RGB
display red, green, blue colour data input (TX) or output (RX) given in ITU-R BT.601-5 and
ITU-R BT.656-5
– 8 – IEC 62889:2015 © IEC 2015
3.1.5
YU(Cb)V(Cr)
display Y, U (Cb), V (Cr) pixel data input (TX) or output (RX) given in ITU-R BT.601-5 and
ITU-R BT.656-5
3.1.6
CNTL/AUX
down-stream user defined signal or audio enable signal
3.1.7
P[23:0]
digital signal data like a 24 bit colour video data such as RGB or YU (Cb) V (Cr) data input
(TX) or output (RX)
3.1.8
GVIF RX
circuit that receives the serial signal from a shielded-pair transmission line, decodes them and
outputs to convert into the parallel video signal
3.1.9
GVIF TX
circuit that receives the parallel video signal, the control signals, and encodes them into serial
data to send a signal by driving a shielded-pair transmission line
3.1.10
LOS
loss of signal
detection signal, asserted when the differential input signal at the receiver cannot receive
3.1.11
RX front-end
front-end block of receiver side
3.1.12
SDA
serial data
down-stream signal
3.1.13
SDATAP
down-stream positive-phase side signal of the differential serial data
3.1.14
SDATAN
down-stream negative-phase side signal of the differential serial data
3.1.15
REFRQP
current source signal for reference clock request from Rx side
3.1.16
REFRQN
current source signal for reference clock request from Rx side as well as REFRQP
3.1.17
SFTCLK
pixel clock
clock for capture of the parallel video data per pixel

-
...

IEC 62889 ®
Edition 1.0 2015-04
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
colour
inside
Digital video interface – Gigabit video interface for multimedia systems

Interface vidéo numérique – Interface vidéo gigabit pour les systèmes
multimédias
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IEC 62889 ®
Edition 1.0 2015-04
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
colour
inside
Digital video interface – Gigabit video interface for multimedia systems

Interface vidéo numérique – Interface vidéo gigabit pour les systèmes

multimédias
INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
COMMISSION
ELECTROTECHNIQUE
INTERNATIONALE
ICS 33.160.40; 33.160.60; 35.200 ISBN 978-2-8322-1096-6

– 2 – IEC 62889:2015 © IEC 2015
CONTENTS
FOREWORD . 4
INTRODUCTION . 6
1 Scope . 7
2 Normative references . 7
3 Terms, definitions and abbreviations . 7
3.1 Terms and definitions . 7
3.2 Abbreviations . 9
4 Architecture . 10
5 Electrical characteristics . 11
5.1 DC electrical specifications . 11
5.2 AC electrical specifications . 12
6 Front-end. 13
6.1 General . 13
6.2 TX front-end . 13
6.3 RX front-end . 13
7 Transition state link . 14
8 Protocol . 15
8.1 General . 15
8.2 Encoder . 15
8.3 Decoder . 17
9 Transmission system and transmission line of electrical characteristics . 17
Annex A (informative) Multiple link application . 19
A.1 Single link application example . 19
A.1.1 Block diagram for single link transmission . 19
A.1.2 Data mapping of single link transmission . 20
A.2 Multiple link application example . 20
A.2.1 Block diagram for 2-pair parallel transmission . 20
A.2.2 Data mapping of 2-pair transmission . 21
Bibliography . 22

Figure 1 – Architecture of the GVIF . 10
Figure 2 – VOD, VOS diagram . 11
Figure 3 – Transmitter eye mask specifications (TP1) . 12
Figure 4 – Front-end block diagram . 13
Figure 5 – Transition state link . 14
Figure 6 – Encoder output diagram . 15
Figure 7 – C format word . 16
Figure 8 – H format word . 16
Figure 9 – Transmission system . 17
Figure 10 – Transmission line tolerance impedance . 18
Figure 11 – Transmission loss . 18
Figure A.1 – Differential single link block diagram . 19
Figure A.2 – Pixel configuration . 20

Figure A.3 – Multiple link application block diagram . 20
Figure A.4 – Pixel configuration when using 2-pairs . 21

Table 1 – DC electrical specifications of the transmitter . 11
Table 2 – DC electrical specifications of the receiver . 12
Table 3 – AC electrical specifications of the transmitter . 12
Table 4 – AC electrical specifications of the receiver . 12
Table 5 – 4B5B conversion . 16
Table 6 – VSYNC, HSYNC, DE, CNTL/AUX, SDA, TDA transition and the
corresponding header . 17

– 4 – IEC 62889:2015 © IEC 2015
INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________
DIGITAL VIDEO INTERFACE –
GIGABIT VIDEO INTERFACE FOR MULTIMEDIA SYSTEMS

FOREWORD
1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising
all national electrotechnical committees (IEC National Committees). The object of IEC is to promote
international co-operation on all questions concerning standardization in the electrical and electronic fields. To
this end and in addition to other activities, IEC publishes International Standards, Technical Specifications,
Technical Reports, Publicly Available Specifications (PAS) and Guides (hereafter referred to as “IEC
Publication(s)”). Their preparation is entrusted to technical committees; any IEC National Committee interested
in the subject dealt with may participate in this preparatory work. International, governmental and non-
governmental organizations liaising with the IEC also participate in this preparation. IEC collaborates closely
with the International Organization for Standardization (ISO) in accordance with conditions determined by
agreement between the two organizations.
2) The formal decisions or agreements of IEC on technical matters express, as nearly as possible, an international
consensus of opinion on the relevant subjects since each technical committee has representation from all
interested IEC National Committees.
3) IEC Publications have the form of recommendations for international use and are accepted by IEC National
Committees in that sense. While all reasonable efforts are made to ensure that the technical content of IEC
Publications is accurate, IEC cannot be held responsible for the way in which they are used or for any
misinterpretation by any end user.
4) In order to promote international uniformity, IEC National Committees undertake to apply IEC Publications
transparently to the maximum extent possible in their national and regional publications. Any divergence
between any IEC Publication and the corresponding national or regional publication shall be clearly indicated in
the latter.
5) IEC itself does not provide any attestation of conformity. Independent certification bodies provide conformity
assessment services and, in some areas, access to IEC marks of conformity. IEC is not responsible for any
services carried out by independent certification bodies.
6) All users should ensure that they have the latest edition of this publication.
7) No liability shall attach to IEC or its directors, employees, servants or agents including individual experts and
members of its technical committees and IEC National Committees for any personal injury, property damage or
other damage of any nature whatsoever, whether direct or indirect, or for costs (including legal fees) and
expenses arising out of the publication, use of, or reliance upon, this IEC Publication or any other IEC
Publications.
8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is
indispensable for the correct application of this publication.
9) Attention is drawn to the possibility that some of the elements of this IEC Publication may be the subject of
patent rights. IEC shall not be held responsible for identifying any or all such patent rights.
International Standard IEC 62889 has been prepared by subcommittee technical area 4:
Digital system interfaces and protocols, of IEC technical committee 100: Audio, video and
multimedia systems and equipment.
The text of this standard is based on the following documents:
CDV Report on voting
100/2193/CDV 100/2298/RVC
Full information on the voting for the approval of this standard can be found in the report on
voting indicated in the above table.
This publication has been drafted in accordance with the ISO/IEC Directives, Part 2.

The committee has decided that the contents of this publication will remain unchanged until
the stability date indicated on the IEC website under "http://webstore.iec.ch" in the data
related to the specific publication. At this date, the publication will be
• reconfirmed,
• withdrawn,
• replaced by a revised edition, or
• amended.
IMPORTANT – The 'colour inside' logo on the cover page of this publication indicates
that it contains colours which are considered to be useful for the correct
understanding of its contents. Users should therefore print this document using a
colour printer.
– 6 – IEC 62889:2015 © IEC 2015
INTRODUCTION
This International Standard is based on a standard JEITA CP-6101: Digital monitor interface
GVIF that was originally specified by the Japan Electronics and Information Technology
Industries Association (JEITA).
The gigabit video interface (GVIF) is a serial point to point interface supporting uncompressed
digital video links that was designed to address the needs of automotive navigation and
entertainment systems, etc., to transport base band digital video information. The GVIF
applies low voltage differential signaling (LVDS) technology and makes use of a thin cable
consisting of a single shielded twisted pair of conductors that exhibits high noise immunity
and low EMI, and is optimized for small size and low weight. The GVIF supports display
resolutions ranging from WQVGA through WUXGA with maximum 24 bit per pixel colour video
data, and can transmit base band video signal over cable lengths over 10 m. When paired
with high bandwidth data content protection (HDCP), the GVIF's standard functions and
features address all of the requirements for delivering content protected video from a source
to a video display monitor. Optionally, the GVIF supports audio data transmission and user
data transmission.
The Association of Radio Industry Business (ARIB) refers the GVIF in its standard
ARIB STD-B21 as one of authorized digital video output interfaces.

DIGITAL VIDEO INTERFACE –
GIGABIT VIDEO INTERFACE FOR MULTIMEDIA SYSTEMS

1 Scope
This International Standard describes a serial digital interface, gigabit video interface (GVIF)
for the interconnection of digital video equipment. The GVIF is primarily intended to carry
high-speed digital video data for general usage and is well suited for multimedia
entertainment systems in a vehicle.
This International Standard specifies the physical layer of the interface including transmission
line characteristics and electrical characteristics of transmitter and receiver. Mechanical and
physical specifications of connectors are not included.
2 Normative references
The following documents, in whole or in part, are normatively referenced in this document and
are indispensable for its application. For dated references, only the edition cited applies. For
undated references, the latest edition of the referenced document (including any
amendments) applies.
IEC 62315-1:2003, DTV profiles for uncompressed digital video interfaces – Part 1: General
ITU-R BT.601-5, Studio encoding parameters of digital television for standard 4:3 and wide-
screen 16:9 aspect ratios
ITU-R BT.656-5, Interface for digital component video signals in 525-line and 625-line
television systems operating at the 4:2:2 level of Recommendation ITU-R BT.601
3 Terms, definitions and abbreviations
3.1 Terms and definitions
For the purposes of this document, the following terms and definitions apply.
3.1.1
DE
display enable signal given in IEC 62315-1
3.1.2
HSYNC
display horizontal synchronous signal given in IEC 62315-1
3.1.3
VSYNC
display vertical synchronous signal given in IEC 62315-1
3.1.4
RGB
display red, green, blue colour data input (TX) or output (RX) given in ITU-R BT.601-5 and
ITU-R BT.656-5
– 8 – IEC 62889:2015 © IEC 2015
3.1.5
YU(Cb)V(Cr)
display Y, U (Cb), V (Cr) pixel data input (TX) or output (RX) given in ITU-R BT.601-5 and
ITU-R BT.656-5
3.1.6
CNTL/AUX
down-stream user defined signal or audio enable signal
3.1.7
P[23:0]
digital signal data like a 24 bit colour video data such as RGB or YU (Cb) V (Cr) data input
(TX) or output (RX)
3.1.8
GVIF RX
circuit that receives the serial signal from a shielded-pair transmission line, decodes them and
outputs to convert into the parallel video signal
3.1.9
GVIF TX
circuit that receives the parallel video signal, the control signals, and encodes them into serial
data to send a signal by driving a shielded-pair transmission line
3.1.10
LOS
loss of signal
detection signal, asserted when the differential input signal at the receiver cannot receive
3.1.11
RX front-end
front-end block of receiver side
3.1.12
SDA
serial data
down-stream signal
3.1.13
SDATAP
down-stream positive-phase side signal of the differential serial data
3.1.14
SDATAN
down-stream negative-phase side signal of the differential serial data
3.1.15
REFRQP
current source signal for reference clock request from Rx side
3.1.16
REFRQN
current source signal for reference clock request from Rx side as well as REFRQP
3.1.17
SFTCLK
pixel clock
clock for capture of the parallel video data per pixel

3.1.18
TDA
transmit data
down-stream user defined signal
3.1.19
TX front-end
front-end block of transmitter side
3.1.20
UDA
user data
up-stream user defined signal
3.1.21
IRQ
up-stream common-mode reference request current for REFRQP/N
3.1.22
VOS
common-mode voltage amplitude of reference request
3.1.23
VOD
differential voltage amplitude for SDATAP/N
3.1.24
VDD
power supply on the transmitter side
3.1.25
V_SDATAP
single-ended voltage of SDATAP
3.1.26
V_SDATAN
single-ended voltage of SDATAN
3.1.27
TP1
transmitter end point for eye mask specification
3.1.28
normalized differential voltage
voltage of transmitter output point
3.1.29
UI
normalized time unit interval of transmitter output point
3.2 Abbreviations
AC Alternating Current
DC Direct Current
EMI Electro-Magnetic Interference
GVIF Gigabit Video InterFace
LSB Least Significant Bit
– 10 – IEC 62889:2015 © IEC 2015
LVDS Low Voltage Differential Signaling
MSB Most Significant Bit
4 Architecture
Figure 1 illustrates the architecture of the GVIF. The fundamental operation of the GVIF is a
simultaneous bi-directional data transmission technology, in which the low voltage differential
signal is transmitted down from the transmitter side to the receiver side, and the common-
mode voltage signal is transmitted up from the receiver side to the transmitter side through a
shielded twisted differential pair cable.
The shielded twisted pair transmission line has the characteristic impedance Z (see
Figure 10), the line is terminated to VDD by RT of (50 ± 15) Ω on the transmitter side, and is
terminated carrying differential data in RL of (100 ± 5) Ω on the receiver side.
Receiver side
Transmitter side
Transmission line
REFRQP
Z
req
(UDAP)
VDD
C
RT RT
SDATAP
RL
SDATAN
C
Z
SHIELD REFRQN
Z
req
(GND) (UDAN)
IEC
where
RT are the pull-up terminated load resistors on the transmitter side (50 ± 15) Ω;
Z is the characteristic impedance of the shielded twisted pair transmission line;
RL is the terminated resistor between differential data lines on the receiver side (100 ± 5) Ω;
C are AC coupling capacitors.
SDATAP/SDATAN are the down-stream positive and negative phases side signals carrying
differential serial data.
REFRQP (UDAP)/REFRQN (UDAN) is the up-stream REFREQ common-mode current signal
or UDA common-mode current user defined data signal. UDAP/UDAN are optional.
SHIELD (GND) is the GND and shielded ground for cable.
Z is a blocking filter for the up-stream signal. It can use resistors or inductors depending on
req
the system implementation.
Figure 1 – Architecture of the GVIF

5 Electrical characteristics
5.1 DC electrical specifications
The DC electrical specifications of the transmitter side are shown in Table 1, and the DC
electrical specifications of the receiver side are shown in Table 2.
Table 1 – DC electrical specifications of the transmitter
Differential output Common mode voltage Input REFRQ assert Input REFRQ de-
peak to peak (SDATAP/N) current (SDATAP/N) assert current
voltage (SDATAP/N)
(SDATAP/N)
mV V mA mA
Condition: Condition: Condition:
RT = 50 Ω RT = 50 Ω RT = 50 Ω
RL = 100 Ω RL = 100 Ω RL = 100 Ω
IRQ = 0 mA IRQ = 11 mA
Minimum 690 VDD −0,55 VDD −1,2 −2,0
Typical 800
Maximum 910 VDD −0,35 VDD −0,8 −7,3

Single
ended
V_SDATAN
V_SDATAP
VOS
0 V
Differential
ended
VOD
0 V
(V_SDATAP)
– (V_SDATAN)
IEC
Figure 2 – VOD, VOS diagram
– 12 – IEC 62889:2015 © IEC 2015
Table 2 – DC electrical specifications of the receiver
Output HIGH current Output LOW current
(REFRQP/N) (REFRQP/N)
mA mA
Minimum −0,1 7,4
Maximum 0,1 11
5.2 AC electrical specifications
The AC electrical specifications of the transmitter side are shown in Table 3 and Figure 3
shows a transmitter end point eye specification (TP1). The AC electrical specifications of the
receiver side are shown in Table 4.
Table 3 – AC electrical specifications of the transmitter
SFTCLK frequency UDA data rate (up-stream) SFTCLK duty factor
MHz Mbit/s %
Minimum 7,6 0,01 40
Maximum 160 2,41 60
Transmitter eye mask
1,0
0,75
0,5
0,25
0,0
–0,25
–0,5
–0,75
–1,0
0 0,2 0,4 0,6 0,8 1
UI
IEC
Figure 3 – Transmitter eye mask specifications (TP1)
Table 4 – AC electrical specifications of the receiver
SFTCLK frequency UDA data rate (up-stream)
MHz Mbit/s
Minimum 7,6 0,01
Maximum 160 2,41
Normalized differential voltage

6 Front-end
6.1 General
The front-end block diagram of GVIF is shown in Figure 4.
Transmission line
Transmitter side Receiver side
VDD
Down stream receiver
RL
RL
SDATAP
C
RT
SDATAN
Z
C
GND
IRQ
IRQ
Down stream driver
Z
Z req
SHIELD req
(GND)
+
Up-stream driver
Up-stream receiver
IEC
Figure 4 – Front-end block diagram
6.2 TX front-end
The TX front-end consists of a termination circuit, a down-stream driver and an up-stream
receiver. The termination circuit consists of 2 resistors RL, and the SDATAP/N differential
signal is pulled up to voltage reference (VDD) with a (50 ± 15) Ω resistor. The down-stream
driver consists of a differential current output circuit that is driven by the serial signal from the
encoder. The up-stream receiver detects the common-mode signal which RX sends through
the shielded twisted pair line. The input to the down-stream driver has two modes. One is the
serialized actual encoded video data input mode and the other is the reference clock signal
for REFREQ hand-shake input mode. These two modes activate depending on the common-
mode signal level. The common-mode signal level is normally high. When a long low level
pulse is detected, the up-stream receiver activates the REFREQ signal, and changes a mode
of the encoder into the reference clock mode. In case of the optional up-stream user data
transmission, the up-stream receiver outputs the common-mode voltage as an UDA signal by
using binary digital data sent to the encoder. In this case, the upper limit of the low pulse time
is 100 µs.
6.3 RX front-end
The Rx front-end consists of AC capacitors, a termination resistor RT (100 ± 5) Ω, a down-
stream receiver and an up-stream driver. The down-stream receiver consists of a differential
input detection circuit which receives the transmission potential differential signal through the
shielded twisted pair line. The up-stream driver drives the up-stream transmission signal
applying a current through the termination resistor Rx through the shielded twisted pair
transmission line. (A recommended transmission system and transmission line for electrical
characteristics is specified in Clause 5.)

– 14 – IEC 62889:2015 © IEC 2015
7 Transition state link
The transition state link of GVIF shall meet the procedure described below.
There are two states in the connection link between GVIF TX and GVIF RX. One is the state
transmitting differential signal with a reference clock, the other is the state transmitting the H
format word or the C format word. In the former state, the TX encoder is in the reference clock
output mode and the RX decoder is in the reference clock request mode. In the later state, the
TX encoder changes into the encoder mode and the RX decoder changes into the decoder
mode. The state transition switching diagram of the encoder and the decoder is shown in the
Figure 5.
ＲＸ
ＴＸ
TX
RX
Reference clock
Reference clock
Encoder mode Decoder mode
Output mode Request mode
format word
C/H
State0
State0
REFREQ active
Transition1
REFREQ active
State1
Transition2
Reference clock
State2
Transition3
REFREQ inactive
State3
State4
Transition4
Transition5
State0
IEC
State0 (normal) : The C/H format word is transmitted down from the TX in the encoder mode to the RX, and
the deactivation signal REFREQ is transmitted up from the RX in the decoder mode to the
TX.
Transition1 : Transition to the reference clock request mode after finding an irregular HSYNC when the
RX decodes.
State1 : The RX transmits up the activate signal REFREQ.
Transition2 : The TX transits to the reference clock output mode when the activate signal REFREQ is
detected.
State2 : The TX transmits down the reference clock, and the RX adjusts the internal sampling clock.
Transition3 : The RX transits to the decoder mode after the internal sampling clock adjustment.
State3 : The RX transmits up the inactivate signal REFREQ.
Transition4 : The TX transits to the encoder mode when the inactivate signal REFREQ is detected.
State4 : P[23:0] transmits continuously the H/C format word equivalent all zero until the TX transmits
(VSYNX, HSYNC) (1,1) → (1,0) 60 times.
Transition5 : Return to normal when the signal has been transmitted 60 times.
Figure 5 – Transition state link

8 Protocol
8.1 General
The encoder encodes the 30 bit of data (P[23:0], HSYNC, VSYNC, DE, CNTL, SDA and TDA)
in synchronization with the input of SFTCLK, and outputs 1 bit of the serial signal S to the TX
front-end.
To ensure the DC balance data and a reasonable transition, it is required to generate a
synchronization pattern for each word in synchronization with the falling edge of HSYNC at
the receiver.
8.2 Encoder
The encoder encodes the full 30 bit of input data (P[23:0], HSYNC, VSYNC, DE, CNTRL, SDA
and TDA) synchronized with SFTCLK, and outputs a 1 bit serial signal S to the TX front-end.
The signal is coded after dividing into the following data.
a) Broadband data P[23:0] (24 bits), no transition data.
b) Time mark data HSYNC, VSYNC, DE, CNTL, SDA and TDA (6 bit).
Transition frequency of the signal is limited by the logical specification coding.
The broadband data are normally converted to 1 bit data, but in case of the time mark data,
the transition is converted to 1 bit data. When there is no transition in the time mark data the
broadband data are converted to the C format with 20 % overhead. When there is a time mark
transition, the broadband data are converted to the H format with 6 bit header and 24 bit
broadband data.
The broadband data and the time mark data are output as a serial signal S led by the MSB
after conversion into a 30 bit length C format word or H format word.
The C format word is used when there is no time mark data transition at the previous pixel
clock cycle, and the H format word is used when there is/are one or more time mark data
transition(s) at the previous pixel clock cycle. (See Figure 6).
SFTCLK
P[23:0]
HSYNC, VSYNC, DE,
CNTL, SDA, TDA
30b 30b
Serial data S
C C H C C
C
C format word H format word
IEC
Figure 6 – Encoder output diagram
The C format word consists of the combined six codes of 5 bit which is generated by the 4B5B
conversion braking the broadband data P[23:0] by 4bit. (See Figure 7).

– 16 – IEC 62889:2015 © IEC 2015
Broad band data P
7 6 5 4 3 2 1 0
23 20 19 16 15 12 11 8
4 bit data 4 bit data 4 bit data
4 bit data 4 bit data 4 bit data
MSB   LSB MSB   LSB MSB   LSB MSB   LSB MSB   LSB MSB   LSB
5 bit code 5 bit code 5 bit code 5 bit code 5 bit code 5 bit code
29 25 24 20 19 15 14 10 9 8 7 6 5 4 3 2 1 0
(MSB) (LSB)
Serial data S
IEC
Figure 7 – C format word
Table 5 – 4B5B conversion
4 bit data 5 bit code 4 bit data 5 bit code
MSB – LSB MSB – LSB MSB – LSB MSB – LSB
“0 0 0 0” “0 0 1 0 1” “1 0 0 0” “1 0 0 1 0”
“0 0 0 1” “0 0 1 1 0” “1 0 0 1” “1 0 0 1 1”
“0 0 1 0” “0 0 1 1 1” “1 0 1 0” “1 0 1 0 0”
“0 0 1 1” “0 1 0 0 1” “1 0 1 1” “1 0 1 0 1”
“0 1 0 0” “0 1 0 1 0” “1 1 0 0” “1 0 1 1 0”
“0 1 0 1” “0 1 0 1 1” “1 1 0 1” “1 1 0 0 1”
“0 1 1 0” “0 1 1 0 0” “1 1 1 0” “1 1 0 1 0”
“0 1 1 1” “0 1 1 0 1” “1 1 1 1” “1 1 1 0 0”

The H format is generated by a combination of the 24 bit broadband data P[23:0] with a 6 bit
header that indicates the transition state of a time mark, see Figure 8. The positions of even
numbers of the broadband data P are inverted in the serial data S. The structure of the
header is shown in Table 6.
IEC
Figure 8 – H format word
¨ ¨ ¨ ¨ ¨ ¨ ¨ ¨ ¨ ¨ ¨
¨
¨ ¨ ¨ ¨ ¨ ¨ ¨ ¨
Table 6 – VSYNC, HSYNC, DE, CNTL/AUX, SDA,
TDA transition and the corresponding header
Transition signal Header bit array Remark
V and H are the VSYNC inversion value and the HSYNC
a VSYNC, HSYNC ”1 0 0 0 V H”
value after transition.
b DE, CNTL/AUX ”0 1 1 1 D C” D and C are the DE and CNTL values after transition.
c SDA, TDA ”1 1 1 1 S T” S and T are the SDA and TDA values after transition.
Transition between the signals simultaneously among a, b and c shall not be permitted.

8.3 Decoder
The serial data S that comes from the RX front-end is converted as shown in Figure 7,
Figure 8, Table 5 and Table 6.
9 Transmission system and transmission line of electrical characteristics
The transmission systems (see Figure 9) are required to meet the specifications below.
• The differential impedance shall meet the specification stated in Figure 10. A transmission
line has a small and gradual attenuation.
• A transmission line loss on a cable shall be less than −15 dB at 1 GHz in accordance with
f attenuation. (See Figure 11).
The differential signal cable skew time shall be:
• less than 30 % of one bit time (SFTCLK > 33 MHz);
• less than 24 % of one bit time (SFTCLK ≤ 33 MHz).
(50 Ω)
(100 Ω)
(diff. 100 Ω)
(50 Ω) (50 Ω)
IEC
Figure 9 – Transmission system

– 18 – IEC 62889:2015 © IEC 2015
<500 ps <500 ps
IEC
Figure 10 – Transmission line tolerance impedance
<15 dB
2 dB
1 GHz
IEC
Figure 11 – Transmission loss
Z  (Ω)
Annex A
(informative)
Multiple link application
A.1 Single link application example
A.1.1 Block diagram for single link transmission
A block diagram of a differential single link is shown in Figure A.1.
Transmitter Side
Reciever Side
GVIF RX
GVIF TX
Decoder
Encoder
P[23:0] P[23:0]
TX
RX
Front-end Front-end HSYNC
HSYNC
VSYNC,DE,
VSYNC
Down- Down-
DE SDATAP CNTL/AUX,
stream stream
CNTL/AUX
TDA
driver receiver
SDATAN
SFTCLK
TDA
Up-
Up-
LOS
stream stream
SFTCLK REFRQP
(A ch. Signal detect)
Up-strem Up-stream
receiver driver
UDA REFRQN UDA
(optional)l (optional)
HDCP key HDCP key
I2C
I2C
(optional) (optional)
IEC
Figure A.1 – Differential single link block diagram
The down-stream transmission signal are the encoded serial P[23:0], HSYNC, VSYNC, DE,
CNTL/AUX, SDA and TDA 30 bit data by the GVIF TX encoder. These data are in all of the
SFTCLK domains, and they can be re-generated by the GVIF RX decoder. The encoder and
decoder are performed in accordance with Clause 7.
The LOS signal output on the receiver side is asserted when GVIF RX receives no differential
signal input or the clock and data recovery circuit in GVIF RX does not generate recovered
SFTCLK (loss of lock).
There are optional functions for down-stream and up-stream user defined signal
transmissions with terminal name CNTL/AUX and TDA for down-stream and UDA for up-
stream as shown in Figure A.1. AUX can also optionally use an audio enable signal.
Additionally, HDCP (high-bandwidth digital contents protection) is also defined as an optional
function. The I2C inputs for both GVIF TX and GVIF RX are input terminals to control the
HDCP authentication function. The SDA (optional) is generated by an I2C signal order, i.e. a
signal to exchange a HDCP key between GVIF TX and GVIF RX.

– 20 – IEC 62889:2015 © IEC 2015
A.1.2 Data mapping of single link transmission
A data mapping array should be assigned pixel data of a LCD module as shown in Figure A.2.
(1,1) (1,2) (1,3) (1,4)
(2,1) (2,2) (2,3) (2,4)
(3,1) (3,2) (3,3) (3,4)
(4,1) (4,2) (4,3) (4,4)
Input Data
(1, 1) (1, 2) (1, 3) (2, 3) (2, 4)
IEC
Figure A.2 – Pixel configuration
A.2 Multiple link application example
A.2.1 Block diagram for 2-pair parallel transmission
A block diagram of a multiple link system configuration is shown in Figure A.3. Each channel
is called A-ch and B-ch.
Transmitter side
Reciever side
GVIF RX
GVIF TX
Decoder
PA[23:0]
PA[23:0] 24
Encoder
Odd data
Odd data TX RX
A-ch.
Front-end Front-end HSYNC
HSYNC
VSYNC,DE,
Down- Down-
VSYNC
SDATAP CNTL/AUX,
DE stream stream
TDA
CNTL/AUX
driver SDATAN receiver
SFTCLK
TDA
Up- Up-
LOS
stream stream
REFRQP
(A ch. Signal detect)
Up-strem Up-stream
receiver driver
UDA
UDA (optional)l REFRQN (optional)
HDCP key HDCP key
I2C
I2C
(optional) (optional)
SFTCLK
GVIF RX
GVIF TX
Decoder PB[23:0]
PB[23:0] 24
Encoder
Even data
RX
TX
Even data
B-ch.
Front-end HSYNC
Front-end
Reserved
Down- Reserved
Down-
4 SDATAP
VSYNC
stream
stream
DE (B ch. Transmit detect)
CNTL/AUX
receiver
driver SDATAN
TDA
SFTCLK
Up-
Up-
LOS
DE stream
REFRQP stream
(B ch. Signal detect)
Up-stream
Up-stream
receiver
UDA driver
REFRQN
(optinal) (optional)
UDA
HDCP key HDCP key
I2C I2C
(optinal) (optional)
DE: used for judgment of 2-pair transmission
IEC
Figure A.3 – Multiple link application block diagram
In order to switch between a 1-pair transmission system and 2-pair transmission system, a
detection circuit is necessary on the transmitter side. In case of a 2-pair transmission system,

the DE equivalent signal is input to the “DE” pin of B-ch, and in case of a 1-pair transmission
system, the fixed signal is input to the “DE” pin of A-ch.
A.2.2 Data mapping of 2-pair transmission
Odd data should be assigned to A-ch, even data should be assigned to B-ch.
A data mapping array for a LCD module is shown in Figure A.4.
(1,1) (1,2) (1,3) (1,4)
(2,1) (2,2) (2,3) (2,4)
(3,1) (3,2) (3,3) (3,4)
(4,1) (4,2) (4,3) (4,4)
A-ch. B-ch. A-ch. B-ch.
data data data data
A-ch
(2, 3) (2, 5)
(1, 1) (1, 3) (1, 5)
input data
B-ch
(1, 2)
(1, 4) (1, 6) (2, 4) (2, 6)
input data
IEC
Figure A.4 – Pixel configuration when using 2-pairs

– 22 – IEC 62889:2015 © IEC 2015
Bibliography
JEITA CP-6101, Digital monitor interface GVIF
http://www.jeita.or.jp/japanese/public_standard/
ARIB (Association of Radio Industry Business)
http://www.arib.or.jp/tyosakenkyu/kikaku_hoso/hoso_std-b021.html
http://www.arib.or.jp/tyosakenkyu/kikaku_hoso/hoso_tr-b014.html
Digital Content Protection LLC
http://www.digital-cp.com/
ANSI/TIA/EIA-644-1995, Electrical Characteristics of Low Voltage Differential Signaling
(LVDS) Interface Circuits, November 1995
THE I C-BUS SPECIFICATION VERSION2.1
http://www.nxp.com/documents/other/UM10204_v5.pdf

_____________
– 24 – IEC 62889:2015 © IEC 2015
SOMMAIRE
AVANT-PROPOS . 26
INTRODUCTION . 28
1 Domaine d'application . 29
2 Références normatives . 29
3 Termes, définitions et abréviations . 29
3.1 Termes et définitions . 29
3.2 Abréviations . 32
4 Architecture . 32
5 Caractéristiques électriques . 33
5.1 Spécifications électriques en courant continu . 33
5.2 Spécifications électriques en courant alternatif . 35
6 Front . 36
6.1 Généralités . 36
6.2 Front TX . 37
6.3 Front RX . 37
7 Liaison d'état de transition . 37
8 Protocole . 38
8.1 Généralités . 38
8.2 Encodeur . 39
8.3 Décodeur . 41
9 Système de transmission et ligne de transmission des caractéristiques électriques . 41
Annexe A (informative) Application à liaisons multiples . 44
A.1 Exemple d'application à liaison unique . 44
A.1.1 Schéma fonctionnel pour la transmission à liaison unique . 44
A.1.2 Mappage des données d'une transmission à liaison unique . 45
A.2 Exemple d'application à liaisons multiples . 45
A.2.1 Schéma fonctionnel pour la transmission parallèle à 2 paires . 45
A.2.2 Mappage des données d'une transmission à 2 paires . 47
Bibliographie .
...