IEC TR 62240-1:2013
(Main)Process management for avionics - Electronic components capability in operation - Part 1: Temperature uprating
Process management for avionics - Electronic components capability in operation - Part 1: Temperature uprating
IEC/TR 62240-1:2013(E) provides information for the use of semiconductor devices in wider temperature ranges than those specified by the device manufacturer. The uprating solutions described herein are considered exceptions, when no reasonable alternatives are available; otherwise devices are utilized within the manufacturers' specifications. This technical report describes the methods and processes for implementing this special case. All of the elements of these methods and processes employ existing, commonly used best engineering practices. IEC/TR 62240-1 includes the following significant changes with respect to IEC/TR 62240:
- revised wording, clarifications and corrections;
- removal of all requirements;
- updated paragraphs, including addition of references to the utilization of samples from a single lot, and the fact that performance of uprating is repeated if significant changes are implemented by device manufacturer, as well as the reference that the manufacturer's warranty may be eliminated if uprating is performed.
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IEC/TR 62240-1 ®
Edition 1.0 2013-04
TECHNICAL
REPORT
colour
inside
Process management for avionics – Electronic components capability in
operation –
Part 1: Temperature uprating
IEC/TR 62240-1:2013(E)
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IEC/TR 62240-1 ®
Edition 1.0 2013-04
TECHNICAL
REPORT
colour
inside
Process management for avionics – Electronic components capability in
operation –
Part 1: Temperature uprating
INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
PRICE CODE
XA
ICS 03.100.50; 31.020; 49.060 ISBN 978-2-83220-739-0
– 2 – TR 62240-1 IEC:2013(E)
CONTENTS
FOREWORD . 4
INTRODUCTION . 6
1 Scope . 7
2 Normative references . 7
3 Terms, definitions and abbreviations . 7
3.1 Terms and definitions . 7
3.2 Abbreviations . 10
4 Selection provisions . 10
4.1 General . 10
4.2 Device selection, usage and alternatives . 10
4.2.1 General . 10
4.2.2 Alternatives . 11
4.2.3 Device technology . 11
4.2.4 Compliance with the electronic component management plan . 11
4.3 Device capability assessment . 12
4.3.1 General . 12
4.3.2 Device package and internal construction capability assessment . 12
4.3.3 Risk assessment (assembly level) . 12
4.3.4 Device uprating methods . 13
4.3.5 Device reliability assurance . 14
4.4 Device quality assurance in wider temperature ranges . 15
4.4.1 General . 15
4.4.2 Device parameter re-characterisation testing . 15
4.4.3 Device parameter conformance testing . 15
4.4.4 Higher assembly level testing . 15
4.4.5 Semiconductor device change monitoring . 16
4.4.6 Failure data collection and analysis . 16
4.5 Documentation . 16
4.6 Device identification . 16
Annex A (informative) Device parameter re-characterisation . 20
Annex B (informative) Stress balancing. 32
Annex C (informative) Parameter conformance assessment . 42
Annex D (informative) Higher assembly level testing . 49
Bibliography . 52
Figure 1 – Flow chart for semiconductor devices in wider temperature ranges . 18
Figure 2 – Report form for documenting device usage in wider temperature ranges . 19
Figure A.1 – Parameter re-characterisation . 21
Figure A.2 – Flow diagram of parameter re-characterisation capability assurance
process . 23
Figure A.3 – Margin in electrical parameter measurement based on the results of the
sample test . 26
Figure A.4 – Schematic diagram of parameter limit modifications . 27
Figure A.5 – Parameter re-characterisation device quality assurance . 28
Figure A.6 – Schematic of outlier products that may invalidate sample testing . 29
TR 62240-1 IEC:2013(E) – 3 –
Figure A.7 – Example of intermediate peak of an electrical parameter: voltage
feedback input threshold change for Motorola MC34261 power factor controller. . 30
Figure A.8 – Report form for documenting device parameter re-characterisation . 31
Figure B.1 – Iso-T curve: the relationship between ambient temperature and
J
dissipated power . 34
Figure B.2 – Graph of electrical parameters versus dissipated power. 35
Figure B.3 – Iso-T curve for the Fairchild MM74HC244 . 38
J
Figure B.4 – Power versus frequency curve for the Fairchild MM74HC244 . 39
Figure B.5 – Flow chart for stress balancing . 40
Figure B.6 – Report form for documenting stress balancing . 41
Figure C.1 – Relationship of temperature ratings, requirements and margins . 43
Figure C.2 – Typical fallout distribution versus T . 45
req-max
Figure C.3 – Parameter conformance assessment flow . 47
Figure C.4 – Report form for documenting parameter conformance testing . 48
Figure D.1 – Flow chart of higher level assembly testing . 50
Figure D.2 – Report form for documenting higher level assembly test at temperature
extremes . 51
Table A.1 – Example of sample size calculation . 24
Table A.2 – Parameter re-characterisation example: SN74ALS244 Octal Buffer/Driver . 27
– 4 – TR 62240-1 IEC:2013(E)
INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________
PROCESS MANAGEMENT FOR AVIONICS –
ELECTRONIC COMPONENTS CAPABILITY IN OPERATION –
Part 1: Temperature uprating
FOREWORD
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The main task of IEC technical committees is to prepare International Standards. However, a
technical committee may propose the publication of a technical report when it has collected
data of a different kind from that which is normally published as an International Standard, for
example "state of the art".
IEC/TR 62240-1, which is a technical report, has been prepared by IEC technical committee
107: Process management for avionics.
This first edition cancels and replaces IEC/TR 62240 published in 2005. This edition
constitutes a technical revision.
This edition includes the following significant changes:
a) Document is revised from IEC/TR 62240 to IEC/TR 62240-1.
b) Revised wording in clauses/subclauses: Introduction and Clauses 1 to 4 including
paragraph clarifications and corrections.
TR 62240-1 IEC:2013(E) – 5 –
c) Removed a
...
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