IEC 62132-1:2015
(Main)Integrated circuits - Measurement of electromagnetic immunity - Part 1: General conditions and definitions
Integrated circuits - Measurement of electromagnetic immunity - Part 1: General conditions and definitions
IEC 62132-1:2015 provides general information and definitions about measurement of electromagnetic immunity of integrated circuits (ICs) to conducted and radiated disturbances. It also defines general test conditions, test equipment and setup, as well as the test procedures and content of the test reports for all parts of the IEC 62132 series. Test method comparison tables are included in Annex A to assist in selecting the appropriate measurement method(s). This edition includes the following significant technical changes with respect to the previous edition:
a) frequency range of 150 kHz to 1 GHz has been deleted from the title;
b) frequency step above 1 GHz has been added in Table 2 in 7.4.1;
c) IC performance classes in 8.3 have been modified;
d) Table A.1 was divided into two tables, and references to IEC 62132-8 and IEC 62132-9 have been added in the new Table A.2 in Annex A.
Circuits intégrés - Mesure de l'immunité électromagnétique - Partie 1: Conditions générales et définitions
L'IEC 62132-1:2015 fournit des informations générales et des définitions relatives à la mesure de l'immunité électromagnétique des circuits intégrés (CI) aux perturbations conduites et rayonnées. Elle définit également les conditions générales d'essai, l'équipement et le montage d'essai, ainsi que les méthodes d'essai et le contenu des rapports d'essai pour toutes les parties de la série IEC 62132. Des tableaux de comparaison des méthodes d'essai sont inclus dans l'Annexe A pour aider à la sélection de la ou des méthodes de mesure appropriées. Cette édition inclut les modifications techniques majeures suivantes par rapport à l'édition précédente:
a) la plage de fréquences de 150 kHz à 1 GHz a été supprimée du titre;
b) l'échelon de fréquence supérieur à 1 GHz a été ajouté dans le Tableau 2 de 7.4.1;
c) les classes de performance des circuits intégrés de 8.3 ont été modifiées;
d) le Tableau A.1 a été divisé en deux tableaux, et des références à l'IEC 62132-8 et à l'IEC 62132-9 ont été ajoutées dans le nouveau Tableau A.2 de l'Annexe A.
General Information
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Standards Content (Sample)
IEC 62132-1 ®
Edition 2.0 2015-10
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
Integrated circuits – Measurement of electromagnetic immunity –
Part 1: General conditions and definitions
Circuits intégrés – Mesure de l'immunité électromagnétique –
Partie 1: Conditions générales et définitions
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IEC 62132-1 ®
Edition 2.0 2015-10
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
Integrated circuits – Measurement of electromagnetic immunity –
Part 1: General conditions and definitions
Circuits intégrés – Mesure de l'immunité électromagnétique –
Partie 1: Conditions générales et définitions
INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
COMMISSION
ELECTROTECHNIQUE
INTERNATIONALE
ICS 31.200 ISBN 978-2-8322-2968-2
– 2 – IEC 62132-1:2015 © IEC 2015
CONTENTS
FOREWORD . 4
INTRODUCTION . 6
1 Scope . 7
2 Normative references. 7
3 Terms and definitions . 7
4 Test conditions . 11
4.1 General . 11
4.2 Ambient conditions . 11
4.2.1 Ambient temperature . 11
4.2.2 RF ambient . 11
4.2.3 RF-immunity of the test setup . 11
4.2.4 Other ambient conditions . 11
4.3 Test generator . 11
4.4 Frequency range . 11
5 Test equipment . 12
5.1 General . 12
5.2 Shielding . 12
5.3 Test generator and power amplifier . 12
5.4 Other components . 12
6 Test setup . 12
6.1 General . 12
6.2 Test circuit board . 12
6.3 Pin selection scheme . 12
6.4 IC pin loading/termination . 13
6.5 Power supply requirements . 13
6.6 IC specific considerations . 13
6.6.1 IC supply voltage . 13
6.6.2 IC decoupling . 14
6.6.3 Operation of IC . 14
6.6.4 Guidelines for IC stimulation . 14
6.6.5 IC monitoring . 14
6.7 IC stability over time . 14
7 Test procedure . 14
7.1 Monitoring check . 14
7.2 Human exposure . 14
7.3 System verification . 14
7.4 Specific procedures . 15
7.4.1 Frequency steps . 15
7.4.2 Amplitude modulation . 15
7.4.3 Power levelling for modulation . 15
7.4.4 Dwell time . 16
7.4.5 Monitoring of the IC . 16
8 Test report. 16
8.1 General . 16
8.2 Immunity limits or levels . 17
8.3 IC performance classes . 17
8.4 Interpretation of results . 17
8.4.1 Comparison between IC(s) using the same test method . 17
8.4.2 Comparison between different test methods. 17
8.4.3 Correlation to module test methods . 17
Annex A (informative) Test method comparison table . 18
Annex B (informative) General test board description . 20
B.1 Overview. 20
B.2 Board description – Mechanical . 20
B.3 Board description – Electrical . 20
B.3.1 General . 20
B.3.2 Ground planes . 20
B.3.3 Package pins . 21
B.3.4 Via diameters . 21
B.3.5 Via distance . 21
B.3.6 Additional components . 21
B.3.7 Supply decoupling . 21
B.3.8 I/O load . 22
Bibliography . 24
Figure 1 – RF signal when RF peak power level is maintained . 16
Figure B.1 – Example of an immunity test board . 23
Table 1 – IC pin loading default values . 13
Table 2 – Frequency step size versus frequency range . 15
Table A.1 – Conducted immunity . 18
Table A.2 – Radiated immunity . 19
Table B.1 – Position of vias over the board . 20
– 4 – IEC 62132-1:2015 © IEC 2015
INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________
INTEGRATED CIRCUITS –
MEASUREMENT OF ELECTROMAGNETIC IMMUNITY –
Part 1: General conditions and definitions
FOREWORD
1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising
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8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is
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9) Attention is drawn to the possibility that some of the elements of this IEC Publication may be the subject of
patent rights. IEC shall not be held responsible for identifying any or all such patent rights.
International Standard IEC 62132-1 has been prepared by subcommittee 47A: Integrated
circuits, of IEC technical committee 47: Semiconductor devices.
This second edition cancels and replaces the first edition published in 2006 and constitutes a
technical revision.
This edition includes the following significant technical changes with respect to the previous
edition:
a) frequency range of 150 kHz to 1 GHz has been deleted from the title;
b) frequency step above 1 GHz has been added in Table 2 in 7.4.1;
c) IC performance classes in 8.3 have been modified;
d) Table A.1 was divided into two tables, and references to IEC 62132-8 and IEC 62132-9
have been added in the new Table A.2 in Annex A.
The text of this standard is based on the following documents:
FDIS Report on voting
47A/974/FDIS 47A/977/RVD
Full information on the voting for the approval of this standard can be found in the report on
voting indicated in the above table.
This publication has been drafted in accordance with the ISO/IEC Directives, Part 2.
A list of all parts in the IEC 62132 series, published under the general title Integrated circuits
– Measurement of electromagnetic immunity, can be found on the IEC website.
Future standards in this series will carry the new general title as cited above. Titles of existing
standards in this series will be updated at the time of the next edition.
The committee has decided that the contents of this publication will remain unchanged until
the stability date indicated on the IEC website under "http://webstore.iec.ch" in the data
related to the specific publication. At this date, the publication will be
• reconfirmed,
• withdrawn,
• replaced by a revised edition, or
• amended.
– 6 – IEC 62132-1:2015 © IEC 2015
INTRODUCTION
The IEC 62132 series is published in several parts, under the general title Integrated circuits –
Measurement of electromagnetic immunity:
• Part 1: General conditions and definitions
• Part 2: Measurement of radiated immunity – TEM cell and wideband TEM cell method
• Part 3: Bulk current injection (BCI) method
• Part 4: Direct RF power injection method
• Part 5: Workbench Faraday cage method
• Part 8: Measurement of radiated immunity – IC stripline method
• Part 9: Measurement of radiated immunity – Surface scan method
INTEGRATED CIRCUITS –
MEASUREMENT OF ELECTROMAGNETIC IMMUNITY –
Part 1: General conditions and definitions
1 Scope
This part of IEC 62132 provides general information and definitions about measurement of
electromagnetic immunity of integrated circuits (ICs) to conducted and radiated disturbances.
It also defines general test conditions, test equipment and setup, as well as the test
procedures and content of the test reports for all parts of the IEC 62132 series. Test method
comparison tables are included in Annex A to assist in selecting the appropriate measurement
method(s).
2 Normative references
The following documents, in whole or in part, are normatively referenced in this document and
are indispensable for its application. For dated references, only the edition cited applies. For
undated references, the latest edition of the referenced document (including any
amendments) applies.
IEC 62132-2, Integrated circuits – Measurement of electromagnetic immunity – Part 2:
Measurement of radiated immunity –TEM cell and wideband TEM cell method
IEC 62132-3, Integrated circuits – Measurement of electromagnetic immunity, 150 kHz to
1 GHz – Part 3: Bulk current injection (BCI) method
IEC 62132-4, Integrated circuits – Measurement of electromagnetic immunity, 150 kHz to
1 GHz – Part 4: Direct RF power injection method
IEC 62132-5, Integrated circuits – Measurement of electromagnetic immunity, 150 kHz to
1 GHz – Part 5: Workbench Faraday cage method
IEC 62132-8, Integrated circuits – Measurement of electromagnetic immunity – Part 8:
Measurement of radiated immunity –IC Stripline method
IEC TS 62132-9, Integrated circuits – Measurement of electromagnetic immunity – Part 9:
Measurement of radiated immunity – Surface scan method
3 Terms and definitions
For the purposes of this document, the following terms and definitions apply.
3.1
amplitude modulation
AM
process by which the amplitude of a periodic carrier wave is varied according to a specified
law
Note 1 to entry: This note applies to the French language only.
– 8 – IEC 62132-1:2015 © IEC 2015
[SOURCE: IEC 60050-314:2001, 314-08-01, modified – The abbreviation AM has been added
as a second preferred term, the existing note has been removed and a new Note 1 has been
added.]
3.2
artificial network
AN
network presenting a reference load impedance (simulated) to the DUT (e.g. extended power
or communication lines) across which the RF disturbance voltage can be measured and which
isolates the apparatus from the power supply or loads in a given frequency range
Note 1 to entry: This note applies to the French language only.
3.3
associated equipment
transducers (e.g. probes, networks and antennas) connected to a measuring receiver or test
generator; also transducers which are used in the signal or disturbance transmission path
between a DUT and measuring equipment or a (test) signal generator
3.4
auxiliary equipment
AE
equipment not under test that is nevertheless indispensable for setting up all the functions
and assessing the correct performance (operation) of the equipment under test (EUT) during
its exposure to the disturbance
3.5
bias tee
coupling device that allows the signal superposition of an RF signal to a DC signal to an
output port without affecting the RF path
3.6
common mode voltage
asymmetrical disturbance voltage
mean of the phasor voltages appearing between each conductor and a specified reference,
usually earth or frame
[SOURCE: IEC 60050-161:1990, 161-04-09, modified – The second preferred term
"asymmetrical voltage" has been removed and a new admittted term, "asymmetrical
disturbance voltage" has been added.]
3.7
common mode current
vector sum of the currents flowing through two or more conductors at a specified cross-
section of a plane intersected by these conductors
3.8
continuous wave
CW
waves, whose successive oscillations are identical under steady state conditions
Note 1 to entry: This note applies to the French language only.
3.9
coupling network
electrical circuit for transferring energy from one circuit to another with well-defined
impedances
3.10
decoupling network
electrical circuit for preventing test signals applied to the DUT from affecting other devices,
equipment or systems that are not under test
3.11
device under test
DUT
device, equipment or system being evaluated
Note 1 to entry: As used in this standard, DUT refers to the semiconductor device being tested.
Note 2 to entry: This note applies to the French language only.
3.12
die shrink
reduction of the die size by using an advanced fabrication process including a finer
lithography node and reduced masks
Note 1 to entry: The amount of die shrink of a mask used to produce an IC is expressed as a percentage or as
dimensions relative to the original artwork layout.
3.13
differential mode current
in a two-conductor cable, or two particular conductors in a multi-conductor cable, half the
magnitude of the difference of the phasors representing the currents in each conductor
[SOURCE: IEC 60050-161:1990/AMD2:1998, 161-04-38]
3.14
differential mode voltage
voltage between any two of a specified set of active conductors
[SOURCE: IEC 60050-161:1990, 161-04-08, modified – The second preferred term
"symmetrical voltage" has been removed.]
3.15
directional coupler
transmission coupling device for separately (ideally) sampling (through known coupling loss
for measuring purposes) either the forward (incident) or backward (reflected) waves in a
transmission line
3.16
electrically small PCB
printed circuit board with length and width shorter than λ/2, e.g. 100 mm to 150 mm at 1 GHz
3.17
electromagnetic compatibility
EMC
ability of an equipment or system to function satisfactorily in its electromagnetic environment
without introducing intolerable electromagnetic disturbances to anything in that environment
[SOURCE: IEC 60050-161:1990, 161-01-07]
3.18
forward power
amount of power that is sent from the RF source towards the (assumed matched) RF load
without considering the RF power that is being reflected backwards by the RF load
– 10 – IEC 62132-1:2015 © IEC 2015
3.19
ground plane
reference ground plane
flat conductive surface whose potential is used as a common reference
[SOURCE: IEC 60050-161:1990/AMD5:2015, 161-04-36, modified – The first preferred term
"ground plane" has been added, the abbreviation RGP has been removed, the definition has
been shortened and Notes 1 and 2 have been deleted.]
3.20
immunity
ability of a device, equipment or system to perform without degradation in
the presence of an electromagnetic disturbance
[SOURCE: IEC 60050-161:1990, 161-01-20]
3.21
injection network
coupling network to inject RF signals into a cable
3.22
peak power
maximum power level occurring on an AM RF signal measured over the time interval of the
(lowest LF) signal used for the amplitude modulation
Note 1 to entry: In the case of two-tone RF signals (to represent AM), the beat frequency should be considered
for the time interval.
3.23
reference port
specific port of the test setup to which the disturbance signal is applied
3.24
reflected power
power that is reflected backward by the RF load due to an impedance mismatch of the RF
load to the characteristic impedance of the transmission-line
3.25
radio frequency ambient
RF ambient
electromagnetic environment
totality of electromagnetic phenomena existing at a given location
[SOURCE: IEC 60050-161:1990/AMD1:1997, 161-01-01, modified – The preferred term has
been changed into an admitted term, two new preferred terms have been added and the Note
has been removed.]
3.26
RF power meter
measurement system to quantify the RF signal power as a function of time
3.27
shielded enclosure
mesh or sheet metallic housing designed expressly for the purpose of separating electro-
magnetically the internal and external environment
[SOURCE: IEC 60050-161:1990, 161-04-37, modified – The second preferred term "screened
room" has been removed.]
3.28
test generator
generator (RF-generator, modulation source, attenuators, broadband power amplifiers and
filters) capable of generating the required test signal
4 Test conditions
4.1 General
These default test conditions are intended to ensure a consistent test environment. If the
users of this procedure agree to use other values, they shall be documented in the test report.
4.2 Ambient conditions
4.2.1 Ambient temperature
The ambient temperature during the test shall be 23 °C ± 5 °C.
NOTE The RF immunity of some ICs is dependent on the ambient temperature.
4.2.2 RF ambient
The RF ambient noise level shall be at least 6 dB (typical) below the lowest level(s) of
intended immunity measurement, which shall be confirmed before the measurements. The
DUT shall be installed in the test setup with disenabled power supply. RF ambient shall be
described in the test report.
4.2.3 RF-immunity of the test setup
Before the test, all equipment used in the test setup, excluding the DUT, shall be checked to
ensure that it is sufficiently immune to the disturbance signal so as not to influence the test
results.
4.2.4 Other ambient conditions
All other ambient conditions that may affect the test result shall be stated in the individual test
report.
NOTE Even illumination would influence the test results when a semiconductor device is exposed in an open
ceramic IC package.
4.3 Test generator
Depending on applications and the desired test, various test signals (disturbance signals) can
be used:
– non-modulated RF signal (continuous wave);
– amplitude-modulated RF signal, e.g. according to IEC 61000-4-6 and IEC 61000-4-3;
– pulse-modulated RF signals , e.g. according to IEC 61000-4-3.
4.4 Frequency range
The recommended frequency range is 150 kHz to 1 GHz, and may be extended if the specific
procedure is applicable. The range of interest may be smaller depending on the application’s
requirement. The applicable frequency range is described in each part of IEC 62132.
– 12 – IEC 62132-1:2015 © IEC 2015
5 Test equipment
5.1 General
The equipment described in this Clause 5 is common to all test methods described in all parts
of IEC 62132. The unique parts of the test equipment are described in the individual test
procedures in each specific part.
5.2 Shielding
The shielding requirement depends upon the specific test method, the ambient noise level
and the sensitivity of other equipment used in the test setup. In general, the ambient RF noise
level should be at least 6 dB smaller than the applied disturbance signal so that a sufficient
margin is present. A shielded room may be required to provide sufficient attenuation to protect
operators, equipment and telecommunication services. Some measurement setups are
designed so that intrinsic shielding is built in. Specific measurement procedures are described
in each part of IEC 62132.
5.3 Test generator and power amplifier
The test generator shall supply the test signal as described in 4.3. The RF power amplifier
shall meet the requirements of the test procedures in other parts of IEC 62132. The amplitude
behaviour shall be linear and the distortions shall be less than –20 dBc (spurious signals are
20 dB below the RF carrier level) of the signal amplitude.
5.4 Other components
It shall be checked that cables, connectors and terminators included in the measurement path
meet the required characteristics over the intended frequency range.
It shall be checked that cables, connectors and terminators that are not in the measurement
path between the reference point and the input of the measuring instrument that may,
however, affect the measurement result, meet the required characteristics over the intended
frequency range.
6 Test setup
6.1 General
The test setup shall comply with the specific test procedure described in the respective part of
IEC 62132. All the relevant test parameters shall be recorded to ensure the reproducibility of
test results.
6.2 Test circuit board
The choice of test boards used for RF immunity testing depends on the measurement method
specified in IEC 62132. A general recommendation for the test board is given in Annex B. The
description of the test board shall be included in the test report. Test boards shall follow the
good layout practice described in other parts of IEC 62132.
As the interaction between the EM environment and the IC in immunity test is similar to the
interaction in the RF emission test, a similar test board can be used. The difference between
these boards is that output signals are monitored in immunity tests to find whether the IC is
affected by the RF disturbance.
6.3 Pin selection scheme
Pins that are considered to be subject to RF immunity testing are those connected to external
devices through cables, e.g.:
– actuator/sensor cables;
– supply cables;
– communication cables, e.g. for use with controller area network (CAN), RS 422/485,
unshielded twisted pairs (UTP) with ethernet, low voltage differential signalling (LVDS).
Pins that are connected by traces to active or passive devices on the application board are
not considered to be subject to RF immunity testing (see IEC 62132-3 and IEC 62132-4), e.g.:
– memory interfaces;
– crystal oscillator;
– chip select;
– biasing or current reference inputs with analogue part.
6.4 IC pin loading/termination
The pins of the DUT shall be loaded or terminated according to the default values given in
Table 1, including the parameters specified by the manufacturer. Pins that do not fall into any
of the categories listed in Table 1 shall be loaded as functionally required. Pin loading
conditions at the test shall be included in the test report.
Table 1 – IC pin loading default values
IC pin type Pin loading
Analogue
– Supply According to the device specification
– Input 10 kΩ to ground (V ) unless the IC is internally terminated
ss
– Output signal 10 kΩ to ground (V ) unless the IC is internally terminated
ss
– Output power Nominal loading as stated by the manufacturer
Digital
– Supply According to device specification
– Input
Ground (V ) or 10 kΩ to supply (V ) if the input cannot be grounded, unless the IC is
ss dd
internally terminated
– Output 47 pF to ground (V )
ss
Control
– Input
Ground (V ) or 10 kΩ to supply (V ) if the input cannot be grounded, unless the IC is
ss dd
internally terminated
– Output According to the device specification
– Bi-directional 47 pF to ground (V )
ss
– Analogue According to the device specification
6.5 Power supply requirements
The DUT shall be powered by the source immune from the applied test signal. If a battery is
used, it shall meet the IC requirements and provide the stable voltage level to maintain a
consistent operating environment. All power supply lines to the DUT shall be adequately
filtered according to the IC manufacturer’s recommendation.
6.6 IC specific considerations
6.6.1 IC supply voltage
The supply voltage(s) shall be as specified by the IC manufacturer with a tolerance of ±5 %.
– 14 – IEC 62132-1:2015 © IEC 2015
6.6.2 IC decoupling
The value and layout position of power supply decoupling capacitors shall be stated in the
test report. The decoupling of each supply pin of the DUT may be as advised by the
manufacturer.
NOTE A term, ”blocking capacitors,” is used instead of “supply decoupling capacitors” in IEC 62132-4.
6.6.3 Operation of IC
Attempts should be made to fully execute and test all relevant functions that significantly
contribute to the immunity of the IC.
For higher test throughput the IC may be put into a fixed operation mode to allow the
disturbance signal to be swept through the frequency range of interest. Asynchronous modes
of operation between the DUT and the RF disturbance signals are often appropriate to
represent real operating conditions.
When a relation between the activity of the IC and the test signal exists, it should be
documented in the test report.
6.6.4 Guidelines for IC stimulation
The intention is to describe the parameters to be controlled in order to assure test
reproducibility for the particular IC function or type, as agreed between the manufacturer and
user. If a programmable IC is to be tested, software that flows in a continuous loop shall be
prepared to assure that measurements are reproducible. The type of software used to drive
the IC (minimum, typical or worst case) shall be documented in the test report.
6.6.5 IC monitoring
IC monitoring is intended to monitor all relevant activity states without disturbing the immunity
performance.
6.7 IC stability over time
The functional behaviour of the IC shall be stable over the time required for the complete
measurement, in order to ensure the same results can be reproduced within the expected
measurement tolerances.
7 Test procedure
7.1 Monitoring check
Energize the DUT and complete an operational check for proper function of the DUT and
normal activity, and ensure proper function of the failure detection.
7.2 Human exposure
For open RF immunity tests without shielding structure or shielding enclosure, precautions
shall be taken not to exceed the applicable human exposure limits.
7.3 System verification
The DUT can be checked on various parameters or responses. Examples include:
– DC output voltage (e.g. voltage regulator);
– supply current (cross current may increase due to change of threshold voltages);
– demodulated audio frequency signal (e.g. audio amplifier, video);
– jitter (e.g. time base, logic gate, µCs, AD/DA-converters);
– spikes and glitches;
– system reset;
– system hang-up;
– latch-up.
7.4 Specific procedures
7.4.1 Frequency steps
The frequency range of these measurements is generally from 150 kHz to 1 GHz, and for
some methods it is beyond this range. The range of test frequency practically depends on the
cut-off frequencies of the injection network and test setup, e.g. IC-decoupling. Frequency step
size shall be selected according to Table 2. Refer to the other parts of IEC 62132 for the
particular immunity measurement procedures.
Table 2 – Frequency step size versus frequency range
Frequency range / MHz 0,15 – 1 1 – 100 100 – 1 000 1 000 – 10 000 ≥10 000
a
Linear steps / MHz
≤0,1 ≤1 ≤10 ≤20 ∆f
Logarithmic steps
≤5 % increment
a
The frequency step for the frequency range above 10 000 MHz is specified in each part of the IEC 62132
series, if necessary.
Critical frequencies such as clock frequencies, system frequencies of RF devices, etc. should
be tested in finer frequency steps, as agreed by the users of this procedure.
Above 1 GHz, resonances will be seen in most of the radiated and conducted immunity test
due to mechanical sizes of the test setups (cavity effects), test board (100 mm × 100 mm) or
from the DUT itself, e.g. die pad size, heat spreader, heat sink. The quality of these
resonances can be high. Responses from the DUT above 1 GHz are not related with the
functional operational frequencies of the device (or its multiples thereof), so that they shall be
ignored but recorded in the test report (with probable explanation on their cause(s)).
7.4.2 Amplitude modulation
The disturbance signal shall follow the test method chosen, e.g. CW (continuous wave), 80 %
amplitude modulated by a 1 kHz sine wave or pulse modulated wave.
7.4.3 Power levelling for modulation
Depending upon the definition of disturbance signal used in each part of the IEC 62132 series,
either the peak power of RF signal (see Figure 1) or the power of the RF carrier (common on
most RF generators) is maintained.
NOTE The application of the power-levelling method is different from the RF modulation used with product
immunity standards such as IEC 61000-4-3 and IEC 61000-4-6.
The basic requirement, when carrying out an immunity test, at a peak test level is that the
peak power of AM test signal shall have the same value as the peak power of continuous
wave, regardless of the modulation index m:
P = P
AM−Peak CW−Peak
– 16 – IEC 62132-1:2015 © IEC 2015
2+m
and P = P ⋅
AM CW
2(1+m)
AM 80 %
CW
IEC
(Max−Min)
NOTE For example: 80 % AM modulation (m = 0,8) results in: P = 0,407⋅P ,m=
AM CW
(Max+Min)
Figure 1 – RF signal when RF peak power level is maintained
7.4.4 Dwell time
The dwell time for each frequency step and modulation should be typically 1 s or at least the
time necessary for the DUT to respond, i.e. for the measurement system to record. The users
shall define the DUT response.
7.4.5 Monitoring of the IC
The specific test shall be performed in consideration of all operational functions. The levelling
of the test signal shall be controlled so that all critical reactions of the DUT are sensed (e.g.
hysteresis effects, reactions on level variations).
8 Test report
8.1 General
Tests should be performed according to the IC test plan which should be included in the test
report. This IC test plan should be defined to describe specific IC test parameters and the
responses considered. As an example, the IC test plan should include which IC pins are to be
tested, separately or together, and which immunity acceptance criteria should be used (see
also 8.3).
This report shall also include:
– circuit diagram of the application (supply decoupling, pin loading/terminations, peripheral
ICs, etc.);
– description of the test board on which the IC is applied (layout);
– actual operating conditions of the IC (supply voltage, output signals, etc.);
– description of the type of software exercising the IC(s), if applicable.
All deviations to the defined test conditions shall be documented in the test report.
Other particular requirements for the different test methods are described in the respective
parts.
8.2 Immunity limits or levels
Immunity test levels, criteria or limits depend upon the application and functional
requirements.
8.3 IC performance classes
The IC immunity can be classified by IC performance classes which slightly differ from
electronic unit performance classes as follows:
Class A : All monitored functions of the IC perform within the defined tolerances during and
IC
after exposure to disturbance.
Class B : Short time degradation of one or more monitored signals during exposure to
IC
disturbance is not evaluable for IC only. Therefore, this classification may not be
applicable for ICs.
NOTE Short time degradation of one or more monitored signa
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