IEC 62880-1:2017

Semiconductor devices - Stress migration test standard - Part 1: Copper stress migration test standard

IEC 62880-1:2017(E) describes a constant temperature (isothermal) aging method for testing copper (Cu) metallization test structures on microelectronics wafers for susceptibility to stress-induced voiding (SIV). This method is to be conducted primarily at the wafer level of production during technology development, and the results are to be used for lifetime prediction and failure analysis. Under some conditions, the method can be applied to package-level testing. This method is not intended to check production lots for shipment, because of the long test time.

General Information

• Status: Published
• Publication Date: 22-Aug-2017
• ICS: 01 - GENERALITIES. TERMINOLOGY. STANDARDIZATION. DOCUMENTATION
• ICS: 31.080.01 - Semiconductor devices in general
• Technical Committee: TC 47 - Semiconductor devices
• Drafting Committee: WG 5 - TC 47/WG 5
• Current Stage: PPUB - Publication issued
• Start Date: 16-Sep-2017
• Completion Date: 23-Aug-2017

Standards Content (Sample)

IEC 62880-1 ®
Edition 1.0 2017-08
INTERNATIONAL
STANDARD
colour
inside
Semiconductor devices – Stress migration test standard –
Part 1: Copper stress migration test standard
All rights reserved. Unless otherwise specified, no part of this publication may be reproduced or utilized in any form
or by any means, electronic or mechanical, including photocopying and microfilm, without permission in writing from
either IEC or IEC's member National Committee in the country of the requester. If you have any questions about IEC
copyright or have an enquiry about obtaining additional rights to this publication, please contact the address below or
your local IEC member National Committee for further information.

IEC Central Office Tel.: [phone]
3, rue de Varembé Fax: [phone]
CH-1211 Geneva 20 [e-mail]
Switzerland www.iec.ch
About the IEC
The International Electrotechnical Commission (IEC) is the leading global organization that prepares and publishes
International Standards for all electrical, electronic and related technologies.

About IEC publications
The technical content of IEC publications is kept under constant review by the IEC. Please make sure that you have the
latest edition, a corrigenda or an amendment might have been published.

IEC Catalogue - webstore.iec.ch/catalogue Electropedia - www.electropedia.org
The stand-alone application for consulting the entire The world's leading online dictionary of electronic and
bibliographical information on IEC International Standards, electrical terms containing 20 000 terms and definitions in
Technical Specifications, Technical Reports and other English and French, with equivalent terms in 16 additional
documents. Available for PC, Mac OS, Android Tablets and languages. Also known as the International Electrotechnical
iPad. Vocabulary (IEV) online.

IEC publications search - www.iec.ch/searchpub IEC Glossary - std.iec.ch/glossary
The advanced search enables to find IEC publications by a 65 000 electrotechnical terminology entries in English and
variety of criteria (reference number, text, technical French extracted from the Terms and Definitions clause of
committee,…). It also gives information on projects, replaced IEC publications issued since 2002. Some entries have been
and withdrawn publications. collected from earlier publications of IEC TC 37, 77, 86 and

CISPR.
IEC Just Published - webstore.iec.ch/justpublished

Stay up to date on all new IEC publications. Just Published IEC Customer Service Centre - webstore.iec.ch/csc
details all new publications released. Available online and If you wish to give us your feedback on this publication or
also once a month by email. need further assistance, please contact the Customer Service
Centre: [e-mail].
IEC 62880-1 ®
Edition 1.0 2017-08
INTERNATIONAL
STANDARD
colour
inside
Semiconductor devices – Stress migration test standard –

Part 1: Copper stress migration test standard

INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
ICS 31.080.01 ISBN 978-2-8322-4732-7

– 2 – IEC 62880-1:2017 © IEC 2017
CONTENTS
FOREWORD . 3
1 Scope . 5
2 Normative references . 5
3 Terms and definitions . 5
4 Test method . 7
4.1 Test structures . 7
4.2 Test equipment . 11
4.3 Test temperatures . 11
4.4 Test conditions, sample size and measurements. 11
4.5 Failure criteria . 11
4.6 Passing criteria . 11
5 Data to be reported. 12
Annex A (informative) Explanation for stress migration, stress induced voiding –
Temperature, geometry dependence . 13
A.1 Stress-induced voids . 13
A.2 Stress temperature . 13
A.3 Geometry linewidth dependence of SIV risk . 14
A.4 VIA size dependence of SIV risk . 16
A.5 SIV under multiple VIAs . 17
A.6 Metal thickness dependence of SIV risk . 17
A.7 SM lifetime model . 18
A.8 Sensitivity for test structure . 19
Annex B (informative) Example of geometry dependence for nose pattern . 21
B.1 General . 21
B.2 Geometry factor . 21
Bibliography . 23

Figure 1 – SM test structure sketches . 8
Figure 2 – SM test structure sketches – Illustrative sketches of proposed optional SM
test structures . 10
Figure A.1 – Temperature dependent behaviour of SM MTF values of 5 µm VIA chains
in the range of 125 ºC – 275 ºC . 14
Figure A.2 – Power-law relation of MTF vs linewidth . 15
Figure A.3 – Median time-to-fail SM data as a function of VIA sizes . 16
Figure A.4 – Hydrostatic stress gradient at near room temperatures vs VIA size (area) . 16
Figure A.5 – FA images of two VIA case and MTF vs multiple VIA of SM . 17
Figure A.6 – Metal thickness versus resistance increase under SM tests . 18
Figure A.7 – Stress profile of conventional and VIM VIA chains . 19
Figure A.8 – SM data of conventional and VIM VIA chains . 20
Figure B.1 – Representation of real product interconnect . 21
Figure B.2 – Representation of SM nose pattern . 21
Figure B.3 – Failure rate – Body area dependence with nose pattern . 22

INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________
SEMICONDUCTOR DEVICES –
STRESS MIGRATION TEST STANDARD –

Part 1: Copper stress migration test standard

FOREWORD
1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising
all national electrotechnical committees (IEC National Committees). The object of IEC is to promote
international co-operation on all questions concerning standardization in the electrical and electronic fields. To
this end and in addition to other activities, IEC publishes International Standards, Technical Specifications,
Technical Reports, Publicly Available Specifications (PAS) and Guides (hereafter referred to as “IEC
Publication(s)”). Their preparation is entrusted to technical committees; any IEC National Committee interested
in the subject dealt with may participate in this preparatory work. International, governmental and non-
governmental organizations liaising with the IEC also participate in this preparation. IEC collaborates closely
with the International Organization for Standardization (ISO) in accordance with conditions determined by
agreement between the two organizations.
2) The formal decisions or agreements of IEC on technical matters express, as nearly as possible, an international
consensus of opinion on the relevant subjects since each technical committee has representation from all
interested IEC National Committees.
3) IEC Publications have the form of recommendations for international use and are accepted by IEC National
Committees in that sense. While all reasonable efforts are made to ensure that the technical content of IEC
Publications is accurate, IEC cannot be held responsible for the way in which they are used or for any
misinterpretation by any end user.
4) In order to promote international uniformity, IEC National Committees undertake to apply IEC Publications
transparently to the maximum extent possible in their national and regional publications. Any divergence
between any IEC Publication and the corresponding national or regional publication shall be clearly indicated in
the latter.
5) IEC itself does not provide any attestation of conformity. Independent certification bodies provide conformity
assessment services and, in some areas, access to IEC marks of conformity. IEC is not responsible for any
services carried out by independent certification bodies.
6) All users should ensure that they have the latest edition of this publication.
7) No liability shall attach to IEC or its directors, employees, servants or agents including individual experts and
members of its technical committees and IEC National Committees for any personal injury, property damage or
other damage of any nature whatsoever, whether direct or indirect, or for costs (including legal fees) and
expenses arising out of the publication, use of, or reliance upon, this IEC Publication or any other IEC
Publications.
8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is
indispensable for the correct application of this publication.
9) Attention is drawn to the possibility that some of the elements of this IEC Publication may be the subject of
patent rights. IEC shall not be held responsible for identifying any or all such patent rights.
International Standard IEC 62880-1 has been prepared by IEC technical committee 47:
Semiconductor devices.
The text of this International Standard is based on the following documents:
FDIS Report on voting
47/2407/FDIS 47/2416/RVD
Full information on the voting for the approval of this International Standard can be found in
the report on voting indicated in the above table.
This document has been drafted in accordance with the ISO/IEC Directives, Part 2.

– 4 – IEC 62880-1:2017 © IEC 2017
A list of all parts in the IEC 62880 series, published under the general title Semiconductor
devices – Stress migration test standard, can be found on the IEC website.
The committee has decided that the contents of this document will remain unchanged until the
stability date indicated on the IEC website under "http://webstore.iec.ch" in the data related to
the specific document. At this date, the document will be
• reconfirmed,
• withdrawn,
• replaced by a revised edition, or
• amended.
A bilingual version of this publication may be issued at a later date.

IMPORTANT – The 'colour inside' logo on the cover page of this publication indicates
that it contains colours which are considered to be useful for the correct
understanding of its contents. Users should therefore print this document using a
colour printer.
SEMICONDUCTOR DEVICES –
STRESS MIGRATION TEST STANDARD –

Part 1: Copper stress migration test standard

1 Scope
This part of IEC 62880 describes a constant temperature (isothermal) aging method for
testing copper (Cu) metallization test structures on microelectronics wafers for susceptibility
to stress-induced voiding (SIV). This method is to be conducted primarily at the wafer level of
production during technology development, and the results are to be used for lifetime
prediction and failure analysis. Under some conditions, the method can be applied to
package-level testing. This method is not intended to check production lots for shipment,
because of the long test time.
Dual damascene Cu metallization systems usually have liners, such as tantalum (Ta) or
tantalum nitride (TaN) on the bottom and sides of trenches etched into dielectric layers.
Hence, for structures in which a single via contacts a wide line below it, a void under the via
can cause an open circuit at almost the same time as any percentage resistance shift that
would satisfy a failure criterion.
2 Normative references
There are no normative references in this document.
NOTE Related documents are listed in the Bibliography.
3 Terms and definitions
For the purposes of this document, the following terms and definitions apply.
ISO and IEC maintain terminological databases for use in standardization at the following
addresses:
• IEC Ele
...