IEC/IEEE 62659:2015
(Main)Nanomanufacturing - Large scale manufacturing for nanoelectronics
Nanomanufacturing - Large scale manufacturing for nanoelectronics
IEC/IEEE 62659:2015(E) provides a framework for introducing nanoelectronics into large scale, high volume production in semiconductor manufacturing facilities through the incorporation of nanomaterials (e.g. carbon nanotubes, graphene, quantum dots, etc.). Since semiconductor manufacturing facilities need to incorporate practices that maintain high yields, there are very strict requirements for how manufacturing is performed. Nanomaterials represent a potential contaminant in semiconductor manufacturing facilities and need to be introduced in a structured and methodical way.
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Standards Content (Sample)
IEC/IEEE 62659 ®
Edition 1.0 2015-09
INTERNATIONAL
STANDARD
Nanomanufacturing – Large scale manufacturing for nanoelectronics
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IEC/IEEE 62659 ®
Edition 1.0 2015-09
INTERNATIONAL
STANDARD
Nanomanufacturing – Large scale manufacturing for nanoelectronics
INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
ICS 07.030; 25.020 ISBN 978-2-8322-2915-6
– 2 – IEC/IEEE 62659:2015
IEC/IEEE 2015
CONTENTS
FOREWORD . 3
INTRODUCTION . 5
1 Scope . 6
2 Normative references . 6
3 Terms and definitions . 6
4 Abbreviations . 8
5 Nanomaterials incorporation into electronics fabrication . 9
5.1 General . 9
5.2 Raw materials acquisition . 10
5.3 Materials processing . 11
5.4 Design . 11
5.5 Fabrication . 11
5.6 Test . 11
5.7 End-use . 11
6 Safety and environmental issues . 11
Bibliography . 12
Figure 1 – Relationship between bottom-up, top-down and hybrid device fabrication
processes for nanoelectronics over length scales . 9
Table 1 – Bottom-up process for nanoelectronics . 9
Table 2 – Top-down process for nanoelectronics . 9
Table 3 – Comparison of CMOS processes with exemplary CNT electronics process . 10
IEC/IEEE 2015
INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________
NANOMANUFACTURING –
LARGE SCALE MANUFACTURING FOR NANOELECTRONICS
FOREWORD
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– 4 – IEC/IEEE 62659:2015
IEC/IEEE 2015
International Standard IEC/IEEE 62659 has been prepared by IEC technical committee 113,
Nanotechnology standardization for electrical and electronic products and systems, in
cooperation with the Standards Committee of the IEEE Nanotechnology Council , under the
IEC/IEEE Dual Logo Agreement.
The text of this standard is based on the following documents:
FDIS Report on voting
113/271/FDIS 113/280/RVD
Full information on the voting for the approval of this standard can be found in the report on
voting indicated in the above table.
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—————————
A list of IEEE participants can be found at the following URL: http://standards.ieee.org/downloads/62659/62659-
2015/62659-2015_wg-participants.pdf
IEC/IEEE 2015
INTRODUCTION
In order to fully benefit from the cost, performance, and flexibility of new electronics products
manufactured on a large-scale, industries accustomed to the purchase, use, and engineering
of continuum materials need to grow to embrace appropriate new practices at the nanoscale.
The purpose of this International Standard is to enable the quick, low-risk adoption of
nanomaterials into large-scale electronics manufacturing. In addition a best set of common
practices for use by semiconductor fabricators will be delineated.
The description of nanomaterials to be incorporated into the electronics process can be
described in terms of: composition (material), density, purity, size/dimensions, properties
such as electrical characteristics (conductive, non-conductive, and semiconductive),
associated media (delivery medium), fabrication, surface functionalization, particle size
distribution, surface area, shape, and degree of aggregation and agglomeration, etc.
These standards for the characterization of nanomaterials also provide an opportunity to help
ensure consistency in metrics and measurement methods when specifying or producing
nanomaterials for electronics applications. This is important when multiple vendors or
technology partners are
...
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