IEC/IEEE 62659:2015

Nanomanufacturing - Large scale manufacturing for nanoelectronics

IEC/IEEE 62659:2015(E) provides a framework for introducing nanoelectronics into large scale, high volume production in semiconductor manufacturing facilities through the incorporation of nanomaterials (e.g. carbon nanotubes, graphene, quantum dots, etc.). Since semiconductor manufacturing facilities need to incorporate practices that maintain high yields, there are very strict requirements for how manufacturing is performed. Nanomaterials represent a potential contaminant in semiconductor manufacturing facilities and need to be introduced in a structured and methodical way.

General Information

• Status: Published
• Publication Date: 29-Sep-2015
• ICS: 07.030 - Physics. Chemistry
• ICS: 07.120 - Nanotechnologies
• ICS: 25.020 - Manufacturing forming processes
• Technical Committee: TC 113 - Nanotechnology for electrotechnical products and systems
• Drafting Committee: WG 3 - TC 113/WG 3
• Current Stage: PPUB - Publication issued
• Start Date: 30-Sep-2015
• Completion Date: 31-Oct-2015

Overview

IEC/IEEE 62659:2015 - Nanomanufacturing: Large scale manufacturing for nanoelectronics provides a practical framework for safely and reliably introducing nanomaterials (for example, carbon nanotubes, graphene, quantum dots) into high-volume semiconductor manufacturing. The standard addresses the structured, methodical steps required to incorporate nanoscale materials and processes while protecting the strict contamination and yield requirements of modern fabs.

Key topics and requirements

• Scope and purpose: Framework to integrate nanoelectronics into existing large-scale fabrication environments with minimal yield risk.
• Supply‑chain stages covered: Raw materials acquisition, materials processing, device design, IC fabrication, test/qualification, and end‑use.
• Nanomaterial characterization: Guidance on describing materials by composition, density, purity, size/dimensions, electrical properties, delivery medium, surface functionalization, particle size distribution, surface area, shape, and aggregation.
• Manufacturing process types: Distinguishes bottom‑up, top‑down, and hybrid nanomanufacturing approaches and their relationship across length scales.
• Contamination and yield control: Emphasizes that nanomaterials can act as contaminants in fabs; introduces practices and sequencing to manage introduction without compromising yields.
• Safety and environmental considerations: Identifies the need to address potential health, safety and environmental risks when scaling nanomaterials in production.
• Definitions and terminology: Aligns with nanoscale/ nanotechnology terms (e.g., nanoscale, nano‑object, nanostructure) to ensure consistent communication across suppliers and fabs.

Applications and who uses this standard

IEC/IEEE 62659 is intended for stakeholders involved in scaling nanoelectronics from lab to fab-level production:

• Semiconductor foundries and fabrication process engineers - to plan and qualify nanomaterials in high-volume lines while protecting yield.
• Device and IC designers - to understand manufacturability constraints when specifying nanoscale materials or structures.
• Nanomaterial suppliers and OEMs - to provide consistent characterization and delivery media required by fabs.
• Quality, safety and environmental managers - to assess contamination control, workplace safety and lifecycle impacts.
• Standards bodies and regulatory reviewers - as a basis for interoperable technical practice in nanoelectronics manufacturing.

Related standards

• ISO/TS 80004 series (nanotechnology vocabulary and terminology) is referenced for terms and definitions; consult other IEC/IEEE nanotechnology standards for complementary guidance on measurement, testing and safety.

Keywords: IEC/IEEE 62659, nanomanufacturing, nanoelectronics, semiconductor manufacturing, nanomaterials, contamination control, high‑volume production, carbon nanotubes, graphene, quantum dots, materials characterization.

Standards Content (Sample)

IEC/IEEE 62659 ®
Edition 1.0 2015-09
INTERNATIONAL
STANDARD
Nanomanufacturing – Large scale manufacturing for nanoelectronics

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IEC/IEEE 62659 ®
Edition 1.0 2015-09
INTERNATIONAL
STANDARD
Nanomanufacturing – Large scale manufacturing for nanoelectronics

INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
ICS 07.030; 25.020 ISBN 978-2-8322-2915-6

– 2 – IEC/IEEE 62659:2015
 IEC/IEEE 2015
CONTENTS
FOREWORD . 3
INTRODUCTION . 5
1 Scope . 6
2 Normative references . 6
3 Terms and definitions . 6
4 Abbreviations . 8
5 Nanomaterials incorporation into electronics fabrication . 9
5.1 General . 9
5.2 Raw materials acquisition . 10
5.3 Materials processing . 11
5.4 Design . 11
5.5 Fabrication . 11
5.6 Test . 11
5.7 End-use . 11
6 Safety and environmental issues . 11
Bibliography . 12

Figure 1 – Relationship between bottom-up, top-down and hybrid device fabrication
processes for nanoelectronics over length scales . 9

Table 1 – Bottom-up process for nanoelectronics . 9
Table 2 – Top-down process for nanoelectronics . 9
Table 3 – Comparison of CMOS processes with exemplary CNT electronics process . 10

 IEC/IEEE 2015
INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________
NANOMANUFACTURING –
LARGE SCALE MANUFACTURING FOR NANOELECTRONICS

FOREWORD
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– 4 – IEC/IEEE 62659:2015
 IEC/IEEE 2015
International Standard IEC/IEEE 62659 has been prepared by IEC technical committee 113,
Nanotechnology standardization for electrical and electronic products and systems, in
cooperation with the Standards Committee of the IEEE Nanotechnology Council , under the
IEC/IEEE Dual Logo Agreement.
The text of this standard is based on the following documents:
FDIS Report on voting
113/271/FDIS 113/280/RVD
Full information on the voting for the approval of this standard can be found in the report on
voting indicated in the above table.
International Standards are drafted in accordance with the rules given in the ISO/IEC
Directives, Part 2.
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A bilingual version of this publication may be issued at a later date.

—————————
A list of IEEE participants can be found at the following URL: http://standards.ieee.org/downloads/62659/62659-
2015/62659-2015_wg-participants.pdf

 IEC/IEEE 2015
INTRODUCTION
In order to fully benefit from the cost, performance, and flexibility of new electronics products
manufactured on a large-scale, industries accustomed to the purchase, use, and engineering
of continuum materials need to grow to embrace appropriate new practices at the nanoscale.
The purpose of this International Standard is to enable the quick, low-risk adoption of
nanomaterials into large-scale electronics manufacturing. In addition a best set of common
practices for use by semiconductor fabricators will be delineated.
The description of nanomaterials to be incorporated into the electronics process can be
described in terms of: composition (material), density, purity, size/dimensions, properties
such as electrical characteristics (conductive, non-conductive, and semiconductive),
associated media (delivery medium), fabrication, surface functionalization, particle size
distribution, surface area, shape, and degree of aggregation and agglomeration, etc.
These standards for the characterization of nanomaterials also provide an opportunity to help
ensure consistency in metrics and measurement methods when specifying or producing
nanomaterials for electronics applications. This is important when multiple vendors or
technology partners are involved.

– 6 – IEC/IEEE 62659:2015
 IEC/IEEE 2015
NANOMANUFACTURING –
LARGE SCALE MANUFACTURING FOR NANOELECTRONICS

1 Scope
This International Standard provides a framework for introducing nanoelectronics into large
scale, high volume production in semiconductor manufacturing facilities through the
incorporation of nanomaterials (e.g. carbon nanotubes, graphene, quantum dots, etc.). Since
semiconductor manufacturing facilities need to incorporate practices that maintain high yields,
there are very strict requirements for how manufacturing is performed. Nanomaterials
represent a potential contaminant in semiconductor manufacturing facilities and need to be
introduced in a structured and methodical way.
This International Standard provides steps employed to facilitate the introduction of
nanomaterials into the semiconductor manufacturing facilities. This sequence is described
below under the areas of raw materials acquisition, materials processing, design, IC
fabrication, testing, and end-use. These activities represent the major stages of the supply
chain in semiconductor manufacturing facilities.
2 Normative references
...