ISO 21806-13:2021

Road vehicles - Media Oriented Systems Transport (MOST) - Part 13: 50-Mbit/s balanced media physical layer conformance test plan

This document specifies the conformance test plan for the 50-Mbit/s balanced media physical layer for MOST (MOST50 bPHY), a synchronous time-division-multiplexing network. This document specifies the basic conformance test measurement methods, relevant for verifying compatibility of networks, nodes, and MOST components with the requirements specified in ISO 21806-12.

Véhicules routiers — Système de transport axé sur les médias — Partie 13: Plan d'essais de conformité de la couche physique en milieu équilibré à 50-Mbit/s

General Information

• Status: Published
• Publication Date: 27-May-2021
• ICS: 43.040.15 - Car informatics. On board computer systems
• Technical Committee: ISO/TC 22/SC 31 - Data communication
• Drafting Committee: ISO/TC 22/SC 31/WG 3 - In-vehicle networks
• Current Stage: 6060 - International Standard published
• Start Date: 28-May-2021
• Due Date: 21-May-2022
• Completion Date: 28-May-2021

Overview

ISO 21806-13:2021 defines the conformance test plan for the 50-Mbit/s balanced media physical layer (MOST50 bPHY) of the Media Oriented Systems Transport (MOST) family. This ISO standard specifies the basic conformance measurement methods and test procedures needed to verify that MOST networks, nodes and components meet the physical-layer requirements referenced in ISO 21806-12. It targets the synchronous time-division-multiplexing (TDM) MOST network used for automotive multimedia and related applications.

Key topics and technical requirements

The standard focuses on measurable physical-layer properties and standardized test procedures, including:

• Operating conditions and measurement tools - required test environments and instrument accuracy for repeatable results.
• Electrical and balanced media characteristics - criteria such as RMS signal amplitude, power spectral density (PSD) of SP2 outputs, and detection thresholds for alignment and transferred jitter.
• Attenuation and impedance - procedures to measure attenuation of electrical interconnects and characteristic impedance of balanced media, and the effects on signal integrity.
• Receiver tolerance and RL of PCB interfaces - verification of receive margins and printed circuit board interface behavior.
• Phase variation and jitter measurement - methods for measuring alignment jitter and transferred jitter important for MOST timing and QoS.
• Test set-ups - standardized configurations for SP2 and SP3 link quality, receive tolerance, and limited-access conformance.
• Power-on / power-off behaviour - measuring EBC and BEC parameters and wake-up/shutdown functional tests.
• Annexes and normative elements - SP3 stress conditions (Annex B), test fixture guidance (Annex C), and test mode overviews (Annex D).

Practical applications and who uses it

ISO 21806-13:2021 is used to ensure interoperability, product quality and compliance in automotive multimedia networks. Typical users:

• Automotive OEMs and system architects validating MOST network deployments.
• Tier‑1 suppliers and module manufacturers designing MOST50 bPHY transceivers and cable assemblies.
• Test laboratories and certification bodies conducting conformance and compatibility testing.
• R&D and validation engineers performing signal‑integrity, jitter and impedance testing during development and production.

Related standards

• ISO 21806-12 - defines the MOST50 balanced media physical layer requirements (target for conformance verification).
• Other parts of the ISO 21806 series covering system layers, logical protocols and additional physical layers.

Keywords: ISO 21806-13:2021, MOST50 bPHY, 50-Mbit/s balanced media physical layer, conformance test plan, MOST, physical layer testing, automotive multimedia, jitter measurement, impedance testing.

Standards Content (Sample)

INTERNATIONAL ISO
STANDARD 21806-13
First edition
2021-05
Road vehicles — Media Oriented
Systems Transport (MOST) —
Part 13:
50-Mbit/s balanced media physical
layer conformance test plan
Véhicules routiers — Système de transport axé sur les médias —
Partie 13: Plan d'essais de conformité de la couche physique en milieu
équilibré à 50-Mbit/s
Reference number
©
ISO 2021
© ISO 2021
All rights reserved. Unless otherwise specified, or required in the context of its implementation, no part of this publication may
be reproduced or utilized otherwise in any form or by any means, electronic or mechanical, including photocopying, or posting
on the internet or an intranet, without prior written permission. Permission can be requested from either ISO at the address
below or ISO’s member body in the country of the requester.
ISO copyright office
CP 401 • Ch. de Blandonnet 8
CH-1214 Vernier, Geneva
Phone: [phone]
Email: [e-mail]
Website: www.iso.org
Published in Switzerland
ii © ISO 2021 – All rights reserved

Contents Page
Foreword .v
Introduction .vi
1 Scope . 1
2 Normative references . 1
3 Terms and definitions . 1
4 Symbols and abbreviated terms . 2
4.1 Symbols . 2
4.2 Abbreviated terms . 2
5 Conventions . 3
6 Operating conditions and measurement tools, requested accuracy .3
6.1 Operating conditions . 3
6.2 Apparatus — Measurement tools, requested accuracy . 3
7 Electrical characteristics . 4
8 Balanced media characteristics . 4
8.1 Threshold for detection of alignment and transferred jitter . 4
8.2 RMS signal amplitude . . 4
8.3 PSD of SP2 output signal . 5
8.4 Attenuation of electrical interconnect . 7
8.4.1 General. 7
8.4.2 Test procedure general . 8
8.4.3 Example set-up test procedure. 8
8.4.4 Test procedure for data acquisition. 8
8.4.5 Impact of attenuation on the data signal . 9
8.5 Characteristic impedance of balanced media .10
8.6 RL of PCB interfaces .13
8.7 Receive tolerance .15
8.7.1 General.15
8.7.2 Pattern generator .15
8.7.3 Arbitrary signal generator .16
8.7.4 Cable assembly or its analogue representation .16
8.7.5 Stimulus creation for SP3 .16
9 Measurement of phase variation .18
9.1 General .18
9.2 Measuring alignment jitter .20
9.3 Measuring transferred jitter .23
10 Test set-ups.26
10.1 General .26
10.2 Set-ups for SP2 link quality .26
10.3 Set-ups for SP3 link quality .28
10.4 Set-ups for SP3 receive tolerance .30
11 Power-on and power-off .31
11.1 General .31
11.2 Measuring EBC parameters .32
11.2.1 Measuring EBC parameters – Test set-up .32
11.2.2 Measuring EBC parameters – Signal charts .33
11.2.3 Measuring EBC parameters – Test sequences .33
11.3 Measuring BEC parameters .35
11.3.1 Measuring BEC parameters – Test set-up .35
11.3.2 Measuring BEC parameters – Signal chart .37
11.3.3 Measuring BEC parameters – Test sequences .37
12 Detecting bit rate (frequency reference) .40
13 System performance .41
13.1 General .41
13.2 SP3 receiver tolerance .41
13.3 TimingMaster delay tolerance .41
14 Conformance test of 50-Mbit/s balanced media physical layer .44
14.1 Location of interfaces .44
14.2 Control signals .44
14.3 Limited access to specification points .45
14.4 Parameter overview .45
15 Limited physical layer conformance .45
15.1 Overview .45
15.2 Test set-up .46
15.3 Generating test signals for the IUT input section SP3 .47
15.4 Analysis of test results .47
15.5 Test flow overview .47
15.6 Measurement of SP3 input signal of the IUT .48
15.7 Measurement of SP2 output signal of the IUT .49
15.8 Measurement of RL .49
15.9 Functional test of wake-up and shutdown .49
16 Direct physical measuring accuracy.50
Annex A (informative) Limited physical layer conformance for development tools .51
Annex B (normative) SP3 stress conditions .52
Annex C (informative) Test fixture .53
Annex D (informative) Overview on test modes .56
Bibliography .57
iv © ISO 2021 – All rights reserved

Foreword
ISO (the International Organization for Standardization) is a worldwide federation of national standards
bodies (ISO member bodies). The work of preparing International Standards is normally carried out
through ISO technical committees. Each member body interested in a subject for which a technical
committee has been established has the right to be represented on that committee. International
organizations, governmental and non-governmental, in liaison with ISO, also take part in the work.
ISO collaborates closely with the International Electrotechnical Commission (IEC) on all matters of
electrotechnical standardization.
The procedures used to develop this document and those intended for its further maintenance are
described in the ISO/IEC Directives, Part 1. In particular, the different approval criteria needed for the
different types of ISO documents should be noted. This document was drafted in accordance with the
editorial rules of the ISO/IEC Directives, Part 2 (see www .iso .org/ directives).
Attention is drawn to the possibility that some of the elements of this document may be the subject of
patent rights. ISO shall not be held responsible for identifying any or all such patent rights. Details of
any patent rights identified during the development of the document will be in the Introduction and/or
on the ISO list of patent declarations received (see www .iso .org/ patents).
Any trade name used in this document is information given for the convenience of users and does not
constitute an endorsement.
For an explanation of the voluntary nature of standards, the meaning of ISO specific terms and
expressions related to conformity assessment, as well as information about ISO's adherence to the
World Trade Organization (WTO) principles in the Technical Barriers to Trade (TBT), see www .iso .org/
iso/ foreword .html.
This document was prepared by Technical Committee ISO/TC 22, Road vehicles, Subcommittee SC 31,
Data communication.
A list of all parts in the ISO 21806 series can be found on the ISO website.
Any feedback or questions on this document should be directed to the user’s national standards body. A
complete listing of these bodies can be found at www .iso .org/ members .html.
Introduction
The Media Oriented Systems Transport (MOST) communication technology was initially developed at
the end of the 1990s in order to support complex audio applications in cars. The MOST Cooperation was
founded in 1998 with the goal to develop and enable the technology for the automotive industry. Today,
1)
MOST enables the transport of high Quality of Service (QoS) audio and video together with packet
data and real-time control to support modern automotive multimedia and similar applications. MOST is
a function-oriented communication technology to network a variety of multimedia devices comprising
one or more MOST nodes.
Figure 1 shows a MOST network example.
Figure 1 — MOST network example
The MOST communication technology provides:
— synchronous and isochronous streaming,
— small overhead for administrative communication control,
— a functional and hierarchical system model,
— API standardization through a function block (FBlock) framework,
— free partitioning of functionality to real devices,
— service discovery and notification, and
[2]
— flexibly scalable automotive-ready Ethernet communication according to ISO/IEC/IEEE 8802-3 .
MOST is a synchronous time-division-multiplexing (TDM) network that transports different data types
on separate channels at low latency. MOST supports different bit rates and physical layers. The network
clock is provided with a continuous data signal.
1) MOST® is the registered trademark of Microchip Technology Inc. This information is given for the convenience
of users of this document and does not constitute an endorsement by ISO.
vi © ISO 2021 – All rights reserved

Within the synchronous base data signal, the content of multiple streaming connections and control
data is transported. For streaming data connections, bandwidth is reserved to avoid interruptions,
collisions, or delays in the transport of the data stream.
MOST specifies mechanisms for sending anisochronous, packet-based data in addition to control data
and streaming data. The transmission of packet-based data is separated from the transmission of
control data and streaming data. None of them interfere with each other.
A MOST network consists of devices that are connected to one common control channel and packet
channel.
In summary, MOST is a network that has mechanisms to transport the various signals and data streams
that occur in multimedia and infotainment systems.
The ISO standards maintenance portal (https:// standards .iso .org/ iso/ ) provides references to MOST
specifications implemented in today's road vehicles because easy access via hyperlinks to these
specifications is necessary. It references documents that are normative or informative for the MOST
versions 4V0, 3V1, 3V0, and 2V5.
The ISO 21806 series has been established in order to specify requirements and recommendations
for implementing the MOST communication technology into multimedia devices and to provide
conformance test plans for implementing related test tools and test procedures.
To achieve this, the ISO 21806 series is based on the open systems interconnection (OSI) basic reference
[1] [3]
model in accordance with ISO/IEC 7498-1 and ISO/IEC 10731 , which structures communication
systems into seven layers as shown in Figure 2. Stream transmission applications use a direct stream
data interface (transparent) to the data link layer.
Figure 2 — The ISO 21806 series reference according to the OSI model
The International Organization for Standardization (ISO) draws attention to the fact that it is claimed
that compliance with this document may involve the use of a patent.
ISO takes no position concerning the evidence, validity and scope of this patent right.
The holder of this patent right has assured ISO that he/she is willing to negotiate licences under
reasonable and non-discriminatory terms and conditions with applicants throughout the world. In
this respect, the statement of the holder of this patent right is registered with ISO. Information may be
obtained from the patent database available at www .iso .org/ patents.
Attention is drawn to the possibility that some of the elements of this document may be the subject of
patent rights other than those in the patent database. ISO shall not be held responsible for identifying
any or all such patent rights.
viii © ISO 2021 – All rights reserved

INTERNATIONAL STANDARD ISO 21806-13:2021(E)
Road vehicles — Media Oriented Systems Transport
(MOST) —
Part 13:
50-Mbit/s balanced media physical layer conformance test
plan
1 Scope
This document specifies the conformance test plan for the 50-Mbit/s balanced media physical layer for
MOST (MOST50 bPHY), a synchronous time-division-multiplexing network.
This document specifies the basic conformance test measurement methods, relevant for verifying
compatibility of networks, nodes, and MOST components with the requirements specified in
ISO 21806-12.
2 Normative references
The following documents are referred to in the text in such a way that some or all of their content
constitutes requirements of this document. For dated references, only the edition cited applies. For
undated references, the latest edition of the referenced document (including any amendments) applies.
ISO 21806-1, Road vehicles — Media Oriented Systems Transport (MOST) — Part 1: General information
and definitions
ISO 21806-12, Road vehicles — Media Oriented Systems Transport (MOST) — Part 12: 50-Mbit/s balanced
media physical layer
EN 50289-1-8, Communication cables — Specifications for lest methods — Part 1-8: Electrical test
methods — Attenuation
EN 50289-1-11, Communication cables — Specifications for lest methods — Part 1-11: Electrical test
methods — Characteristic impedance, input impedance, return loss
2)
No JEDEC JESD8C.01, interface Standard for Nominal 3 V/3.3 V Supply Digital Integrated Circuits
3 Terms and definitions
For the purposes of this document, the terms and definitions given in ISO 21806-1, ISO 21806-12 and
the following apply.
ISO and IEC maintain terminological databases for use in standardization at the following addresses:
— ISO Online browsing platform: available at https:// www .iso .org/ obp
— IEC Electropedia: available at http:// www .electropedia .org/
2) Available at https:// www .jedec .org/ .
3.1
intersymbol interference
disturbance due to the overflowing into the signal element representing a wanted digit of signal
elements representing preceding or following digits
[SOURCE: IEC Electropedia, 702-08-33]
4 Symbols and abbreviated terms
4.1 Symbols
--- empty table cell or feature undefined
ε relative permittivity
r
F frequency
ρ bit rate
BR
ρ network frame rate
Fs
t time
T temperature
T ambient temperature
A
T typical temperature
Typ
4.2 Abbreviated terms
AFE analogue frontend
AJ alignment jitter
BALUN balanced-unbalanced
BEC balanced media to electrical converter
BR bitrate
BTR balanced media transceiver
BW bandwidth
Cfg configuration
CH channel
DC direct current
DSO digital sampling oscilloscope
EBC electrical to balanced media converter
FFT fast Fourier transformation
IUT implementation under test
2 © ISO 2021 – All rights reserved

MNC MOST network controller
PG pattern generator
PLL phase lock loop
PSD power spectral density
RBW resolution bandwidth
RMS root mean square
SP specification point
TDR time-domain reflectometer
TJ transferred jitter
UI unit interval
VNA vector network analyser
5 Conventions
[3]
This document is based on OSI service conventions as specified in ISO/IEC 10731 .
6 Operating conditions and measurement tools, requested accuracy
6.1 Operating conditions
Temperature range for MOST components: T = -40 °C to +105 °C according to ISO 21806-12:2021, 11.3.
A
Voltage range for MOST components: V and V , with an operating range of 3,3 V ± 0,165 V
CCCN CCSW
according to ISO 21806-12:2021, Clause 10.
NOTE There are functional requirements for the EBC within an extended voltage supply range according to
ISO 21806-12.
6.2 Apparatus — Measurement tools, requested accuracy
Apart from the measurement tools listed in this subclause, depending on the chosen test method and
method to generate stimuli for the test, further equipment is necessary (e.g. electrical attenuator,
discrete filter module to emulate cable transfer function). Performance requirements of such equipment
depend on the use case.
The following list provides the measurement tools.
6.2.1 Oscilloscope
— digital sampling oscilloscope;
— sampling rate ≥5 gigasample/s;
— bandwidth ≥1 GHz;
— sampling memory ≥10 megasample;
— active probe (single-ended, differential).
6.2.2 VNA or TDR (TDR bandwidth ≥3,5 GHz).
6.2.3 Ampere meter
— accuracy ≤2 µA;
— trigger input (for timing measurements).
6.2.4 Pattern generator for generating MOST50 bPHY stress pattern
— bandwidth 100 Mbit/s;
— trigger output (for timing measurements).
7 Electrical characteristics
LVTTL testing of MOST devices or MOST components shall be performed according to JEDEC No.
JESD8C.01.
8 Balanced media characteristics
8.1 Threshold for detection of alignment and transferred jitter
All jitter measurements are based on detection of edges in the data stream. The threshold for detecting
edges is set to 0 V of the differential signal (zero-crossing). DC offset in the measurements shall be
minimized as it may indirectly compromise timing-parameter results, see 10.2 and 10.3.
8.2 RMS signal amplitude
In ISO 21806-12:2021, 9.2, output signal power boundaries for SP2 and minimum input signal power at
SP3 are defined as RMS voltage.
A waveform, signal voltage over time, is acquired on an oscilloscope. The RMS voltage V is calculated
RMS
according to Formula (1).
N
V = Vi (1)
()
RMS ∑
N
i=1
where
V is the root-mean-square signal voltage;
RMS
N is the number of time steps with equidistant time interval;
V is the voltage amplitude at a specific time step;
i is the index of summation.
RMS signal voltage amplitude gives a representation of the average signal power P as specified in
av
Formula (2).
V
RMS
P = (2)
av
R
where
4 © ISO 2021 – All rights reserved

P is the average signal power in [W];
av
V is the root-mean-square signal voltage.
RMS
R resistance of 100 Ω.
In order to get to a representative average value, it requires a long-term observation. Depending
on the chosen SP2 and applied channel losses, intersymbol interference impact affects the signal to
be measured. It may lead to locally distributed RMS minima and maxima when choosing only short
snippets of the signal. The acquired waveform shall have a minimum length of 125 µs (125 µs equals six
frames with a frame rate of 48 kHz).
DC offset in the measurements shall be minimized as it may indirectly compromise RMS signal voltage
amplitude results, see 10.2 and 10.3.
8.3 PSD of SP2 output signal
PSD as specified in ISO 21806-12:2021, 9.2 is used as a link quality criterion at SP2. The main purpose is
to limit pulse shape variations and inherently limit the transmitted signal bandwidth.
Several measurement options are available to perform spectral signal analysis. A method using time-
domain data acquisition followed by FFT post-processing is given for reference. Other measurement
methods are permitted. In the case of discrepancies, the reference method shall be used.
PSD shall be measured with an RMS detector and using an effective RBW of 500 kHz. Besides directly
measuring PSD with 500 kHz resolution bandwidth, this can be achieved by using lower RBW setting
and averaging spectral results in the amount n of overlapping groups of the lower RBW bands to produce
the effect of 500 kHz RBW sliding window (linear scale), (i.e. measurement with RBW 10 kHz, averaged
in overlapping groups of fifty bands, therefore n = 50). To achieve statistical representation, the spectral
density results of multiple trace segments are averaged to form the final result. The number of trace
segments contributing to the averaged spectrum equals the sweep time.
The following is an example procedure for measuring PSD.
— The IUT transmitter sends multiple MOST50 bPHY PSD patterns.
— Differential signal at terminated SP2 is measured with a differential probe. Other methods to
measure a single ended representation of the differential signal are acceptable (e.g. use BALUN or use
test fixture with matched length 50 Ω coaxial cables, measured with 2 channels and mathematical
combination).
— An oscilloscope acquires the SP2 signal. To reduce noise in the measurement channel, it is
recommended to use an averaging technique for time domain data acquisition. Selecting oscilloscope
sampling rate and acquisition length leads to the inherent RBW for the acquisition, which is the
reciprocal of the acquired duration time. The appropriate duration can be achieved by adjusting
horizontal oscilloscope settings accordingly or by acquiring longer traces and slice the trace into
appropriate trace segments for the further processing.
— For further post-processing, FFT algorithm can be applied on the oscilloscope or via processing per
external script on a PC. In frequency domain, PSD is then formed as a moving average (linear scale)
of n consecutive samples of the inherent RBW bands.
— To achieve statistical representation, the spectral density results of multiple trace segments are
averaged to form the final result. The number of trace segments contributing to the averaged
spectrum equals the sweep time.
— Described procedure provides spectral density for consecutive 500 kHz bands in the relevant
frequency range and can be directly compared with the limit lines.
Configuration for a measurement example:
— acquisition length of 1 megasample with sampling rate 10 GHz results in a duration of 100 µs or
inherent RBW of 10 kHz,
— this results in an overlap of n = 50 inherent RBW bands to form effective RBW of 500 kHz,
— 100 iterations lead to a sweep time of 10 ms.
Figure 3 shows the example measurement for PSD.
Key
Y PSD [dBm/Hz]
F frequency [Hz]
1 example PSD
a
This is the upper limit of the PSD mask.
b
This is the lower limit of the PSD mask.
Figure 3 — Example measurement for PSD
PSD analysis may also be performed with a spectral analyser. The number of data points can also be
lower and not produce gapless data in the specified frequency range. Settings are applied that fit the
above described processing.
Figure 4 shows the test set-up for measuring PSD with an oscilloscope.
6 © ISO 2021 – All rights reserved

Key
1 MOST device
2 SP2
3 SP3
4 differential probe
5 oscilloscope
Figure 4 — Test set-up for measuring PSD with an oscilloscope
8.4 Attenuation of electrical interconnect
8.4.1 General
MOST50 bPHY limits the maximum attenuation for an electrical interconnect, formed of one or
more cable pieces and the associated couplers and harness connectors. The maximum total length
of the interconnect is 15 m. The attenuation of such an interconnect is frequency-dependent.
ISO 21806-12:2021, 9.3 specifies the maximum tolerable attenuation with a limit line in the frequency
range of 1 MHz to 66 MHz.
Figure 5 shows the test set-up for measuring attenuation of an electrical interconnect.
Key
1 VNA
2 metal plane (GND reference)
3 isolation layer
4 interconnect under test
Figure 5 — Test set-up for measuring attenuation of an electrical interconnect
8.4.2 Test procedure general
The evaluation of cable attenuation shall follow the principle as specified in EN 50289-1-8. This is
performed with a network analyser, using a 4-port arrangement.
8.4.3 Example set-up test procedure
A test fixture is being used to connect the differential cable system to the single ended measurement
equipment. For details see Annex C. The status of Annex C is informative.
When acquiring a complete set of the mixed mode scatter parameters (S-parameters) for an interconnect
under test, extract the magnitude of the transfer characteristic from differential port 1 to port 2 and
vice versa (differential insertion loss: SDD21 and SDD12) in dB-scale.
NOTE The cable attenuation varies with environmental conditions (e.g. temperature) and also depends on
production process, properties of used materials and stability of geometric properties. It also depends on the
way the interconnect under test is being arranged for the test.
The cable under test shall be placed on an arrangement with metal plane (GND-reference) at the bottom
and an isolation layer (thickness 10 mm, ε ≤ 1,4) on top. The cable shall be placed on top of the isolation
r
layer, the cable shall be laid out with a minimum distance of 30 mm between the cable portions (either
meander shaped on a flat plane or cable assembled on a conductive drum with a minimum distance to
each winding). GND of test fixture shall be connected to the metal plane.
8.4.4 Test procedure for data acquisition
Figure 6 shows the example measurement of attenuation of an electrical interconnect.
8 © ISO 2021 – All rights reserved

Key
A attenuation [dB]
F frequency [Hz]
1 example 1
2 example 2
3 attenuation limit
Figure 6 — Example measurement of attenuation of an electrical interconnect
8.4.5 Impact of attenuation on the data signal
The attenuation characteristic of electrical interconnect follows a function of frequency. Therefore, the
spectrum of a data signal being fed into such channel shall be attenuated in a non-uniform manner.
Attenuation affects high frequencies more than low frequencies. In consequence, transition times
decrease. Shorter pulses of the signal might not achieve full amplitude swing anymore. The effect is
called intersymbol interference.
The graph in Figure 7 gives an example: the SP2 signal starts with a nearly uniform amplitude on all
pulses. A small intersymbol interference effect is already visible, which is caused by AFE band-filtering.
The SP3 signal shows the resulting signal shape after having passed a typical electrical interconnect.
Additional intersymbol interference is visible.
Key
1 zoom of typical SP2 trace
2 typical SP2 trace – signal voltage amplitude V with the value of 545 mV
RMS
3 zoom of typical SP3 trace
4 typical SP3 trace – signal voltage amplitude V with the value of 437 mV
RMS
Figure 7 — Example measurement of impact of attenuation on data signal
8.5 Characteristic impedance of balanced media
Characteristic impedance of balanced media shall be determined using time domain reflectometer and
analysing the space-resolved wave resistance. Alternatively, frequency domain measurement results
can be taken and adequately transferred into time domain.
The minimum requirement to adequately evaluate the cable impedance in the context of the specified
application is given by the rise time of the time-domain reflectometry signal; it shall be <1 ns. This
considers a rise time that equals 0,35 divided by the maximum signal frequency, while the maximum
rd
signal frequency is assumed with 3 times the UI rate (3 harmonic). It is recommended to use a TDR
with at least 3,5 GHz bandwidth, which corresponds to a rise time of a maximum of 100 ps, and post-
filtering to adjust for MOST50 bPHY bandwidth requirements.
The TDR shall have two channels (CH1, CH2). The two channels shall be adjusted differentially. The near
end of the electrical interconnect under test is connected to the TDR. The two wires of the pair shall be
connected to the differential input of the measuring instrument. The two connection cables shall have
the same high-frequency characteristics and should match with respect to length, phase velocity and
attenuation. At the connection level, the ground potentials of the two lines shall be connected to one
another. The far end of the interconnect under test can remain open.
10 © ISO 2021 – All rights reserved

The TDR presents the result either as a differential impedance profile or as two single ended impedance
profiles. For two profiles, the differential impedance of the pair is the sum of the two individual
impedances as specified in Formula (3).
ZZ=+ Z (3)
0cable TDR_CH1TDR_CH2
where
Z is the characteristic impedance of the cable;
0cable
Z is the characteristic impedance of the TDR channel 1;
TDR_CH1
Z is the characteristic impedance of the TDR channel 2.
TDR_CH2
ISO 21806-12 does not define explicit requirements for impedance matching of connector and coupler
components. Therefore, it is permitted to gate out area around the connector components. The
interconnect under test shall be evaluated from both ends.
Figure 8 shows the test set-up for measuring characteristic impedance of balanced media, stimulating
the left end of the IUT.
Key
1 TDR
2 metal plane (GND reference)
3 interconnect under test
4 IUT with open end
5 isolation layer
Figure 8 — Test set-up for measuring characteristic impedance of balanced media,
stimulating left end of IUT
Figure 9 shows the test set-up for measuring characteristic impedance of balanced media, stimulating
the right end of the IUT.
Key
1 TDR
2 metal plane (GND reference)
3 interconnect under test
4 IUT with open end
5 isolation layer
Figure 9 — Test set-up for measuring characteristic impedance of balanced media,
stimulating right end of IUT
Figure 10 shows the example measurement for characteristic impedance of balanced media.
12 © ISO 2021 – All rights reserved

Key
t time
Y characteristic impedance
1 test fixture and connector
2 upper boundary
3 open end
4 lower boundary
Figure 10 — Example measurement for characteristic impedance of balanced media
8.6 RL of PCB interfaces
Signals going to or coming from balanced media interconnect are electrically connected on the PCB
and finally end at the transceivers. The combination of board traces, passive components and board
connector is summarized under the term analogue front-end (AFE). This portion of the link should
closely match the characteristic line impedance. Deviations in impedance matching cause reflections;
RL is the ratio between transmitted and the reflected signal energy.
ISO 21806-12:2021, 9.3 specifies a limit line in the frequency domain; the measurement, however, can be
done in time – or frequency domain. The measurement set-up is a differential single port configuration,
emitting a signal into the PCB interface under test (SP2 and SP3) and measuring the reflected energy.
The result shall be transferred to magnitude in dB scale and compared with the limit line.
A test fixture is being used to connect the differential cable system to the single ended measurement
equipment. For details see Annex C.
A precondition is that the ECU is configured for a test mode according to Table 1, which specifies the
conditions for RL measurement of PCB interfaces.
Table 1 — Conditions for RL measurement of PCB interfaces
Test mode Test case Condition
SP2 silent mode RL at SP2 Test mode shall ensure:
— EBC impedance with AFE impairment detectable;
— EBC does not emit data transitions.
SP3 silent mode RL at SP3 Test mode shall ensure:
— BEC impedance with AFE impairment detectable;
— no valid data signal present, while stimuli from TDR or VNA may occur.
NOTE  Based on the implementation of EBC and BEC functionality, the termination is detectable when the MNC is un-
powered, powered, or powered and configured specifically.
Figure 11 shows the measurement set-up for evaluation RL of PCB interfaces.
Key
1 VNA
2 SP2
3 SP3
4 test fixture
5 MOST device
Figure 11 — Measurement set-up for evaluation RL of PCB interfaces
ISO 21806-12 does not define specific requirements in resolution or scale of the frequency axis for RL.
NOTE It is solely in the responsibility of the supplier to apply appropriate settings.
Figure 12 shows a valid example plot of RL measurements for various PCB interfaces.
14 © ISO 2021 – All rights reserved

Key
F frequency [Hz]
Y return loss [dB]
1 limit line
2 example 1
3 example 2
4 example 3
5 example 4
Figure 12 — Example RL measurement of PCB interfaces
Time-domain reflectometry is another valuable method to evaluate impedance characteristic of such
PCB interfaces. A TDR sends a pulse into the PCB interface and measures the response in magnitude
and delay. The result usually is a plot of impedance over propagation time. For comparison with the
specified limit line, the TDR result is converted to the frequency domain.
8.7 Receive tolerance
8.7.1 General
Evaluation of a receive tolerance means to apply worst case signals to SP3 and check the ability of the
receiver to correctly recover clock and data. The challenge here is to find out what worst case means for
a receiver, which conditions are relevant, and how to create such scenarios.
For better visibility, the block diagrams in 8.7.2, 8.7.3, and 8.7.4 specify simplified set-ups.
8.7.2 Pattern generator
The pattern generator is used to create MOST patterns, mainly for SP2. Such a pattern generator shall
be able to create a signal that meets SP2 signal quality requirements (e.g. differential output signal,
variation within extremes of timing distortion, adjustable output voltage).
Figure 13 shows the graphical element that represents a pattern generator.
Figure 13 — Pattern generator
8.7.3 Arbitrary signal generator
The arbitrary signal generator is used to create MOST patterns, for SP2 and SP3.
The arbitrary signal generator is used to emulate pulse shape and timing, which includes signal
variations as produced by a differential
...