ISO 21806-12:2021

Road vehicles - Media Oriented Systems Transport (MOST) - Part 12: 50-Mbit/s balanced media physical layer

This document specifies the 50-Mbit/s balanced media physical layer for MOST (MOST50 bPHY), a synchronous time-division-multiplexing network. This document specifies the applicable constraints and defines interfaces and parameters, suitable for the development of products based on MOST50 bPHY. Such products include electrical interconnects, integrated receivers, transmitters, electrical to balanced media converters, and balanced media to electrical converters. This document also establishes basic measurement techniques and actual parameter values for MOST50 bPHY.

Véhicules routiers — Système de transport axé sur les médias — Partie 12: Couche physique de support équilibré à 50-Mbit/s

General Information

• Status: Published
• Publication Date: 27-May-2021
• ICS: 43.040.15 - Car informatics. On board computer systems
• Technical Committee: ISO/TC 22/SC 31 - Data communication
• Drafting Committee: ISO/TC 22/SC 31/WG 3 - In-vehicle networks
• Current Stage: 6060 - International Standard published
• Start Date: 28-May-2021
• Due Date: 21-May-2022
• Completion Date: 28-May-2021

Overview

ISO 21806-12:2021 specifies the 50-Mbit/s balanced media physical layer (MOST50 bPHY) for the Media Oriented Systems Transport (MOST) network used in road vehicles. The standard defines the physical-layer interfaces, constraints, parameters and measurement techniques needed to develop compatible hardware and interconnects for a synchronous time-division-multiplexing (TDM) automotive multimedia network. It is part of the ISO 21806 series that maps MOST technology to the OSI model for consistent implementation and conformance testing.

Key topics and technical requirements

The standard covers technical topics essential for designing and validating MOST50 bPHY devices and links, including:

• Physical layer service interface to the OSI data link layer (data types, event indications and action requests).
• Basic PHY requirements: logic terminology for single‑ended and differential signals, SP (signal path) definitions, and phase variation limits.
• Clock and timing: requirements on clock recovery, wander and jitter behavior, and timing master delay tolerance.
• Link quality and electrical characteristics: interconnect type, length, attenuation, characteristic impedance, return loss and receiver tolerance.
• MOST50 bPHY specifics: network coding, SP details, analogue frontend, and transceiver requirements.
• Measurement models and methods: golden PLL, jitter filter, stress patterns and specified measurement techniques with actual parameter values.
• Power sequencing: power‑on and power‑off behavior, power supply monitoring and transceiver power sequences (EBC/BEC/BTR).
• Environmental and network considerations relevant to automotive deployment.

Keywords present in the standard: ISO 21806-12, MOST50 bPHY, 50-Mbit/s balanced media physical layer, TDM, jitter, PLL, characteristic impedance, return loss, link quality.

Practical applications and who uses it

ISO 21806-12:2021 is intended for organizations implementing or testing MOST50 physical-layer components in automotive multimedia, infotainment and related systems:

• Automotive OEMs and Tier‑1 suppliers designing in‑vehicle networks and multimedia subsystems.
• Semiconductor and transceiver manufacturers creating integrated receivers, transmitters and PHY chips for MOST50.
• Cable and connector vendors producing balanced-media interconnects and converters (electrical ↔ balanced media).
• Test houses and labs developing conformance test procedures and measurement rigs for MOST50.
• System integrators ensuring interoperability and QoS for audio, video and control streams in vehicles.

Related standards

• Other parts of the ISO 21806 series (MOST protocol layers and conformance).
• OSI references: ISO/IEC 7498-1 and ISO/IEC 10731, referenced for OSI layer mapping.

ISO 21806-12 enables reliable design and validation of MOST50 physical-layer components, helping manufacturers meet automotive performance, timing and interoperability expectations for modern in‑vehicle multimedia systems.

Standards Content (Sample)

INTERNATIONAL ISO
STANDARD 21806-12
First edition
2021-05
Road vehicles — Media Oriented
Systems Transport (MOST) —
Part 12:
50-Mbit/s balanced media physical
layer
Véhicules routiers — Système de transport axé sur les médias —
Partie 12: Couche physique de support équilibré à 50-Mbit/s
Reference number
©
ISO 2021
© ISO 2021
All rights reserved. Unless otherwise specified, or required in the context of its implementation, no part of this publication may
be reproduced or utilized otherwise in any form or by any means, electronic or mechanical, including photocopying, or posting
on the internet or an intranet, without prior written permission. Permission can be requested from either ISO at the address
below or ISO’s member body in the country of the requester.
ISO copyright office
CP 401 • Ch. de Blandonnet 8
CH-1214 Vernier, Geneva
Phone: [phone]
Email: [e-mail]
Website: www.iso.org
Published in Switzerland
ii © ISO 2021 – All rights reserved

Contents Page
Foreword .v
Introduction .vi
1 Scope . 1
2 Normative references . 1
3 Terms and definitions . 1
4 Symbols and abbreviated terms . 2
4.1 Symbols . 2
4.2 Abbreviated terms . 2
5 Conventions . 3
6 Physical layer service interface to OSI data link layer . 3
6.1 Overview . 3
6.2 Data type definitions . 3
6.3 Event indications and action requests . 3
6.3.1 P_EVENT.INDICATE . 3
6.3.2 P_ACTION.REQUEST . 4
6.4 Parameters . 4
6.4.1 PHY_Event . 4
6.4.2 PHY_Request . . 4
7 Basic physical layer requirements . 5
7.1 Logic terminology . 5
7.1.1 Single-ended low-voltage digital signals . 5
7.1.2 Differential signals . 5
7.2 SPs . 5
7.3 Phase variation . 6
7.3.1 General. 6
7.3.2 Wander . 6
7.3.3 Jitter . 6
7.3.4 Clock recovery and reference clock . 7
7.3.5 Link quality . 8
7.3.6 MOST network quality .10
8 MOST50 bPHY requirements .13
8.1 General MOST network parameters .13
8.1.1 MOST network coding .13
8.1.2 Link and interconnect type .15
8.1.3 SP details . . .15
8.1.4 Analogue frontend .16
8.2 Models and measurement methods .17
8.2.1 Golden PLL .17
8.2.2 Jitter filter .18
8.2.3 Stress pattern .18
9 Link specifications .19
9.1 General .19
9.2 SP2 .19
9.3 Electrical link requirements .22
9.3.1 General.22
9.3.2 Electrical interconnect, length and attenuation .22
9.3.3 Characteristic impedance and return loss (RL) .23
9.4 SP3 .25
10 Power-on and power-off .26
10.1 Frequency reference and power supply .26
10.2 Power supply monitoring circuitry .27
10.3 Electrical transceiver EBC and BEC .27
10.3.1 General.27
10.3.2 BTR requirements.27
10.3.3 EBC requirements .28
10.3.4 EBC power-on and power-off sequence .29
10.3.5 BEC requirements .29
10.3.6 BEC power-on and power-off sequence .31
11 MOST network requirements .31
11.1 SP3 receiver tolerance .31
11.2 TimingMaster delay tolerance .32
11.3 Environmental considerations and requirements .32
12 Bit rate and frequency tolerance .33
Bibliography .34
iv © ISO 2021 – All rights reserved

Foreword
ISO (the International Organization for Standardization) is a worldwide federation of national standards
bodies (ISO member bodies). The work of preparing International Standards is normally carried out
through ISO technical committees. Each member body interested in a subject for which a technical
committee has been established has the right to be represented on that committee. International
organizations, governmental and non-governmental, in liaison with ISO, also take part in the work.
ISO collaborates closely with the International Electrotechnical Commission (IEC) on all matters of
electrotechnical standardization.
The procedures used to develop this document and those intended for its further maintenance are
described in the ISO/IEC Directives, Part 1. In particular, the different approval criteria needed for the
different types of ISO documents should be noted. This document was drafted in accordance with the
editorial rules of the ISO/IEC Directives, Part 2 (see www .iso .org/ directives).
Attention is drawn to the possibility that some of the elements of this document may be the subject of
patent rights. ISO shall not be held responsible for identifying any or all such patent rights. Details of
any patent rights identified during the development of the document will be in the Introduction and/or
on the ISO list of patent declarations received (see www .iso .org/ patents).
Any trade name used in this document is information given for the convenience of users and does not
constitute an endorsement.
For an explanation of the voluntary nature of standards, the meaning of ISO specific terms and
expressions related to conformity assessment, as well as information about ISO's adherence to the
World Trade Organization (WTO) principles in the Technical Barriers to Trade (TBT), see www .iso .org/
iso/ foreword .html.
This document was prepared by Technical Committee ISO/TC 22, Road vehicles, Subcommittee SC 31,
Data communication.
A list of all parts in the ISO 21806 series can be found on the ISO website.
Any feedback or questions on this document should be directed to the user’s national standards body. A
complete listing of these bodies can be found at www .iso .org/ members .html.
Introduction
The Media Oriented Systems Transport (MOST) communication technology was initially developed at
the end of the 1990s in order to support complex audio applications in cars. The MOST Cooperation was
founded in 1998 with the goal to develop and enable the technology for the automotive industry. Today,
1)
MOST enables the transport of high Quality of Service (QoS) audio and video together with packet
data and real-time control to support modern automotive multimedia and similar applications. MOST is
a function-oriented communication technology to network a variety of multimedia devices comprising
one or more MOST nodes.
Figure 1 shows a MOST network example.
Figure 1 — MOST network example
The MOST communication technology provides:
— synchronous and isochronous streaming,
— small overhead for administrative communication control,
— a functional and hierarchical system model,
— API standardization through a function block (FBlock) framework,
— free partitioning of functionality to real devices,
— service discovery and notification, and
[2]
— flexibly scalable automotive-ready Ethernet communication according to ISO/IEC/IEEE 8802-3 .
MOST is a synchronous time-division-multiplexing (TDM) network that transports different data types
on separate channels at low latency. MOST supports different bit rates and physical layers. The network
clock is provided with a continuous data signal.
1) MOST® is the registered trademark of Microchip Technology Inc. This information is given for the convenience
of users of this document and does not constitute an endorsement by ISO.
vi © ISO 2021 – All rights reserved

Within the synchronous base data signal, the content of multiple streaming connections and control
data is transported. For streaming data connections, bandwidth is reserved to avoid interruptions,
collisions, or delays in the transport of the data stream.
MOST specifies mechanisms for sending anisochronous, packet-based data in addition to control data
and streaming data. The transmission of packet-based data is separated from the transmission of
control data and streaming data. None of them interfere with each other.
A MOST network consists of devices that are connected to one common control channel and packet
channel.
In summary, MOST is a network that has mechanisms to transport the various signals and data streams
that occur in multimedia and infotainment systems.
The ISO standards maintenance portal (https://st andards .iso .org/i so/) p rovides references to MOST
specifications implemented in today's road vehicles because easy access via hyperlinks to these
specifications is necessary. It references documents that are normative or informative for the MOST
versions 4V0, 3V1, 3V0, and 2V5.
The ISO 21806 series has been established in order to specify requirements and recommendations
for implementing the MOST communication technology into multimedia devices and to provide
conformance test plans for implementing related test tools and test procedures.
To achieve this, the ISO 21806 series is based on the open systems interconnection (OSI) basic reference
[1] [3]
model in accordance with ISO/IEC 7498-1 and ISO/IEC 10731, which structures communication
systems into seven layers as shown in Figure 2. Stream transmission applications use a direct stream
data interface (transparent) to the data link layer.
Figure 2 — The ISO 21806 series reference according to the OSI model
The International Organization for Standardization (ISO) draws attention to the fact that it is claimed
that compliance with this document may involve the use of a patent.
ISO takes no position concerning the evidence, validity and scope of this patent right.
The holder of this patent right has assured ISO that he/she is willing to negotiate licences under
reasonable and non-discriminatory terms and conditions with applicants throughout the world. In
this respect, the statement of the holder of this patent right is registered with ISO. Information may be
obtained from the patent database available at www .iso .org/ patents.
Attention is drawn to the possibility that some of the elements of this document may be the subject of
patent rights other than those in the patent database. ISO shall not be held responsible for identifying
any or all such patent rights.
viii © ISO 2021 – All rights reserved

INTERNATIONAL STANDARD ISO 21806-12:2021(E)
Road vehicles — Media Oriented Systems Transport
(MOST) —
Part 12:
50-Mbit/s balanced media physical layer
1 Scope
This document specifies the 50-Mbit/s balanced media physical layer for MOST (MOST50 bPHY), a
synchronous time-division-multiplexing network.
This document specifies the applicable constraints and defines interfaces and parameters, suitable for
the development of products based on MOST50 bPHY. Such products include electrical interconnects,
integrated receivers, transmitters, electrical to balanced media converters, and balanced media to
electrical converters.
This document also establishes basic measurement techniques and actual parameter values for MOST50
bPHY.
2 Normative references
The following documents are referred to in the text in such a way that some or all of their content
constitutes requirements of this document. For dated references, only the edition cited applies. For
undated references, the latest edition of the referenced document (including any amendments) applies.
ISO 21806-1, Road vehicles — Media Oriented Systems Transport (MOST) — Part 1: General information
and definitions
2)
JEDEC No. JESD8C.01, Interface Standard for Nominal 3 V/3,3 V Supply Digital Integrated Circuits
3 Terms and definitions
For the purposes of this document, the terms and definitions given in ISO 21806-1 and the following
apply.
ISO and IEC maintain terminological databases for use in standardization at the following addresses:
— ISO Online browsing platform: available at https:// www .iso .org/ obp
— IEC Electropedia: available at http:// www .electropedia .org/
3.1
balanced media
BM
unshielded or shielded twisted pair cable
3.2
BEC
balanced media to electrical converter
MOST component that converts a balanced media (3.1) signal into an electrical signal
2) Available at https:// www .jedec .org/ .
3.3
EBC
electrical to balanced media converter
MOST component that converts an electrical signal into a balanced media (3.1) signal
4 Symbols and abbreviated terms
4.1 Symbols
--- empty table cell or feature undefined
J transferred jitter
tr
N number of bits per frame
BPF
ρ network frame rate
Fs
σ standard deviation
t TimingMaster delay tolerance
MDT
t unit interval
UI
ρ bit rate
BR
T ambient temperature
A
V output high voltage
OH
V output low voltage
OL
4.2 Abbreviated terms
AC alternating current
AFE analogue frontend
BEC balanced media to electrical converter
BM balanced media
BPF bits per frame
bPHY balanced media physical layer
BR bit rate
BTR balanced media transceiver
DC direct current
DCA DC adaptive
DDJ data-dependent jitter
DLL data link layer
DSV digital sum value
2 © ISO 2021 – All rights reserved

EBC electrical to balanced media converter
ECU electronic control unit
EMC electromagnetic compatibility
EMI electromagnetic interference
MNC MOST network controller
PCB printed circuit board
PDF probability density function
PHY physical layer
PLL phase locked loop
PSD power spectrum density
RBW resolution bandwidth
RL return loss
RMS root mean square
Rx data encoded digital bit stream being received
SP[n] specification point
Tx data encoded digital bit stream being transmitted
UI unit interval
5 Conventions
[3]
This document is based on OSI service conventions as specified in ISO/IEC 10731 .
6 Physical layer service interface to OSI data link layer
6.1 Overview
The physical layer (PHY) service interface specifies the abstract interface to the OSI data link layer
[4]
(DLL), see ISO 21806-6 .
6.2 Data type definitions
The data type Enum is defined as an 8-bit enumeration.
6.3 Event indications and action requests
6.3.1 P_EVENT.INDICATE
The PHY shall use P_EVENT.INDICATE to indicate the occurrence of an event to the DLL.
P_EVENT.INDICATE{
PHY_Event
}
6.3.2 P_ACTION.REQUEST
P_ACTION.REQUEST shall trigger the execution of a request.
P_ACTION.REQUEST {
PHY_Request
}
6.4 Parameters
6.4.1 PHY_Event
Table 1 specifies the PHY_Event parameter, which notifies the DLL about events.
Table 1 — Parameter passed from PHY to DLL
Parameter Data type Description
PHY_Event
Enum { An event that is reported to the DLL.
PHY_Output_Off,
PHY_Network_Activity
}
Table 2 specifies the parameter values for the PHY_Event Enum.
Table 2 — PHY_Event Enum values
Enum value Description
PHY_Output_Off
MNC transmit terminal is switched off.
PHY_Network_Activity
Network activity is detected at the MNC receive terminal.
6.4.2 PHY_Request
Table 3 specifies the PHY_Request parameter, which is passed from DLL to PHY.
Table 3 — Parameter passed from DLL to PHY
Parameter Data type Description
PHY_Request
Enum { A request from the DLL
cmd_Output_Off,
cmd_Output_On,
cmd_Open_Bypass,
}
Table 4 specifies the parameter values for the PHY_Request Enum.
Table 4 — PHY_Request Enum values
Enum value Description
cmd_Output_Off
Switching off the MNC transmit terminal is requested. By default, it is off.
cmd_Output_On
Switching on the MNC transmit terminal is requested. By default, it is off.
cmd_Open_Bypass
Opening the bypass is requested. By default, the bypass is closed.
4 © ISO 2021 – All rights reserved

7 Basic physical layer requirements
7.1 Logic terminology
7.1.1 Single-ended low-voltage digital signals
For the parameters provided in JEDEC No. JESD8C.01, Table 5 defines the corresponding terms for
single-ended signals used in this document. These terms are used to describe the logic states of signals
/RST and STATUS.
Table 5 — Terms for single-ended signals
Term Corresponding JEDEC parameter
Low
V (output low voltage)
OL
Logic 0
High
V (output high voltage)
OH
Logic 1
7.1.2 Differential signals
Table 6 explains the expressions used to describe the logic states of the differential data signals.
Table 6 — Differential signals
Expression Description
Disabled
The P and N terminals are in a high impedance state. Small leakage currents may exist which
can cause an indeterminate voltage on the line/load.
Off
Enabled Both the P and N terminals are driving the line / load. The outputs may be in a transitioning
phase or in the process to settle differential amplitude as well as common mode. The defined
On
link quality parameter requirements may not be met.
Valid MOST data DCA encoded data that meets defined link quality parameters and bit rate requirements.
7.2 SPs
A physical connection of two MOST devices is called a link. Measurements are taken at specific locations
along a link. These locations are called SPs. The location of the SPs is shown in Figure 3.
Key
1 SP1
2 SP2
3 SP3
4 SP4
Figure 3 — Location of SPs along a link
SPs define interfaces that are boundaries between a transmitting and a receiving MOST component.
For each of those interfaces, a set of requirements and properties is defined (e.g. signal timing, signal
amplitude, connector interface drawings). SP1 and SP4 are located between a MOST network controller
(MNC) and the corresponding transceiver. SP2 and SP3 are located between transceivers and a wiring
harness.
For MOST components that are located between two adjacent SPs, requirements and properties can
be derived. The definitions of the second SP of the pair specify the component's output performance to
be achieved, considering input conditions as defined in the first SP. For example, a transmit converter
component specification can be derived from SP1 and SP2. Receive converter component requirements
are covered by SP3 and SP4. Wiring harness requirements can be derived from SP2 and SP3.
In addition to the definitions of the SPs for a point-to-point link, this document defines requirements
covering the stability of the MOST network. Examples are requirements regarding jitter transfer
through MOST devices, jitter accumulation through the MOST network, and power state transitions.
The specified parameters in this document are minimum values to ensure functionality of the MOST
network in a wide range of environmental conditions.
7.3 Phase variation
7.3.1 General
Data stream timing and distortion cause phase variation.
7.3.2 Wander
Wander consists of any phase variation from 0 Hz to 10 Hz. All active MOST components in the MOST
network create wander. Wander is a function of the temperature drift and propagates from node to
node. Typically, wander does not affect alignment jitter eye masks.
NOTE It is possible that wander impacts the TimingMaster.
7.3.3 Jitter
Jitter is any phase variation of frequencies above 10 Hz. Every MOST component and the transmission
medium create jitter in the MOST network. Jitter is correlated or uncorrelated. The dominant jitter
sources in the MOST network consist of PLL noise, link-induced DDJ, sensitivity-induced BEC noise,
6 © ISO 2021 – All rights reserved

crosstalk, or phenomena such as power supply coupling. Data scrambling is used to eliminate DDJ
correlation between nodes.
There are two jitter categories as shown in Figure 4.
— Alignment jitter: jitter that affects the reception of data by degrading the receiver eye diagram
with horizontal closure (influences eye diagram measurement); it has impact only on a link as data
recovery is performed by the MNC.
— Transferred jitter: jitter that is accumulated over all links (does not influence eye diagram
measurement); the TimingMaster jitter tolerance shall be determined accordingly.
As the jitter on the measured signal increases, the eye closes more and more. A keep-out mask is
specified to detect possible error traces. If the eye does not hit the mask then data recovery is ensured.
Mask design depends on the required receiver margin and the characteristics of the channel.
Figure 4 shows the phase variation measurements.
Figure 4 — Phase variation measurements
7.3.4 Clock recovery and reference clock
7.3.4.1 General
Phase variation can be measured directly on a data stream. To view alignment jitter and transferred
jitter independently, special tools are required.
All MOST networks contain one device that implements the TimingMaster, which creates the reference
clock. This clock is embedded within the data stream. All other MOST devices contain TimingSlaves
that recover the clock from the data stream. Therefore, clock recovery is a basic functionality of an
MNC. MOST components add phase variation to the data stream. This degrades the reference clock.
Receiver jitter tolerance and jitter transfer are basic operation properties of any MNC. Alignment jitter
is measured by means of an eye diagram formed with a Golden PLL. Transferred jitter is measured with
a jitter filter.
Figure 5 illustrates clock recovery and data recovery in an MNC. Therefore, there is a need for a Golden
PLL model and a jitter filter model. Together they reflect the required jitter behaviour of an MNC.
Figure 5 — Clock and data recovery example
7.3.4.2 Golden PLL
The Golden PLL is a simplified model which represents the behaviour of the MNC when jitter is applied
to its input. A Golden PLL can be constructed out of hardware or software, but shall obtain data from
the SP and output a clock at the UI frequency for eye-diagram formation.
7.3.4.3 Jitter filter
The jitter filter is a simplified model which represents the worst-case MNC jitter transfer function. A
jitter filter can be constructed out of hardware or software but shall obtain data from the SP and output
the RMS value of the transferred jitter at the SP.
7.3.5 Link quality
7.3.5.1 General
Link quality describes the minimum performance of MOST components along a single link.
7.3.5.2 Alignment jitter
Link quality eye diagrams are used to specify and measure link operation and MOST network level
performance. A jitter budget is created top down starting from SP4. The difference between the SPs
gives the tolerable contribution of alignment jitter for the respective MOST component or transmission
medium. As an example, link quality eyes can be required at every point along the link to allow each
MOST component’s alignment jitter contribution to be specified. Figure 6 shows an example of the eye
diagrams that correspond to the SPs in a link.
8 © ISO 2021 – All rights reserved

Key
1 SP1
2 SP2
3 SP3
4 SP4
Figure 6 — Illustration of eye diagrams at SPs in a link
7.3.5.3 Transferred jitter
A portion of every jitter source in the MOST network has some spectral content below the jitter filter
bandwidth. Jitter passed by the filter accumulates in the following nodes. Transferred jitter from all
sources combines to form accumulated jitter. In the network, starting with the first TimingSlave,
accumulated jitter increases. Therefore, the total jitter at SP4 of the last MNC in the network consists
of the total jitter generated in the final link and the accumulated jitter from all the links before.
Transferred jitter is measured by filtering the phase variation at any SPn with a jitter filter. The RMS
(standard deviation) of the output of this jitter filter is the amount of jitter contributed to accumulated
jitter. Transferred jitter specifications are placed at every SP as shown in Figure 7.
Key
1 SP1
2 SP2
3 SP3
4 SP4
Figure 7 — Illustration of transferred jitter accumulation at various SPs in a link
7.3.6 MOST network quality
7.3.6.1 Receiver tolerance
Receiver tolerance describes the minimum alignment jitter tolerance of an MNC and the maximum
tolerable alignment jitter that may occur at any place in the MOST network.
The minimum and maximum limits of the eye mask define the receiver tolerance. The closure of the eye
mask originates from accumulated jitter in the MOST network. An MNC recovers all signals that fit into
the SP4 receiver tolerance mask. A MOST device recovers all signals that satisfy the SP3 link quality
requirements.
Figure 8 shows the typical SPs in a ring where the SP4 receiver tolerance limits can be applied as a test
of MOST network performance.
Key
1 SP4
Figure 8 — Locations where receiver tolerance eye mask can be applied
7.3.6.2 TimingMaster delay tolerance
The MOST network stability is determined by the ability of the TimingMaster node to tolerate the
accumulated delay present at the end of the ring. TimingMaster delay tolerance is the maximum amount
of accumulated delay for an MNC that is configured as TimingMaster.
TimingMaster delay tolerance is tied to the delay, transferred jitter, transferred wander and maximum
node count.
10 © ISO 2021 – All rights reserved

Formula (1) defines the minimum for the TimingMaster delay tolerance (t ). The relevance of the
MDT
delay respectively different types of phase variation on the accumulate delay is shown in Table 7.
m−1 m−1 m−1
tt≥ ()Mt+ ()nt+ ()nt++α× [t ()n ] (1)
MDTD ∑∑DW DMediumT∑ JJ
n=1 n=0 n=0
where
t is the TimingMaster delay tolerance;
MDT
M is the position of the TimingMaster;
m is the number of nodes in the network;
n is the position of the node in the network;
t (M) is the delay of the TimingMaster node caused by Rx and Tx converter;
D
t is the total delay caused by the medium;
D Medium
α is a scaling factor that depends on the BER, see Table 7;
t (n) is the delay of a TimingSlave node, see Table 7;
D
t (n) is the wander (phase drift) of the node and link (peak-to-peak);
W
t (n) is the transferred jitter of the node (RMS) (i.e. α = 12, derived from ± 6 σ for
TJ
-9
BER = 10 ).
Assumption
t is correlated from node to node;
W
t is uncorrelated from node to node.
TJ
Table 7 shows the purpose of the MOST network delay and jitter parameters that are combined in
Formula (1).
Table 7 — MOST network delay and jitter variables
Variable Formula Description
Delay of TimingMaster (2) t (M) is the delay caused by Rx and Tx converter of the TimingMaster node.
D
node
Delay of a TimingSlave (3) A MOST network operates properly if the TimingMaster complies with
node this formula.
Accumulation of delay of (4) t is the delay caused by the (m - 1) TimingSlave nodes. The delay per node
DS
TimingSlave nodes is determined by the contribution of Rx converter, MNC, and Tx converter.
Delay of the medium t It is the total delay caused by the medium (e.g. depending on the length of
D Medium
the medium in use).
Accumulation of (5) t is the accumulated wander of all nodes. Due to the low-frequency
W_SUM
wander characteristic of wander, either most or all of this phase variation is trans-
ferred by a PLL. Wander is generated by all active MOST components of the
link and by the MNC chip. Wander is most commonly caused by variations
in temperature. It shall be specified in the data sheet of each active MOST
component.
Table 7 (continued)
Variable Formula Description
Accumulation of (6) t is the accumulated transferred jitter of all nodes. Uncorrelated
TJ_SUM
transferred jitter jitter sources add according to their variance. Scrambled data eliminates
the correlation between DDJ on successive nodes. BEC noise and PLL noise
sources are typically uncorrelated as well. This peak-to-peak number can
be directly tied to a BER when the assumed jitter PDF is normal, e.g., α = 12
-9
in case of ±6 σ for BER = 10 .

tM()=tM()+tM() (2)
DDRx DTx
where
M is the position of the TimingMaster;
t (M) is the delay of the node caused by Rx and Tx converter;
D
t (M) is the delay of the TimingMaster node caused by Rx converter;
D Rx
t (M) is the delay of the TimingMaster node caused by Tx converter.
D Tx
tn()=tn()+tn()+tn() (3)
DDRx DMNC DTx
where
n is the position of the node in the network;
t (n) is the delay of a TimingSlave node, see Table 7;
D
t (n) is the delay of the node n caused by Rx converter;
D Rx
t (n) is the delay of the node n caused by MNC;
D MNC
t (n) is the delay of the node n caused by Tx converter.
D Tx
m−1
tt= ()n (4)
∑
DS D
n=1
where
t is the accumulated delay of the TimingSlave nodes;
DS
t (n) is the delay of a TimingSlave node;
D
n is the position of node in the network;
m is the number of nodes in the network.
12 © ISO 2021 – All rights reserved

m−1
tt= ()n (5)
WS_ UM ∑ W
n=0
where
t is the accumulated wander of all nodes;
W_SUM
t (n) is the wander (phase drift) per node and link (peak-to-peak);
W
n is the position of node in the network;
m is the number of nodes in the network.

m−1
tt=×α []n (6)
()
TJ_SUMT∑ J
n=0
where
t is the accumulated transferred jitter of all nodes;
TJ_SUM
t (n) is the transferred jitter per node (RMS) (i.e. α = 12, derived from ±6 σ for
TJ
-9
BER = 10 );
n is the position of node in the network;
m is the number of nodes in the network.
8 MOST50 bPHY requirements
8.1 General MOST network parameters
8.1.1 MOST network coding
8.1.1.1 General
The following subclauses describe a technique of encoding digital data called DCA coding, which shall
be used in MOST50 bPHY.
8.1.1.2 Pulse characteristics
The MOST50 bPHY signal is scrambled and encoded using DCA coding. Data pulses range from 2 UI to
6 UI, yielding five different pulse widths, as shown in Figure 9.
Figure 9 — Allowable pulse widths when using DCA coding
8.1.1.3 Unit interval definition
The unit interval (UI) width calculation is specified in Formula (7).
For MOST50 bPHY, there are 1 024 bits per frame (N ). Using Formula (7) for a frame rate of 48 kHz
BPF
results in a UI of 10,173 ns.
t = (7)
UI
ρ ××2 N
Fs BPF
where
t is the unit interval (UI);
UI
ρ is the network frame rate;
Fs
N is the bits per frame.
BPF
8.1.1.4 DC balance
DCA coding ensures absence of DC. Short-term imbalances in offset occur during data transmission.
These imbalances are tracked with a running total called the digital sum value (DSV). The DSV is
calculated by incrementing the sum for every UI where the level is logic 1 and decrementing the sum for
every UI where the level is logic 0. The calculation for DSV is illustrated in Figure 10.
Dynamic properties of DCA coding:
— the DSV is periodically driven to logic 0 at least once per frame;
— the range of DSV values in a valid DCA stream are {-5, -4, -3, -2, -1, 0, 1, 2, 3, 4, 5};
— the shortest DCA period is 4 UI;
— the longest DCA period is 10 UI;
— the data stream shall have a period of 10 UI at least once per frame. These 10 UI periods can either
be made of pulses that are 4 UI high/low with 6 UI low/high, 6 UI high/low with 4 UI low/high, or
5 UI high/low with 5 UI low/high.
Figure 10 shows the DSV calculation.
14 © ISO 2021 – All rights reserved

Figure 10 — DSV calculation
8.1.2 Link and interconnect type
MOST50 bPHY shall use automotive-grade balanced twisted pair cables and automotive-grade balanced
connectors. The interconnect shall be end-terminated by 100 Ω.
The system supports separate interconnects for transmit and receive links. The communication is
unidirectional using two separate ports and cables per node.
8.1.3 SP details
Table 8 defines the SP locations and interfaces.
Table 8 — SP locations and interfaces for integrated transceivers
Specification Point Location Interface
a
SP2 Signal at transmit port of balanced media interface analogue
a
SP3 Signal at receive port of balanced media interface analogue
a
See Figure 11.
Figure 11 shows the location of SPs.
Key
1 SP1
2 SP2
3 SP3
4 SP4
Figure 11 — General location of SPs
Systems that implement the MOST50 bPHY also implement components that convert electrical digital
signals into differential signals, optimized for feeding into balanced media, and vice versa. They are
called EBC (electrical to balanced media converter) and BEC (balanced media to electrical converter).
There is also an important section between transceiver pins and balanced media connector, containing
further passive circuitry, which is called analogue frontend (AFE).
For an optimized infrastructure, EBC and BEC are assumed to be integrated in the MNC. Inside the chip,
the converter portions are connected with the MNC Tx/Rx section. In consequence, SP1 and SP4 are
moving inside the MNC. There is no direct access possible. Therefore, this document omits definitions
of SP1 and SP4 and instead focuses on SP2 and SP3.
Suppliers of MNCs are responsible for specifying their product’s signal characteristics at the chip IOs,
EBC Tx and EBC Rx, and suggest AFEs, which allow implementers to achieve the MOST requirements for
SP2 and SP3.
Figure 12 illustrates a MOST50 bPHY interconnect. SP1, SP2, SP3, and SP4 indicate the forward signal
path.
Key
1 Tx: MNC transmit terminal
2 SP2
3 SP3
4 Rx: MNC receive terminal
5 in-line connectors
6 channel, balanced media
Figure 12 — Location of SPs
Table 9 describes the SP locations and interfaces for integrated transceivers
Table 9 — SP locations and interfaces for integrated transceivers
Specification Point Location Interface
SP2 Signal at transmit port of balanced media interface analogue
SP3 Signal at receive port of balanced media interface analogue
8.1.4 Analogue frontend
Suppliers of MNCs with balanced media transceivers provide a connection scheme that meets the
requirements for connection and layout of the transceivers wi
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