Semiconductor devices - Generic semiconductor qualification guidelines - Part 1: Guidelines for IC reliability qualification (IEC 63287-1:2021)

This part of IEC 63287 gives guidelines for reliability qualification plans of semiconductor
integrated circuit products. This document is not intended for military- and space-related
applications.
NOTE 1 The manufacturer can use flexible sample sizes to reduce cost and maintain reasonable reliability by this
guideline adaptation based on EDR-4708, AEC Q100, JESD47 or other relevant document can also be applicable if
it is specified.
NOTE 2 The Weibull distribution method used in this document is one of several methods to calculate the
appropriate sample size and test conditions of a given reliability project

Halbleiterbauelemente - Allgemeine Leitlinien für die Qualifikation von Halbleitern - Teil 1: Leitlinien für die IC-Zuverlässigkeitsqualifikation (IEC 63287-1:2021)

Dispositifs à semiconducteurs - Lignes directrices génériques concernant la qualification des semiconducteurs - Partie 1: Lignes directrices concernant la qualification de la fiabilité des circuits intégrés (IEC 63287-1:2021)

L’IEC 63287-1:2021 fournit des lignes directrices concernant les plans de qualification de la fiabilité des produits de CI à semiconducteurs. Le présent document n’est pas destiné aux applications militaires et spatiales.
NOTE 1 Le fabricant peut utiliser des tailles d’échantillons flexibles afin de réduire les coûts tout en maintenant une fiabilité raisonnable par l’adaptation des présentes lignes directrices fondées sur l’EDR-4708. S’ils sont spécifiés, les documents AEC Q100, JESD47 ou tout autre document pertinent spécifié peuvent également être applicables.
NOTE 2 La méthode de la loi de Weibull utilisée dans le présent document n’est qu’une méthode parmi d’autres permettant de calculer la taille d’échantillon et les conditions d’essai appropriées pour un projet de fiabilité donné.
Cette première édition de l’IEC 63287-1 annule et remplace la première édition de l’IEC 60749‑43 parue en 2017. Cette édition constitue une révision technique.
Cette édition inclut les modifications techniques majeures suivantes par rapport à l'édition précédente:


       
  1. le document a été renommé et renuméroté afin de le différencier de l’IEC 60749 (toutes les parties);

  2.    
  3. une nouvelle section portant sur le concept de famille a été ajoutée avec une renumérotation appropriée du texte existant.

Polprevodniški elementi - Splošne smernice za kvalifikacijo polprevodnikov - 1. del: Smernice za kvalifikacijo zanesljivosti IC (IEC 63287-1:2021)

General Information

Status
Published
Publication Date
13-Oct-2021
Technical Committee
Current Stage
6060 - National Implementation/Publication (Adopted Project)
Start Date
07-Oct-2021
Due Date
12-Dec-2021
Completion Date
14-Oct-2021

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SLOVENSKI STANDARD
SIST EN IEC 63287-1:2021
01-december-2021
Polprevodniški elementi - Splošne smernice za kvalifikacijo polprevodnikov - 1.
del: Smernice za kvalifikacijo zanesljivosti IC (IEC 63287-1:2021)
Semiconductor devices - Generic semiconductor qualification guidelines - Part 1:
Guidelines for IC reliability qualification (IEC 63287-1:2021)
Halbleiterbauelemente - Allgemeine Leitlinien für die Qualifikation von Halbleitern - Teil 1:
Leitlinien für die IC-Zuverlässigkeitsqualifikation (IEC 63287-1:2021)
Dispositifs à semiconducteurs - Lignes directrices génériques concernant la qualification
des semiconducteurs - Partie 1: Lignes directrices concernant la qualification de la
fiabilité des circuits intégrés (IEC 63287-1:2021)
Ta slovenski standard je istoveten z: EN IEC 63287-1:2021
ICS:
31.080.01 Polprevodniški elementi Semiconductor devices in
(naprave) na splošno general
SIST EN IEC 63287-1:2021 en
2003-01.Slovenski inštitut za standardizacijo. Razmnoževanje celote ali delov tega standarda ni dovoljeno.

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SIST EN IEC 63287-1:2021

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SIST EN IEC 63287-1:2021


EUROPEAN STANDARD EN IEC 63287-1

NORME EUROPÉENNE

EUROPÄISCHE NORM
October 2021
ICS 31.080.01

English Version
Semiconductor devices - Generic semiconductor qualification
guidelines - Part 1: Guidelines for IC reliability qualification
(IEC 63287-1:2021)
Dispositifs à semiconducteurs - Lignes directrices Halbleiterbauelemente - Allgemeine Leitlinien für die
génériques concernant la qualification des semiconducteurs Qualifikation von Halbleitern - Teil 1: Leitlinien für die IC-
- Partie 1: Lignes directrices concernant la qualification de Zuverlässigkeitsqualifikation
la fiabilité des circuits intégrés (IEC 63287-1:2021)
(IEC 63287-1:2021)
This European Standard was approved by CENELEC on 2021-09-29. CENELEC members are bound to comply with the CEN/CENELEC
Internal Regulations which stipulate the conditions for giving this European Standard the status of a national standard without any alteration.
Up-to-date lists and bibliographical references concerning such national standards may be obtained on application to the CEN-CENELEC
Management Centre or to any CENELEC member.
This European Standard exists in three official versions (English, French, German). A version in any other language made by translation
under the responsibility of a CENELEC member into its own language and notified to the CEN-CENELEC Management Centre has the
same status as the official versions.
CENELEC members are the national electrotechnical committees of Austria, Belgium, Bulgaria, Croatia, Cyprus, the Czech Republic,
Denmark, Estonia, Finland, France, Germany, Greece, Hungary, Iceland, Ireland, Italy, Latvia, Lithuania, Luxembourg, Malta, the
Netherlands, Norway, Poland, Portugal, Republic of North Macedonia, Romania, Serbia, Slovakia, Slovenia, Spain, Sweden, Switzerland,
Turkey and the United Kingdom.



European Committee for Electrotechnical Standardization
Comité Européen de Normalisation Electrotechnique
Europäisches Komitee für Elektrotechnische Normung
CEN-CENELEC Management Centre: Rue de la Science 23, B-1040 Brussels
© 2021 CENELEC All rights of exploitation in any form and by any means reserved worldwide for CENELEC Members.
 Ref. No. EN IEC 63287-1:2021 E

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SIST EN IEC 63287-1:2021
EN IEC 63287-1:2021 (E)
European foreword
The text of document 47/2703/FDIS, future edition 1 of IEC 63287-1, prepared by IEC/TC 47
"Semiconductor devices" was submitted to the IEC-CENELEC parallel vote and approved by
CENELEC as EN IEC 63287-1:2021.
The following dates are fixed:
• latest date by which the document has to be implemented at national (dop) 2022-06-29
level by publication of an identical national standard or by endorsement
• latest date by which the national standards conflicting with the (dow) 2024-09-29
document have to be withdrawn
Attention is drawn to the possibility that some of the elements of this document may be the subject of
patent rights. CENELEC shall not be held responsible for identifying any or all such patent rights.
Any feedback and questions on this document should be directed to the users’ national committee. A
complete listing of these bodies can be found on the CENELEC website.
Endorsement notice
The text of the International Standard IEC 63287-1:2021 was approved by CENELEC as a European
Standard without any modification.
In the official version, for Bibliography, the following notes have to be added for the standards
indicated:
IEC 60068-2-1 NOTE Harmonized as EN 60068-2-1
IEC 60068-2-30 NOTE Harmonized as EN 60068-2-30
IEC 60749-11 NOTE Harmonized as EN 60749-11

2

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SIST EN IEC 63287-1:2021
EN IEC 63287-1:2021 (E)
Annex ZA
(normative)

Normative references to international publications
with their corresponding European publications
The following documents are referred to in the text in such a way that some or all of their content
constitutes requirements of this document. For dated references, only the edition cited applies. For
undated references, the latest edition of the referenced document (including any amendments)
applies.
NOTE 1  Where an International Publication has been modified by common modifications, indicated by (mod), the relevant
EN/HD applies.
NOTE 2  Up-to-date information on the latest versions of the European Standards listed in this annex is available here:
www.cenelec.eu.
Publication Year Title EN/HD Year
IEC 60749-5 -  Semiconductor devices - Mechanical and EN 60749-5 -
climatic test methods - Part 5: Steady-state
temperature humidity bias life test
IEC 60749-6 -  Semiconductor devices - Mechanical and EN 60749-6 -
climatic test methods - Part 6: Storage at
high temperature
IEC 60749-15 -  Semiconductor devices - Mechanical and EN IEC 60749-15 -
climatic test methods - Part 15: Resistance
to soldering temperature for through-hole
mounted devices
IEC 60749-20 -  Semiconductor devices - Mechanical and EN IEC 60749-20 -
climatic test methods - Part 20: Resistance
of plastic encapsulated SMDs to the
combined effect of moisture and soldering
heat
IEC 60749-21 -  Semiconductor devices - Mechanical and EN 60749-21 -
climatic test methods - Part 21:
Solderability
IEC 60749-23 -  Semiconductor devices - Mechanical and EN 60749-23 -
climatic test methods - Part 23: High
temperature operating life
IEC 60749-25 -  Semiconductor devices - Mechanical and EN 60749-25 -
climatic test methods - Part 25:
Temperature cycling
IEC 60749-26 -  Semiconductor devices - Mechanical and EN IEC 60749-26 -
climatic test methods - Part 26:
Electrostatic discharge (ESD) sensitivity
testing - Human body model (HBM)
IEC 60749-28 -  Semiconductor devices - Mechanical and EN 60749-28 -
climatic test methods - Part 28:
Electrostatic discharge (ESD) sensitivity
testing - Charged device model (CDM) -
device level
IEC 60749-29 -  Semiconductor devices - Mechanical and EN 60749-29 -
climatic test methods - Part 29: Latch-up
test
3

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SIST EN IEC 63287-1:2021
EN IEC 63287-1:2021 (E)
IEC 60749-42 -  Semiconductor devices - Mechanical and EN 60749-42 -
climatic test methods - Part 42:
Temperature and humidity storage

4

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SIST EN IEC 63287-1:2021




IEC 63287-1

®


Edition 1.0 2021-08




INTERNATIONAL



STANDARD




NORME


INTERNATIONALE
colour

inside










Semiconductor devices – Generic semiconductor qualification guidelines –

Part 1: Guidelines for IC reliability qualification



Dispositifs à semiconducteurs – Lignes directrices génériques concernant la

qualification des semiconducteurs –

Partie 1: Lignes directrices concernant la qualification de la fiabilité des circuits


intégrés













INTERNATIONAL

ELECTROTECHNICAL

COMMISSION


COMMISSION

ELECTROTECHNIQUE


INTERNATIONALE




ICS 31.080.01 ISBN 978-2-8322-1017-2




Warning! Make sure that you obtained this publication from an authorized distributor.

Attention! Veuillez vous assurer que vous avez obtenu cette publication via un distributeur agréé.

® Registered trademark of the International Electrotechnical Commission
Marque déposée de la Commission Electrotechnique Internationale

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SIST EN IEC 63287-1:2021
– 2 – IEC 63287-1:2021 © IEC 2021
CONTENTS
FOREWORD . 4
INTRODUCTION . 6
1 Scope . 7
2 Normative references . 7
3 Terms and definitions . 8
4 Product categories and applications . 8
5 Failure . 9
5.1 Failure distribution . 9
5.2 Early failure . 10
5.2.1 Description . 10
5.2.2 Early failure rate . 11
5.2.3 Screening . 15
5.3 Random failure . 17
5.3.1 Description . 17
5.3.2 Mean failure rate . 18
5.4 Wear-out failure . 21
5.4.1 Description . 21
5.4.2 Wear-out failure rate . 21
6 Reliability test . 24
6.1 Reliability test description . 24
6.2 Reliability test plan . 24
6.2.1 Procedures for creating a reliability test plan . 24
6.2.2 Estimation of the test time required to confirm the TDDB from the
number of test samples . 27
6.2.3 Estimation of the number of samples required to confirm the TDDB from
the test time. 28
6.3 Reliability test methods . 29
6.4 Acceleration models for reliability tests . 33
6.4.1 Arrhenius model . 33
6.4.2 V-model . 33
6.4.3 Absolute water vapor pressure model . 33
6.4.4 Coffin-Manson model . 33
6.5 Concept of family . 34
6.5.1 General . 34
6.5.2 Conducting life test using family . 34
6.5.3 Verification of early failure rate using family . 37
7 Stress test methods . 39
8 Supplementary tests . 40
9 Summary table of assumptions . 40
10 Summary . 42
Bibliography . 43

Figure 1 – Bathtub curve . 10
Figure 2 – Failure process of IC manufacturing lots during the early failure period . 11
Figure 3 – Weibull conceptual diagram of the early failure rate . 12

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SIST EN IEC 63287-1:2021
IEC 63287-1:2021 © IEC 2021 – 3 –
Figure 4 – Example of a failure ratio: α (in hundreds) and the number of failures for CL
of 60 % . 14
Figure 5 – Screening and estimated early fail rate in Weibull diagram . 16
Figure 6 – Bathtub curve setting the point immediately after production as the origin . 17
Figure 7 – Bathtub curve setting the point after screening as the origin. 17
Figure 8 – Conceptual diagram of calculation method for the mean failure rate from the
exponential distribution . 18
Figure 9 – Conceptual diagram of calculation method for the mean failure rate as an
extension of early failure . 19
Figure 10 – Conceptual diagram of the wear-out failure . 21
Figure 11 – Conceptual diagram describing the concept of the acceleration test . 22
Figure 12 – Concept of the reliability test in a Weibull diagram (based on sample size) . 26
Figure 13 – Concept of the reliability test in a Weibull diagram (based on test time) . 29
Figure 14 – Difference in sampling sizes according to the m value (image) . 30
Figure 15 – How the screening defect rate is seen depending on the difference of chip
size (example) . 37

Table 1 – Examples of product categories . 9
–6
Table 2 – Cumulative failure probability 0,1 % over 10 years [×10 ] for the third, fifth
and seventh years . 26
Table 3 – Major reliability (life) test methods and purposes . 31
Table 4 – Examples of the number of test samples and the test time in typical reliability
(life) test methods . 32
Table 5 – Concept of family (example) . 34
Table 6 – Concept of difference/failure mechanism/corresponding test item (examples). 36
Table 7 – Factors for calculation examples of early failure rate using family data . 38
Table 8 – LTPD sampling table for acceptance number Ac = 0 . 39
Table 9 – Major reliability (strength) test methods and purposes . 39
Table 10 – Supplementary tests . 40
a
Table 11 – Accelerating factors, calculation formulae and numerical values . 41

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SIST EN IEC 63287-1:2021
– 4 – IEC 63287-1:2021 © IEC 2021
INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________

SEMICONDUCTOR DEVICES –
GENERIC SEMICONDUCTOR QUALIFICATION GUIDELINES –

Part 1: Guidelines for IC reliability qualification

FOREWORD
1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising
all national electrotechnical committees (IEC National Committees). The object of IEC is to promote
international co-operation on all questions concerning standardization in the electrical and electronic fields. To
this end and in addition to other activities, IEC publishes International Standards, Technical Specifications,
Technical Reports, Publicly Available Specifications (PAS) and Guides (hereafter referred to as "IEC
Publication(s)"). Their preparation is entrusted to technical committees; any IEC National Committee interested
in the subject dealt with may participate in this preparatory work. International, governmental and non-
governmental organizations liaising with the IEC also participate in this preparation. IEC collaborates closely
with the International Organization for Standardization (ISO) in accordance with conditions determined by
agreement between the two organizations.
2) The formal decisions or agreements of IEC on technical matters express, as nearly as possible, an international
consensus of opinion on the relevant subjects since each technical committee has representation from all
interested IEC National Committees.
3) IEC Publications have the form of recommendations for international use and are accepted by IEC National
Committees in that sense. While all reasonable efforts are made to ensure that the technical content of IEC
Publications is accurate, IEC cannot be held responsible for the way in which they are used or for any
misinterpretation by any end user.
4) In order to promote international uniformity, IEC National Committees undertake to apply IEC Publications
transparently to the maximum extent possible in their national and regional publications. Any divergence
between any IEC Publication and the corresponding national or regional publication shall be clearly indicated in
the latter.
5) IEC itself does not provide any attestation of conformity. Independent certification bodies provide conformity
assessment services and, in some areas, access to IEC marks of conformity. IEC is not responsible for any
services carried out by independent certification bodies.
6) All users should ensure that they have the latest edition of this publication.
7) No liability shall attach to IEC or its directors, employees, servants or agents including individual experts and
members of its technical committees and IEC National Committees for any personal injury, property damage or
other damage of any nature whatsoever, whether direct or indirect, or for costs (including legal fees) and
expenses arising out of the publication, use of, or reliance upon, this IEC Publication or any other IEC
Publications.
8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is
indispensable for the correct application of this publication.
9) Attention is drawn to the possibility that some of the elements of this IEC Publication may be the subject of
patent rights. IEC shall not be held responsible for identifying any or all such patent rights.
International Standard IEC 63287-1 has been prepared by IEC technical committee 47:
Semiconductor devices.
This first edition of IEC 63287-1 cancels and replaces the first edition of IEC 60749-43
published in 2017. This edition constitutes a technical revision.
This edition includes the following significant technical changes with respect to the previous
edition:
a) the document has been renamed and renumbered to distinguish it from the IEC 60749
(all parts);
b) a new section concerning the concept of "family" has been added with appropriate
renumbering of the existing text.

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SIST EN IEC 63287-1:2021
IEC 63287-1:2021 © IEC 2021 – 5 –
The text of this International Standard is based on the following documents:
DRAFT Report on voting
47/2703/FDIS 47/2720/RVD

Full information on the voting for its approval can be found in the report on voting indicated in
the above table.
The language used for the development of this International Standard is English.
This document was drafted in accordance with ISO/IEC Directives, Part 2, and developed in
accordance with ISO/IEC Directives, Part 1 and ISO/IEC Directives, IEC Supplement,
available at www.iec.ch/members_experts/refdocs. The main document types developed by
IEC are described in greater detail at www.iec.ch/standardsdev/publications.
A list of all parts in the IEC 63287 series, published under the general title Semiconductor,
devices – Generic semiconductor qualification guidelines, can be found on the IEC website.
The committee has decided that the contents of this document will remain unchanged until the
stability date indicated on the IEC website under webstore.iec.ch in the data related to the
specific document. At this date, the document will be
• reconfirmed,
• withdrawn,
• replaced by a revised edition, or
• amended.

IMPORTANT – The 'colour inside' logo on the cover page of this publication indicates that it
contains colours which are considered to be useful for the correct understanding of its
contents. Users should therefore print this document using a colour printer.

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SIST EN IEC 63287-1:2021
– 6 – IEC 63287-1:2021 © IEC 2021
INTRODUCTION
This document provides guidelines for semiconductor IC vendors in the preparation of
detailed reliability test plans for device qualification. Such plans are intended to be prepared
before commencing qualification tests and after consultation with the user of their
semiconductor integrated circuit product.
The guideline gives some examples for creating reliability qualification test plans to determine
appropriate reliability test conditions based on the use conditions and requirements for each
application of semiconductor integrated circuits. Categories are set for automotive
applications and for general applications as a target of reliability. The grade for automotive
use is further classified into two grades according to applications. The guideline assumes
annual operating hours, useful life, etc. for each grade, and defines the verification methods
for early failure rate and wear-out failure to propose appropriate reliability tests, and at the
same time, presents concepts to properly ensure the quality of semiconductor integrated
circuits using screening techniques which are designed to reduce the early failure rate.
The test conditions and the values of acceleration factors presented in this guideline are
shown to provide examples of calculations for obtaining reliability test conditions in order to
verify the required quality standards and are not designed to define the standards to ensure
reliability of semiconductor integrated circuits.
NOTE Qualification tests are tests in which the semiconductor vendor takes account of the reliability required by
its product users.

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SIST EN IEC 63287-1:2021
IEC 63287-1:2021 © IEC 2021 – 7 –
SEMICONDUCTOR DEVICES –
GENERIC SEMICONDUCTOR QUALIFICATION GUIDELINES –

Part 1: Guidelines for IC reliability qualification



1 Scope
This part of IEC 63287 gives guidelines for reliability qualification plans of semiconductor
integrated circuit products. This document is not intended for military- and space-related
applications.
NOTE 1 The manufacturer can use flexible sample sizes to reduce cost and maintain reasonable reliability by this
guideline adaptation based on EDR-4708, AEC Q100, JESD47 or other relevant document can also be applicable if
it is specified.
NOTE 2 The Weibull distribution method used in this document is one of several methods to calculate the
appropriate sample size and test conditions of a given reliability project.
2 Normative references
The following documents are referred to in the text in such a way that some or all of their
content constitutes requirements of this document. For dated references, only the edition
cited applies. For undated references, the latest edition of the referenced document (including
any amendments) applies.
IEC 60749-5, Semiconductor devices – Mechanical and climatic test methods – Part 5:
Steady-state temperature humidity bias life test
IEC 60749-6, Semiconductor devices – Mechanical and climatic test methods – Part 6:
Storage at high temperature
IEC 60749-15, Semiconductor devices – Mechanical and climatic test methods – Part 15:
Resistance to soldering temperature for through-hole mounted devices
IEC 60749-20, Semiconductor devices – Mechanical and climatic test methods – Part 20:
Resistance of plastic encapsulated SMDs to the combined effect of moisture and soldering
heat
IEC 60749-21, Semiconductor devices – Mechanical and climatic test methods – Part 21:
Solderability
IEC 60749-23, Semiconductor devices – Mechanical and climatic test methods – Part 23: High
temperature operating life
IEC 60749-25, Semiconductor devices – Mechanical and climatic test methods – Part 25:
Temperature cycling
IEC 60749-26, Semiconductor devices – Mechanical and climatic test methods – Part 26:
Electrostatic discharge (ESD) sensitivity testing – Human body model (HBM)
IEC 60749-28, Semiconductor devices – Mechanical and climatic test methods – Part 28:
Electrostatic discharge (ESD) sensitivity testing – Charged device model (CDM) – Device
level

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SIST EN IEC 63287-1:2021
– 8 – IEC 63287-1:2021 © IEC 2021
IEC 60749-29, Semiconductor devices – Mechanical and climatic test methods – Part 29:
Latch-up test
IEC 60749-42, Semiconductor devices – Mechanical and climatic test methods – Part 42:
Temperature and humidity storage
3 Terms and definitions
For the purposes of this document, the following terms and definitions apply.
ISO and IEC maintain terminological databases for use in standardization at the following
addresses:
• IEC Electropedia: available at http://www.electropedia.org/
• ISO Online browsing platform: available at http://www.iso.org/obp
3.1
failure mode
classification of a fault phenomenon which causes product failure
Note 1 to entry: Disconnection, a short circuit, occasional loss, abrasion, characteristic deterioration, etc. are
typical items considered as failure modes.
3.2
failure mechanism
physical, chemical or other process that results in a product failure to meet functional
requirements (or failure modes)
3.3
integrated circuit
IC
microcircuit in which all or some of the circuit elements are inseparably associated and
electrically interconnected so that it is considered to be indivisible for the purpose of
construction and commerce
Note 1 to entry: IEV:521-10-03
4 Product categories and applications
Quality-related requirements, operating hours, and field operating condition of ICs depend on
the applications of products in which they are used. As an example of creating scientific test
plans, their applications are broadly classified into three product categories: Automotive Use
A; Automotive Use B; and Consumer Use. Table 1 shows a list of quality-related requirements
according to each product category and the definition of their use conditions.

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SIST EN IEC 63287-1:2021
IEC 63287-1:2021 © IEC 2021 – 9 –
Table 1 – Examples of product categories
Category Automotive Use A Automotive Use B Consumer Use
Criteria for Applications for automotive Applications for automotive Home or office electronics,
category use directly relating to safety. use not directly relating to toys, appliances and server
(Failures can cause
safety. applications.
accidents.)
Examples of Powertrains, brakes, driving Navigation systems, car air- Home electronics, toys,
applications support systems, airbags conditioners, audio systems appliances
Annual 500 h 500 h Up to 8 760 h
operating hours
Differs depending on whether
...

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