SIST EN 60191-6-12:2005

Mechanical standardization of semiconductor devices -- Part 6-12: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for fine-pitch land grid array (FLGA) - Rectangular type

Provides common outline drawings and dimensions for all types of structures and composed materials of fine-pitch land grid array whose terminal pitch is less than, or equal to, 0,80 mm and whose package body outline is rectangular.

Mechanische Normung von Halbleiterbauelementen -- Teil 6-12: Allgemeine Regeln für die Erstellung von Gehäusezeichnungen von SMD-Halbleitergehäusen - Konstruktionsleitfaden für Feinraster-Land-Grid-Array (FLGA) - Rechteckige Ausführung

Normalisation mécanique des dispositifs à semiconducteurs -- Partie 6-12: Règles générales pour la préparation des dessins d'encombrement des dispositifs à semiconducteurs pour montage en surface - Guide de conception pour les boîtiers FLGA de type rectangulaire

Standardizacija mehanskih lastnosti polprevodniških elementov – 6-12. del: Splošna pravila za pripravo tehničnih risb okrovov polprevodniških elementov za površinsko montažo - Vodilo za konstruiranje drobne rasterske mreže priključkov v ravnini (FLGA) – Pravokotni tip (IEC 60191-6-12:2002)

General Information

• Status: Withdrawn
• Publication Date: 28-Feb-2005
• Withdrawal Date: 10-Jun-2014
• ICS: 01.100.25 - Electrical and electronics engineering drawings
• ICS: 31.080.01 - Semiconductor devices in general
• ICS: 31.240 - Mechanical structures for electronic equipment
• Technical Committee: SS EIT - Technical Board for the electrotechnical, information technology and telecommunications fields
• Current Stage: 9900 - Withdrawal (Adopted Project)
• Start Date: 11-Jun-2014
• Due Date: 04-Jul-2014
• Completion Date: 11-Jun-2014
• Ref Project: EN 60191-6-12:2002 - Mechanical standardization of semiconductor devices - Part 6-12: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for fine-pitch land grid array (FLGA) - Rectangular type

Relations

• Revised: SIST EN 60191-6-12:2011 - Mechanical standardization of semiconductor devices - Part 6-12: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for fine-pitch land grid array (FLGA)
• Effective Date: 06-May-2014
• Replaced By: SIST EN 60191-6-12:2011 - Mechanical standardization of semiconductor devices - Part 6-12: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for fine-pitch land grid array (FLGA)
• Effective Date: 07-Jun-2022
• Replaced By: SIST EN 60191-6-12:2011 - Mechanical standardization of semiconductor devices - Part 6-12: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for fine-pitch land grid array (FLGA)
• Effective Date: 28-Jan-2023
• Revised: SIST EN 60191-6-12:2011 - Mechanical standardization of semiconductor devices - Part 6-12: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for fine-pitch land grid array (FLGA)
• Effective Date: 12-Oct-2010

Standards Content (Sample)

SLOVENSKI STANDARD
SIST EN 60191-6-12:2005
01-marec-2005
6WDQGDUGL]DFLMDPHKDQVNLKODVWQRVWLSROSUHYRGQLãNLKHOHPHQWRY±GHO
6SORãQDSUDYLOD]DSULSUDYRWHKQLþQLKULVERNURYRYSROSUHYRGQLãNLKHOHPHQWRY]D
SRYUãLQVNRPRQWDåR9RGLOR]DNRQVWUXLUDQMHGUREQHUDVWHUVNHPUHåHSULNOMXþNRY
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Mechanical standardization of semiconductor devices -- Part 6-12: General rules for the
preparation of outline drawings of surface mounted semiconductor device packages -
Design guide for fine-pitch land grid array (FLGA) - Rectangular type
Mechanische Normung von Halbleiterbauelementen -- Teil 6-12: Allgemeine Regeln für
die Erstellung von Gehäusezeichnungen von SMD-Halbleitergehäusen -
Konstruktionsleitfaden für Feinraster-Land-Grid-Array (FLGA) - Rechteckige Ausführung
Normalisation mécanique des dispositifs à semiconducteurs -- Partie 6-12: Règles
générales pour la préparation des dessins d'encombrement des dispositifs à
semiconducteurs pour montage en surface - Guide de conception pour les boîtiers FLGA
de type rectangulaire
Ta slovenski standard je istoveten z: EN 60191-6-12:2002
ICS:
01.100.25 5LVEHVSRGURþMD Electrical and electronics
HOHNWURWHKQLNHLQHOHNWURQLNH engineering drawings
31.080.01 Polprevodniški elementi Semiconductor devices in
(naprave) na splošno general
31.240 Mehanske konstrukcije za Mechanical structures for
elektronsko opremo electronic equipment
SIST EN 60191-6-12:2005 en
2003-01.Slovenski inštitut za standardizacijo. Razmnoževanje celote ali delov tega standarda ni dovoljeno.

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SIST EN 60191-6-12:2005

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SIST EN 60191-6-12:2005
EUROPEAN STANDARD EN 60191-6-12
NORME EUROPÉENNE
EUROPÄISCHE NORM July 2002
ICS 31.080.01
English version
Mechanical standardization of semiconductor devices
Part 6-12: General rules for the preparation of outline drawings
of surface mounted semiconductor device packages -
Design guide for fine-pitch land grid array (FLGA) -
Rectangular type
(IEC 60191-6-12:2002)
Normalisation mécanique Mechanische Normung
des dispositifs à semiconducteurs von Halbleiterbauelementen
Partie 6-12: Règles générales pour la Teil 6-12: Allgemeine Regeln für die
préparation des dessins d'encombrement Erstellung von Gehäusezeichnungen
des dispositifs à semiconducteurs von SMD-Halbleitergehäusen -
pour montage en surface - Konstruktionsleitfaden für Feinraster-
Guide de conception pour les boîtiers Land-Grid-Array (FLGA) -
FLGA de type rectangulaire Rechteckige Ausführung
(CEI 60191-6-12:2002) (IEC 60191-6-12:2002)
This European Standard was approved by CENELEC on 2002-07-01. CENELEC members are bound to
comply with the CEN/CENELEC Internal Regulations which stipulate the conditions for giving this European
Standard the status of a national standard without any alteration.
Up-to-date lists and bibliographical references concerning such national standards may be obtained on
application to the Central Secretariat or to any CENELEC member.
This European Standard exists in three official versions (English, French, German). A version in any other
language made by translation under the responsibility of a CENELEC member into its own language and
notified to the Central Secretariat has the same status as the official versions.
CENELEC members are the national electrotechnical committees of Austria, Belgium, Czech Republic,
Denmark, Finland, France, Germany, Greece, Hungary, Iceland, Ireland, Italy, Luxembourg, Malta,
Netherlands, Norway, Portugal, Slovakia, Spain, Sweden, Switzerland and United Kingdom.
CENELEC
European Committee for Electrotechnical Standardization
Comité Européen de Normalisation Electrotechnique
Europäisches Komitee für Elektrotechnische Normung
Central Secretariat: rue de Stassart 35, B - 1050 Brussels
© 2002 CENELEC - All rights of exploitation in any form and by any means reserved worldwide for CENELEC members.
Ref. No. EN 60191-6-12:2002 E

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SIST EN 60191-6-12:2005
EN 60191-6-12:2002 - 2 -
Foreword
The text of document 47D/493/FDIS, future edition 1 of IEC 60191-6-12, prepared by SC 47D,
Mechanical standardization of semiconductor devices, of IEC TC 47, Semiconductor devices, was
submitted to the IEC-CENELEC parallel vote and was approved by CENELEC as EN 60191-6-12 on
2002-07-01.
The following dates were fixed:
– latest date by which the EN has to be implemented
at national level by publication of an identical
national standard or by endorsement (dop) 2003-04-01
– latest date by which the national standards conflicting
with the EN have to be withdrawn (dow) 2005-07-01
Annexes designated "normative" are part of the body of the standard.
In this standard, annex ZA is normative.
Annex ZA has been added by CENELEC.
__________
Endorsement notice
The text of the International Standard IEC 60191-6-12:2002 was approved by CENELEC as a
European Standard without any modification.
__________

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SIST EN 60191-6-12:2005
- 3 - EN 60191-6-12:2002
Annex ZA
(normative)
Normative references to international publications
with their corresponding European publications
This European Standard incorporates by dated or undated reference, provisions from other
publications. These normative references are cited at the appropriate places in the text and the
publications are listed hereafter. For dated references, subsequent amendments to or revisions of any
of these publications apply to this European Standard only when incorporated in it by amendment or
revision. For undated references the latest edition of the publication referred to applies (including
amendments).
NOTE When an international publication has been modified by common modifications, indicated by (mod), the relevant
EN/HD applies.
Publication Year Title EN/HD Year
IEC 60191 Series Mechanical standardization of EN 60191 Series
semiconductor devices

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SIST EN 60191-6-12:2005

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SIST EN 60191-6-12:2005
INTERNATIONAL IEC
STANDARD
60191-6-12
First edition
2002-06
Mechanical standardization of semiconductor devices –
Part 6-12:
General rules for the preparation of outline drawings
of surface mounted semiconductor device packages –
Design guide for fine-pitch land grid array (FLGA) –
Rectangular type
Normalisation mécanique des dispositifs à semiconducteurs –
Partie 6-12:
Règles générales pour la préparation des dessins
d'encombrement des dispositifs à semiconducteurs
pour montage en surface –
Guide de conception pour les boîtiers FLGA
de type rectangulaire
 IEC 2002  Copyright - all rights reserved
No part of this publication may be reproduced or utilized in any form or by any means, electronic or
mechanical, including photocopying and microfilm, without permission in writing from the publisher.
International Electrotechnical Commission, 3, rue de Varembé, PO Box 131, CH-1211 Geneva 20, Switzerland
Telephone: [phone] Telefax: [phone] E-mail: [e-mail]  Web: www.iec.ch
PRICE CODE
Commission Electrotechnique Internationale
R
International Electrotechnical Commission
Международная Электротехническая Комиссия
For price, see current catalogue

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SIST EN 60191-6-12:2005
– 2 – 60191-6-12 © IEC:2002(E)
CONTENTS
FOREWORD.3
INTRODUCTION.4
1 Scope.5
2 Normative references .5
3 Definitions .5
Figure 1 – Rectangular FLGA packages.6
Figure 2 – Terminal zones .7
Table 1 – Group 1: Dimensions appropriate to mounting and interchangeability.8
Table 2 – Group 2: Dimensions appropriate to mounting and gauging.11
Table 3 – Package dimensions .12
e
Table 4 – D/E, nD/nE, n max. variation –   = 0,80 mm pitch FLGA flanged type.13
Table 5 – D/E, nD/nE, n max. variation –  e  = 0,65 mm pitch FLGA flanged type.14
e
Table 6 – D/E, nD/nE, n max. variation –   = 0,50 mm pitch FLGA flanged type.15
Table 7 – D/E, nD/nE, n max. variation –  e  = 0,40 mm pitch FLGA flanged type.16
e
Table 8 – D/E, nD/nE, n max. variation –   = 0,80 mm pitch FLGA real chip size type .17
Table 9 – D/E, nD/nE, n max. variation –  e  = 0,65 mm pitch FLGA real chip size type .18
e
Table 10 – D/E, nD/nE, n max. variation –   = 0,50 mm pitch FLGA real chip size type .19
e
Table 11 – D/E, nD/nE, n max. variation –   = 0,40 mm pitch FLGA real chip size type .20

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SIST EN 60191-6-12:2005
60191-6-12 © IEC:2002(E) – 3 –
INTERNATIONAL ELECTROTECHNICAL COMMISSION
___________
MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES –
Part 6-12: General rules for the preparation of outline drawings
of surface mounted semiconductor device packages –
Design guide for fine-pitch land grid array (FLGA) –
Rectangular type
FOREWORD
1) The IEC (International Electrotechnical Commission) is a worldwide organization for standardization comprising
all national electrotechnical committees (IEC National Committees). The object of the IEC is to promote
international co-operation on all questions concerning standardization in the electrical and electronic fields. To
this end and in addition to other activities, the IEC publishes International Standards. Their preparation is
entrusted to technical committees; any IEC National Committee interested in the subject dealt with may
participate in this preparatory work. International, governmental and non-governmental organizations liaising
with the IEC also participate in this preparation. The IEC collaborates closely with the International
Organization for Standardization (ISO) in accordance with conditions determined by agreement between the
two organizations.
2) The formal decisions or agreements of the IEC on technical matters express, as nearly as possible, an
international consensus of opinion on the relevant subjects since each technical committee has representation
from all interested National Committees.
3) The documents produced have the form of recommendations for international use and are published in the form
of standards, technical specifications, technical reports or guides and they are accepted by the National
Committees in that sense.
4) In order to promote international unification, IEC National Committees undertake to apply IEC International
Standards transparently to the maximum extent possible in their national and regional standards. Any
divergence between the IEC Standard and the corresponding national or regional standard shall be clearly
indicated in the latter.
5) The IEC provides no marking procedure to indicate its approval and cannot be rendered responsible for any
equipment declared to be in conformity with one of its standards.
6) Attention is drawn to the possibility that some of the elements of this International Standard may be the subject
of patent rights. The IEC shall not be held responsible for identifying any or all such patent rights.
International Standard IEC 60191-6-12 has been prepared by subcommittee 47D: Mechanical
standardization of semiconductor devices, of IEC technical committee 47: Semiconductor
devices.
The text of this standard is based on the following documents:
FDIS Report on voting
47D/493/FDIS 47D/507/RVD
Full information on the voting for the approval of this standard can be found in the report on
voting indicated in the above table.
This publication has been drafted in accordance with the ISO/IEC Directives, Part 3.
A bilingual version of this publication may be issued at a later date.
The committee has decided that the contents of this publication will remain unchanged
until 2004. At this date, the publication will be
• reconfirmed;
• withdrawn;
• replaced by a revised edition, or
• amended.

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SIST EN 60191-6-12:2005
– 4 – 60191-6-12 © IEC:2002(E)
INTRODUCTION
The demand for area array style packages exists because of the multi-functions and high
performance of electrical equipment. The objective of this design guide is to standardize
outlines and to get interchangeability of FLGA rectangular type packages. The terminal pitch
and package outlines of these fine-pitch array packages are smaller than those of LGA
packages.

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SIST EN 60191-6-12:2005
60191-6-12 © IEC:2002(E) – 5 –
MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES –
Part 6-12: General rules for the preparation of outline drawings
of surface mounted semiconductor device packages –
Design guide for fine-pitch land grid array (FLGA) –
Rectangular type
1 Scope
This part of IEC 60191 provides common outline drawings and dimensions for all types of
structures and composed materials of fine-pitch land grid array (hereinafter called FLGA)
whose terminal pitch is less than, or equal to, 0,80 mm and whose package body outline is
rectangular.
2 Normative references
The following referenced documents are indispensable for the application of this document.
For dated references, only the edition cited applies. For undated references, the latest edition
of the referenced document (including any amendments) applies.
IEC 60191 (all parts), Mechanical standardization of semiconductor devices
3 Definitions
For the purposes of this part of IEC 60191, the following definitions, as well as those given in
the other parts of this series, apply.
3.1
flanged type
type
...