SIST EN 61188-5-8:2008
Printed boards and printed board assemblies - Design and use -- Part 5-8: Attachment (land/joint) considerations - Area array components (BGA, FBGA, CGA, LGA)
Printed boards and printed board assemblies - Design and use -- Part 5-8: Attachment (land/joint) considerations - Area array components (BGA, FBGA, CGA, LGA)
This part of IEC 61188 provides information on land pattern geometries used for the surface attachment of electronic components with area array terminations in the form of solder balls, solder columns or protective coated lands. The intent of the information presented herein is to provide the appropriate size, shape and tolerances of surface mount land patterns to ensure sufficient area for the appropriate solder joint, and also allow for inspection, testing and reworking of those solder joints. Each clause contains a specific set of criteria such that the information presented is consistent, providing information on the component, the component dimensions, the solder joint design and the land pattern dimensions. The land pattern dimensions are based on a mathematical model that establishes a platform for a solder joint attachment to the printed board. The existing models create a platform that is capable of establishing a reliable solder joint no matter which solder alloy is used to make that joint (lead-free, tin lead, etc.). Process requirements for solder reflow are different depending on the solder alloy and should be analyzed so that the process is taking place above the liquidus temperature of the alloy, and remains above that temperature a sufficient time to form a reliable metallurgical bond. Area array land patterns do not use "land protrusion" concepts and attempt to match the characteristics of the physical and dimensional termination properties. There are several configurations available, as shown in Figure 1. However, the tables provided show only the optimum dimension across the outer construction of the land.
Leiterplatten und Flachbaugruppen - Konstruktion und Anwendung -- Teil 5-8: Betrachtungen zur Montage (Anschlussfläche/Verbindung) - Flächenmatrix-Bauelemente (BGA, FBGA, CGA, LGA)
Cartes imprimées et cartes imprimées équipées - Conception et utilisation - Partie 5-8: Considérations sur les liaisons pistes-soudures - Composants matriciels (BGA, FBGA, CGA, LGA)
La CEI 61188-5-8:2007 fournit des informations sur la géométrie des plages d'accueil utilisées pour la fixation en surface des composants électroniques à sorties matricielles de forme de boules de brasure, de colonnes de brasure ou de pastilles recouvertes d'une protection. Le but des informations indiquées dans la présente norme est de fournir les dimensions, formes et tolérances appropriées des plages d'accueil pour montage en surface afin de garantir une surface suffisante pour le raccord de brasure et pour permettre l'inspection, la mise en essai et les retouches des joints de brasure.
Cette publication doit être lue conjointement avec la CEI 61188-5-1:2002.
Tiskane plošče in sestavi tiskanih plošč - Načrtovanje in uporaba - 5-8. del: Pregledovanje povezav (ploskev/stik) - Nizi ploskovnih komponent (BGA, FBGA, CGA, LGA) (IEC 61188-5-8:2007)
General Information
Standards Content (Sample)
SLOVENSKI STANDARD
SIST EN 61188-5-8:2008
01-september-2008
7LVNDQHSORãþHLQVHVWDYLWLVNDQLKSORãþ1DþUWRYDQMHLQXSRUDEDGHO
3UHJOHGRYDQMHSRYH]DY SORVNHYVWLN 1L]LSORVNRYQLKNRPSRQHQW %*$)%*$
&*$/*$ ,(&
Printed boards and printed board assemblies - Design and use - Part 5-8: Attachment
(land/joint) considerations - Area array components (BGA, FBGA, CGA, LGA)
Leiterplatten und Flachbaugruppen - Konstruktion und Anwendung - Teil 5-8:
Betrachtungen zur Montage (Anschlussfläche/Verbindung) - Flächenmatrix-Bauelemente
(BGA, FBGA, CGA, LGA)
Cartes imprimées et cartes imprimées équipées - Conception et utilisation - Partie 5-8:
Considérations sur les liaisons pistes-soudures - Composants matriciels (BGA, FBGA,
CGA, LGA)
Ta slovenski standard je istoveten z: EN 61188-5-8:2008
ICS:
31.180 7LVNDQDYH]MD 7,9 LQWLVNDQH Printed circuits and boards
SORãþH
SIST EN 61188-5-8:2008 en,de
2003-01.Slovenski inštitut za standardizacijo. Razmnoževanje celote ali delov tega standarda ni dovoljeno.
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SIST EN 61188-5-8:2008
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SIST EN 61188-5-8:2008
EUROPEAN STANDARD
EN 61188-5-8
NORME EUROPÉENNE
March 2008
EUROPÄISCHE NORM
ICS 31.180
English version
Printed boards and printed board assemblies -
Design and use -
Part 5-8: Attachment (land/joint) considerations -
Area array components (BGA, FBGA, CGA, LGA)
(IEC 61188-5-8:2007)
Cartes imprimées Leiterplatten und Flachbaugruppen -
et cartes imprimées équipées - Konstruktion und Anwendung -
Conception et utilisation - Teil 5-8: Betrachtungen zur Montage
Partie 5-8: Considérations sur les liaisons (Anschlussfläche/Verbindung) -
pistes-soudures - Flächenmatrix-Bauelemente
Composants matriciels (BGA, FBGA, CGA, LGA)
(BGA, FBGA, CGA, LGA) (IEC 61188-5-8:2007)
(CEI 61188-5-8:2007)
This European Standard was approved by CENELEC on 2008-02-01. CENELEC members are bound to comply
with the CEN/CENELEC Internal Regulations which stipulate the conditions for giving this European Standard
the status of a national standard without any alteration.
Up-to-date lists and bibliographical references concerning such national standards may be obtained on
application to the Central Secretariat or to any CENELEC member.
This European Standard exists in three official versions (English, French, German). A version in any other
language made by translation under the responsibility of a CENELEC member into its own language and notified
to the Central Secretariat has the same status as the official versions.
CENELEC members are the national electrotechnical committees of Austria, Belgium, Bulgaria, Cyprus, the
Czech Republic, Denmark, Estonia, Finland, France, Germany, Greece, Hungary, Iceland, Ireland, Italy, Latvia,
Lithuania, Luxembourg, Malta, the Netherlands, Norway, Poland, Portugal, Romania, Slovakia, Slovenia, Spain,
Sweden, Switzerland and the United Kingdom.
CENELEC
European Committee for Electrotechnical Standardization
Comité Européen de Normalisation Electrotechnique
Europäisches Komitee für Elektrotechnische Normung
Central Secretariat: rue de Stassart 35, B - 1050 Brussels
© 2008 CENELEC - All rights of exploitation in any form and by any means reserved worldwide for CENELEC members.
Ref. No. EN 61188-5-8:2008 E
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SIST EN 61188-5-8:2008
EN 61188-5-8:2008 – 2 –
Foreword
The text of document 91/705/FDIS, future edition 1 of IEC 61188-5-8, prepared by IEC TC 91, Electronics
assembly technology, was submitted to the IEC-CENELEC parallel vote and was approved by CENELEC
as EN 61188-5-8 on 2008-02-01.
This European Standard is to be read in conjunction with EN 61188-5-1.
The following dates were fixed:
– latest date by which the EN has to be implemented
at national level by publication of an identical
(dop) 2008-11-01
national standard or by endorsement
– latest date by which the national standards conflicting
(dow) 2011-02-01
with the EN have to be withdrawn
Annex ZA has been added by CENELEC.
__________
Endorsement notice
The text of the International Standard IEC 61188-5-8:2007 was approved by CENELEC as a European
Standard without any modification.
In the official version, for Bibliography, the following note has to be added for the standard indicated:
IEC 61191-1 NOTE Harmonized as EN 61191-1:1998 (not modified).
__________
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SIST EN 61188-5-8:2008
– 3 – EN 61188-5-8:2008
Annex ZA
(normative)
Normative references to international publications
with their corresponding European publications
The following referenced documents are indispensable for the application of this document. For dated
references, only the edition cited applies. For undated references, the latest edition of the referenced
document (including any amendments) applies.
NOTE When an international publication has been modified by common modifications, indicated by (mod), the relevant EN/HD
applies.
Publication Year Title EN/HD Year
1) 2)
IEC 60068-2-58 – Environmental testing - EN 60068-2-58 2004
Part 2-58: Tests - Test Td: Test methods + corr. December 2004
for solderability, resistance to dissolution of
metallization and to soldering heat of surface
mounting devices (SMD)
IEC 60191-2 Series Mechanical standardization of – –
semiconductor devices -
Part 2: Dimensions
1) 2)
IEC 61188-5-1 – Printed boards and printed board EN 61188-5-1 2002
assemblies - Design and use -
Part 5-1: Attachment (land/joint)
considerations - Generic requirements
1) 2)
IEC 62090 – Product package labels for electronic EN 62090 2003
components using bar code and two-
dimensional symbologies
1)
Undated reference.
2)
Valid edition at date of issue.
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SIST EN 61188-5-8:2008
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SIST EN 61188-5-8:2008
IEC 61188-5-8
Edition 1.0 2007-10
INTERNATIONAL
STANDARD
Printed boards and printed board assemblies – Design and use –
Part 5-8: Attachment (land/joint) considerations – Area array components (BGA,
FBGA, CGA, LGA)
INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
PRICE CODE
U
ICS 31.180 ISBN 2-8318-9343-7
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SIST EN 61188-5-8:2008
– 2 – 61188-5-8 © IEC:2007(E)
CONTENTS
FOREWORD.04
INTRODUCTION.1H1H6
1 Scope.2H2H7
2 Normative references .3H3H7
3 General information.4H4H8
3.1 General component description .5H5H8
3.2 Marking .6H6H8
3.3 Carrier packaging format .7H7H9
3.4 Process considerations .8H8H9
4 BGA (square) .9H9H9
4.1 Field of application .10H10H9
4.2 Component descriptions .11H11H9
4.2.1 Basic construction .12H12H9
4.2.2 Termination materials .13H13H10
4.2.3 Marking .14H14H11
4.2.4 Carrier package format .15H15H11
4.2.5 Process considerations.16H16H11
4.3 Component dimensions (square) .17H17H11
4.3.1 PBGA 1,5 mm pitch component dimensions (square).18H18H12
4.3.2 PBGA 1,27 mm pitch component dimensions (square).19H19H14
4.3.3 PBGA 1,00 mm pitch component dimensions (square).20H20H15
4.4 Solder joint fillet design .21H21H17
4.4.1 Solder joint fillet design – Non-collapsing, collapsing (level 3) .22H22H17
4.5 Land pattern dimensions .23H23H18
4.5.1 PBGA 1,5 mm pitch land pattern dimensions (square) .24H24H19
4.5.2 PBGA 1,27 mm pitch land pattern dimensions (square) .25H25H21
4.5.3 PBGA 1,00 mm pitch land pattern dimensions (square) .26H26H23
5 FBGA (square) .27H27H25
6 BGA (rectangular) .28H28H25
6.1 Field of application .29H29H25
6.2 Component descriptions .30H30H25
6.2.1 Basic construction .31H31H25
6.2.2 Termination materials .32H32H25
6.2.3 Marking .33H33H26
6.2.4 Carrier package format .34H34H26
6.2.5 Process considerations.35H35H26
6.3 Component dimensions (rectangular) .36H36H26
6.4 Solder joint fillet design .37H37H27
6.4.1 Solder joint fillet design – Collapsing (level 3) .38H38H27
6.4.2 Land approximation .39H39H28
6.4.3 Total variation .40H40H28
6.5 Land pattern dimensions .41H41H28
7 FBGA (rectangular) .42H42H29
8 CGA .43H43H29
9 LGA.44H44H29
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SIST EN 61188-5-8:2008
61188-5-8 © IEC:2007(E) – 3 –
Bibliography.45H45H30
Figure 1 – Area array land pattern configuration .46H46H7
Figure 2 – BGA physical configuration examples .47H47H10
Figure 3 – High land and eutectic solder ball and joint comparison .48H48H10
Figure 4 – BGA (square) .49H49H11
Figure 5 – General BGA dimensional characteristics.50H50H12
Figure 6 – Solder joint fillet design.51H51H18
Figure 7 – BGA (square) land pattern dimensions .52H52H19
Table 1 – Ball diameter sizes .53H53H8
Table 2 – BGA products with pitch of 1,5 mm.54H54H13
Table 3 – BGA products with pitch of 1,27 mm.55H55H14
Table 4 – BGA products with pitch of 1,0 mm.56H56H16
Table 5 – BGA product land patterns with pitch of 1,50 mm .57H57H20
Table 6 – BGA product land patterns with pitch of 1,27 mm .58H58H22
Table 7 – BGA product land patterns with pitch of 1,00 mm .59H59H24
Table 8 – Rectangular BGA products with pitch of 1,27 mm .60H60H27
Table 9 – Rectangular BGA product land patterns with pitch of 1,27 mm.61H61H29
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SIST EN 61188-5-8:2008
– 4 – 61188-5-8 © IEC:2007(E)
INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________
PRINTED BOARDS AND PRINTED BOARD ASSEMBLIES –
DESIGN AND USE –
Part 5-8: Attachment (land/joint) considerations –
Area array components (BGA, FBGA, CGA, LGA)
FOREWORD
1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising
all national electrotechnical committees (IEC National Committees). The object of IEC is to promote
international co-operation on all questions concerning standardization in the electrical and electronic fields. To
this end and in addition to other activities, IEC publishes International Standards, Technical Specifications,
Technical Reports, Publicly Available Specifications (PAS) and Guides (hereafter referred to as “IEC
Publication(s)”). Their preparation is entrusted to technical committees; any IEC National Committee interested
in the subject dealt with may participate in this preparatory work. International, governmental and non-
governmental organizations liaising with the IEC also participate in this preparation. IEC collaborates closely
with the International Organization for Standardization (ISO) in accordance with conditions determined by
agreement between the two organizations.
2) The formal decisions or agreements of IEC on technical matters express, as nearly as possible, an international
consensus of opinion on the relevant subjects since each technical committee has representation from all
interested IEC National Committees.
3) IEC Publications have the form of recommendations for international use and are accepted by IEC National
Committees in that sense. While all reasonable efforts are made to ensure that the technical content of IEC
Publications is accurate, IEC cannot be held responsible for the way in which they are used or for any
misinterpretation by any end user.
4) In order to promote international uniformity, IEC National Committees undertake to apply IEC Publications
transparently to the maximum extent possible in their national and regional publications. Any divergence
between any IEC Publication and the corresponding national or regional publication shall be clearly indicated in
the latter.
5) IEC provides no marking procedure to indicate its approval and cannot be rendered responsible for any
equipment declared to be in conformity with an IEC Publication.
6) All users should ensure that they have the latest edition of this publication.
7) No liability shall attach to IEC or its directors, employees, servants or agents including individual experts and
members of its technical committees and IEC National Committees for any personal injury, property damage or
other damage of any nature whatsoever, whether direct or indirect, or for costs (including legal fees) and
expenses arising out of the publication, use of, or reliance upon, this IEC Publication or any other IEC
Publications.
8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is
indispensable for the correct application of this publication.
9) Attention is drawn to the possibility that some of the elements of this IEC Publication may be the subject of
patent rights. IEC shall not be held responsible for identifying any or all such patent rights.
International Standard IEC 61188-5-8 has been prepared by IEC technical committee 91:
Electronics assembly technology.
The text of this standard is based on the following documents:
FDIS Report on voting
91/705/FDIS 91/737/RVD
Full information on the voting for the approval of this standard can be found in the report on
voting indicated in the above table.
This publication has been drafted in accordance with the ISO/IEC Directives, Part 2.
IEC 61188-5-8 is to be read in conjunction with IEC 61188-5-1.
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SIST EN 61188-5-8:2008
61188-5-8 © IEC:2007(E) – 5 –
A list of all parts of the IEC 61188 series, under the general title Printed boards and printed
board assemblies – Design and use, can be found on the IEC website.
The committee has decided that the contents of this publication will remain unchanged until
the maintenance result date 0F indicated on the IEC web site under "http://webstore.iec.ch" in
the data related to the specific publication. At this date, the publication will be
• reconfirmed;
• withdrawn;
• replaced by a revised edition, or
• amended.
A bilingual version of this publication may be issued at a later date.
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SIST EN 61188-5-8:2008
– 6 – 61188-5-8 © IEC:2007(E)
INTRODUCTION
This part of IEC 61188 covers land patterns for area array components which include ball grid
array (BGA) parts (rigid, flexible or ceramic substrate); fine pitch ball grid array (FBGA) parts
(rigid or flexible substrate); column grid array (CGA) parts (ceramic substrates) and land grid
array (LGA) parts (ceramic substrates). Each clause contains information in accordance with
the area array family of components and their requirements for appropriate land patterns.
The proposed land pattern dimensions in this standard are based upon the fundamental
tolerance calculation combined with the given land geometries and courtyard excesses (see
IEC 61188-5-1, Generic requirements). The courtyard includes all issues of the normal
manufacturing necessities.
The unaltered land pattern dimensions of this part are generally applicable for the solder
paste application plus the reflow soldering process.
Although other standards in the IEC 61188-5 series define three levels of land pattern
dimensioning, this standard will only define two levels. One level (level 2) is for non collapsing
BGA balls; the other level (level 3) is for those BGA components where the ball does collapse
around the land. All land descriptions are non-solder mask defined. Each land pattern has
been assigned an identification number to indicate the characteristics of the specific
robustness of the land patterns. Users also have the opportunity to organize the information
so that it is most useful for their particular design.
If a user has good reason to use a concept different from that of IEC 61188-5-1, or if the user
prefers unusual land geometries, this standard should be used for checking the resulting ball
to land relationship.
It is the responsibility of the user to verify the SMD land patterns used for achieving an
undisturbed mounting process including testing and an ensured reliability for the product
stress conditions in use. In addition, the size and shape of the proposed land pattern may
vary according to the solder resist aperture, the size of the land pattern extension (dog bone),
the via within the extension, or if the via is in the land pattern itself.
Dimensions of the components listed in this standard are of those available in the market, and
regarded as reference only.
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SIST EN 61188-5-8:2008
61188-5-8 © IEC:2007(E) – 7 –
PRINTED BOARDS AND PRINTED BOARD ASSEMBLIES –
DESIGN AND USE –
Part 5-8: Attachment (land/joint) considerations –
Area array components (BGA, FBGA, CGA, LGA)
1 Scope
This part of IEC 61188 provides information on land pattern geometries used for the surface
attachment of electronic components with area array terminations in the form of solder balls,
solder columns or protective coated lands. The intent of the information presented herein is to
provide the appropriate size, shape and tolerances of surface mount land patterns to ensure
sufficient area for the appropriate solder joint, and also allow for inspection, testing and
reworking of those solder joints.
Each clause contains a specific set of criteria such that the information presented is
consistent, providing information on the component, the component dimensions, the solder
joint design and the land pattern dimensions.
The land pattern dimensions are based on a mathematical model that establishes a platform
for a solder joint attachment to the printed board. The existing models create a platform that is
capable of establishing a reliable solder joint no matter which solder alloy is used to make
that joint (lead-free, tin lead, etc.).
Process requirements for solder reflow are different depending on the solder alloy and should
be analyzed so that the process is taking place above the liquidus temperature of the alloy,
and remains above that temperature a sufficient time to form a reliable metallurgical bond.
Area array land patterns do not use "land protrusion" concepts and attempt to match the
characteristics of the physical and dimensional termination properties. There are several
configurations available, as shown in Figure 1. However, the tables provided show only the
optimum dimension across the outer construction of the land.
Circle Hexagon
Via in Pad
Dog Bone
IEC 2028/07
Figure 1 – Area array land pattern configuration
2 Normative references
The following referenced documents are indispensable for the application of this document.
For dated references, only the edition cited applies. For undated references, the latest edition
of the referenced document (including any amendments) applies.
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SIST EN 61188-5-8:2008
– 8 – 61188-5-8 © IEC:2007(E)
IEC 60068-2-58, Environmental testing – Part 2-58: Tests: Test Td – Test methods for
solderability, resistance to dissolution of metallization and to soldering heat of surface
mounting devices (SMD)
IEC 60191-2 (all parts), Mechanical standardization of semiconductor devices – Part 2:
Dimensions
IEC 61188-5-1, Printed boards and printed board assemblies – Design and use – Part 5-1:
Attachment (land/joint) considerations – Generic requirements
IEC 62090, Product package labels for electronic components using bar code and two-
dimensional symbologies
3 General information
3.1 General component description
The area array family is characterized by terminations that are on a particular pitch and
contain a number of rows and columns for the total IO termination pin count. The BGA family
uses a solder ball as a termination and may have a square or rectangular package
configuration. The family includes both moulded plastic and ceramic case styles. The
acronyms PBGA (plastic ball grid array), CBGA (ceramic ball grid array), FBGA (fine pitch ball
grid array), and TBGA (tape ball grid array) are also used to describe the family since they all
use a ball termination in an array format. Other enhancements such as the addition of thermal
heat distributors may be included in any of the package types described.
There are several ball pitch variations within the family; these range from 1,50 mm to 0,25 mm
as shown in Table 1. The lower pitch items (below 0,40 mm) are predicted for future
component configurations.
Table 1 – Ball diameter sizes
Solder bump Solder bump
Pitch
nominal diameter diameter variation
mm
mm mm
1,50; 1,27 0,75 0,90 – 0,65
1,00 0,60 0,70 – 0,50
1,00; 0,80 0,50 0,55 – 0,45
1,00; 0,80; 0,75 0,45 0,50 – 0,40
0,80; 0,75; 0.65 0,40 0,45 – 0,35
0,80; 0,75; 0,65; 0,50 0,30 0,35 – 0,25
0,40 0,25 0,28 – 0,22
0,30 0,20 0,22 – 0,18
0,25 0,15 0,17 – 0,13
3.2 Marking
The area array family of parts are generally marked with the manufacturer’s part numbers,
manufacturer’s name or symbol and a pin 1 indicator. Some parts may have a pin 1 feature in
the case shape instead of a pin 1 marking. Additional markings may include date-code
manufacturing lot and/or manufacturing location. Bar code marking should be in accordance
with IEC 62090.
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SIST EN 61188-5-8:2008
61188-5-8 © IEC:2007(E) – 9 –
3.3 Carrier packaging format
Carrier tray packaging format or tape and reel may be provided. Either format is acceptable
and is usually specified by the component manufacturer or the assembler. Choice of format is
usually dependent on size of component and volume to be assembled. Bulk packaging is not
acceptable because of termination coplanarity issues and the requirements for placement and
soldering.
3.4 Process considerations
Area array packages are normally processed by reflow solder operations. There is also a
process difference between the solder application for those terminations that collapse slightly
during soldering as defined in level 3 of this standard, and those terminations that do not
collapse (level 2) where a significant amount of additional solder paste is required.
In conjunction with the right land size, the volume of the solder paste application is a
fundamental parameter to keep under control in order to have a good reflow quality yield and
reliable solder joint. Paste volume deposition may be a matter of SPC adoption at the print
process step.
Fine pitch ball parts may require special processing outside the normal pick/place and reflow
manufacturing operations. This requirement relates to the amount of solder paste, the
precision of the placement machine and the soldering process profile, in order to permit all
parts to become attached at the same time that the FBGA is reflowed.
4 BGA (square)
4.1 Field of application
This clause provides the component and land pattern dimensions for square type BGA (ball
grid array) components. The basic construction of the BGA device is also covered. At the end
of this clause is a listing of the tolerances and target solder joint dimensions used to arrive at
the land pattern dimensions.
4.2 Component descriptions
BGAs are widely used in a variety of applications for commercial, industrial or military
electronics.
4.2.1 Basic construction
The ball grid array has been developed for applications requiring low height and high density.
The BGA components may take many forms, as illustrated in Figure 2. Variations include the
method of die attach (wire bonding, flip chip, etc.), the substrate material (organic rigid or
flexible material, ceramic, etc.) and the method of protecting the device from the environment
(plastic encapsulation, hermetic sealing etc.). All variations can use the same land patterns
defined in this clause, as all types may be used in many printed circuit board assemblies for
device applications.
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SIST EN 61188-5-8:2008
– 10 – 61188-5-8 © IEC:2007(E)
IC die
Epoxy
Au bond
overmold
Plastic BGA with wire bond
wires
chip attach
AG filled
BT/glass
Solder balls
die attach
PCB
(62/36/2 Sn/Pb/Ag)
IEC 2029/07
Silicon die
Thermal grease
Solder balls
Underfill
Ceramic BGA, hermetically
(97PB/3Sn)
sealed, with flip chip die
Sealing
attach
adhesive
Multiplayer alumina substrate
Solder
Solder balls
(37PB/63Sn)
(90PB/10Sn)
IEC 2030/07
Thermal grease
Silicon die
Underfill
Tape bonded grid array,
with flip chip die attach and
Heat spreader
enhanced thermal heat
Adhesive Copper ring Copper ring
spreader
Flex circuit
Solder balls Solder balls
(95Pb/5Sn) (90Pb/10Sn)
IEC 2031/07
Figure 2 – BGA physical configuration examples
4.2.2 Termination materials
The BGA ball termination may consist of a variety of metal alloys. Some of these include balls
with some lead content such as 37Pb63Sn, 90Pb10Sn, 95Pb5Sn, while others do not contai
...
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