ETSI TS 102 694-1 V11.0.0 (2019-05)

Smart Cards; Test specification for the Single Wire Protocol (SWP) interface; Part 1: Terminal features (Release 11)

RTS/SCP-00SWPTvb00

General Information

• Status: Published
• Publication Date: 08-May-2019
• Technical Committee: SET TEST - SET TEST
• Current Stage: 12 - Completion
• Due Date: 26-Apr-2019
• Completion Date: 09-May-2019

Standards Content (Sample)

ETSI TS 102 694-1 V11.0.0 (2019-05)






TECHNICAL SPECIFICATION
Smart Cards;
Test specification for the
Single Wire Protocol (SWP) interface;
Part 1: Terminal features
(Release 11)

---------------------- Page: 1 ----------------------
Release 11 2 ETSI TS 102 694-1 V11.0.0 (2019-05)



Reference
RTS/SCP-00SWPTvb00
Keywords
smart card, terminal
ETSI
650 Route des Lucioles
F-06921 Sophia Antipolis Cedex - FRANCE

Tel.: [phone]  Fax: [phone]

Siret N° 348 623 562 00017 - NAF 742 C
Association à but non lucratif enregistrée à la
Sous-Préfecture de Grasse (06) N° 7803/88

Important notice
The present document can be downloaded from:
http://www.etsi.org/standards-search
The present document may be made available in electronic versions and/or in print. The content of any electronic and/or
print versions of the present document shall not be modified without the prior written authorization of ETSI. In case of any
existing or perceived difference in contents between such versions and/or in print, the prevailing version of an ETSI
deliverable is the one made publicly available in PDF format at www.etsi.org/deliver.
Users of the present document should be aware that the document may be subject to revision or change of status.
Information on the current status of this and other ETSI documents is available at
https://portal.etsi.org/TB/ETSIDeliverableStatus.aspx
If you find errors in the present document, please send your comment to one of the following services:
https://portal.etsi.org/People/CommiteeSupportStaff.aspx
Copyright Notification
No part may be reproduced or utilized in any form or by any means, electronic or mechanical, including photocopying
and microfilm except as authorized by written permission of ETSI.
The content of the PDF version shall not be modified without the written authorization of ETSI.
The copyright and the foregoing restriction extend to reproduction in all media.

© ETSI 2019.
All rights reserved.

TM TM TM
DECT , PLUGTESTS , UMTS and the ETSI logo are trademarks of ETSI registered for the benefit of its Members.
TM TM
3GPP and LTE are trademarks of ETSI registered for the benefit of its Members and
of the 3GPP Organizational Partners.
oneM2M™ logo is a trademark of ETSI registered for the benefit of its Members and
of the oneM2M Partners.
®
GSM and the GSM logo are trademarks registered and owned by the GSM Association.
ETSI

---------------------- Page: 2 ----------------------
Release 11 3 ETSI TS 102 694-1 V11.0.0 (2019-05)
Contents
Intellectual Property Rights . 9
Foreword . 9
Modal verbs terminology . 10
Introduction . 10
1 Scope . 11
2 References . 11
2.1 Normative references . 11
2.2 Informative references . 12
3 Definition of terms, symbols, abbreviations and formats . 12
3.1 Terms . 12
3.2 Symbols . 13
3.3 Abbreviations . 13
3.4 Formats . 14
3.4.1 Format of the table of optional features . 14
3.4.2 Format of the applicability table . 14
3.4.3 Status and Notations . 14
4 Test environment . 15
4.1 Table of optional features . 15
4.2 Applicability table . 17
4.3 Information provided by the device supplier . 21
4.4 Test equipment . 21
4.4.0 General requirements . 21
4.4.1 Measurement/setting uncertainties . 22
4.4.2 Default conditions for DUT operation . 22
4.4.2.0 General . 22
4.4.2.1 Temperature . 23
4.4.2.2 ETSI TS 102 221 interface contacts (CLK, RST, I/O) and contact Vcc . 23
4.4.2.3 ETSI TS 102 600 interface contacts (IC_DP, IC_DM) . 23
4.4.2.4 ETSI TS 102 613 interface contact (SWIO). 23
4.4.2.5 Status of UICC interfaces . 23
4.4.2.6 Characteristics of LLC's . 23
4.4.2.6.1 ACT LLC . 23
4.4.2.6.2 SHDLC LLC . 24
4.4.2.6.3 CLT LLC . 24
4.4.3 Minimum/maximum conditions for DUT operation . 24
4.4.4 Execution requirements . 25
4.4.4.0 Overview . 25
4.4.4.1 Definition of TR1 . 25
4.4.4.2 Definition of TR2 . 25
4.5 Test execution . 26
4.5.1 Parameter variations . 26
4.5.2 Execution requirements . 26
4.6 Pass criterion . 26
5 Test cases . 26
5.1 Principle of the Single Wire Protocol . 26
5.2 System architecture . 26
5.2.1 General overview . 26
5.2.2 ETSI TS 102 221 support . 27
5.2.2.1 Conformance requirements . 27
5.2.3 Configurations . 27
5.2.3.1 Conformance requirements . 27
5.2.4 Interaction with other interfaces . 27
5.2.4.1 Conformance requirements . 27
ETSI

---------------------- Page: 3 ----------------------
Release 11 4 ETSI TS 102 694-1 V11.0.0 (2019-05)
5.3 Physical characteristic s . 27
5.3.1 Temperature range for card operations . 27
5.3.1.1 Conformance requirements . 27
5.3.2 Contacts . 28
5.3.2.1 Provision of contacts . 28
5.3.2.1.1 Conformance requirements . 28
5.3.2.2 Contact activation and deactivation . 28
5.3.2.2.1 Conformance requirements . 28
5.3.2.2.2 Test case 1: activation of SWP additionally to other interfaces . 28
5.3.2.2.3 Test case 2: activation of SWP in low power mode . 29
5.3.2.3 Interface activation . 29
5.3.2.3.1 Conformance requirements . 29
5.3.2.3.2 Test case 1: SWP initial activation in full power mode - normal procedure . 32
5.3.2.3.3 Test case 2: SWP Initial activation - no resume . 32
5.3.2.3.4 Test case 3: SWP initial activation in full power mode - corrupted ACT_SYNC frame (repeat
the last frame) . 32
5.3.2.3.5 Test case 4: SWP initial activation in full power mode - no ACT_SYNC frame (repeat the
last frame) . 33
5.3.2.3.6 Test case 5: SWP initial activation failed in full power mode - corrupted ACT_SYNC frame
(multiple) . 33
5.3.2.3.7 Test case 6: SWP initial activation failed in full power mode - no ACT_SYNC frame
(multiple) . 34
5.3.2.3.8 Test case 7: SWP Initial activation in full power mode - corrupted ACT_READY frame
(repeat last frame) . 35
5.3.2.3.9 Void . 35
5.3.2.3.9a Test case 8a: SWP Initial activation in full power mode - no ACT_READY frame (repeat last
frame) . 35
5.3.2.3.10 Test case 9: SWP initial activation failed in full power mode - corrupted ACT_READY
frame (multiple) . 36
5.3.2.3.11 Test case 10: SWP initial activation failed in full power mode - no ACT_READY frame
(multiple) . 37
5.3.2.3.12 Test case 11: SWP initial activation in low power mode . 37
5.3.2.3.13 Test case 12:SWP initial activation in low power mode - corrupted ACT_SYNC frame
(repeat the last frame) . 38
5.3.2.3.14 Test case 13: SWP initial activation in low power mode - no ACT_SYNC frame (repeat the
last frame) . 38
5.3.2.3.15 Test case 14: SWP initial activation failed in low power mode - corrupted ACT_SYNC frame
(multiple) . 39
5.3.2.3.16 Test case 15: SWP initial activation failed in low power mode - no ACT_SYNC frame
(multiple) . 40
5.3.2.3.17 Test case 16: SWP subsequent activation in full power mode . 40
5.3.2.3.18 Void . 41
5.3.2.3.19 Test case 18: SWP initial activation in full power mode - send ACT frames in wrong order,
ACT_READY frame after activation (repeat the last frame) . 41
5.3.2.4 Behaviour of a UICC in a terminal not supporting SWP . 41
5.3.2.4.1 Conformance requirements . 41
5.3.2.5 Behaviour of terminal connected to a UICC not supporting SWP . 42
5.3.2.5.1 Conformance requirements . 42
5.3.2.5.2 Void . 42
5.3.2.6 Inactive contacts . 42
5.3.2.6.1 Conformance requirements . 42
5.4 Electrical characteristics . 42
5.4.1 Operating conditions . 42
5.4.1.1 Voltage and current definitions . 42
5.4.1.2 Supply voltage classes. 42
5.4.1.3 V (C1) low power mode definition . 42
CC
5.4.1.3.1 Conformance requirements . 42
5.4.1.3.2 Test case 1: current provided in low power mode, no spikes . 43
5.4.1.3.3 Test case 2: current provided in low power mode, with spikes . 43
5.4.1.4 Signal S1 . 45
5.4.1.4.1 Conformance requirements . 45
5.4.1.4.2 Test case 1: communication with S2 variation in full power mode . 45
ETSI

---------------------- Page: 4 ----------------------
Release 11 5 ETSI TS 102 694-1 V11.0.0 (2019-05)
5.4.1.4.3 Test case 2: communication with S2 variation in low power mode . 46
5.4.1.5 Signal S2 . 46
5.4.1.5.1 Definition. 46
5.4.1.5.2 Operating current for S2 . 46
5.5 Physical transmission layer . 48
5.5.1 S1 Bit coding and sampling time . 48
5.5.1.1 Conformance requirements . 48
5.5.1.2 Test case 1: S1 waveforms, default bit duration. 48
5.5.1.2.1 Test execution . 48
5.5.1.2.2 Initial conditions . 49
5.5.1.2.3 Test procedure . 49
5.5.1.3 Test case 2: S1 waveforms, extended bit durations . 49
5.5.1.3.1 Test execution . 49
5.5.1.3.2 Initial conditions . 49
5.5.1.3.3 Test procedure . 50
5.5.2 S2 switching management . 50
5.5.2.1 Conformance requirements . 50
5.5.3 SWP interface states management . 51
5.5.3.1 Conformance requirements . 51
5.5.3.2 Test case 1: SWP states and transitions, communication . 52
5.5.3.2.1 Test execution . 52
5.5.3.2.2 Initial conditions . 52
5.5.3.2.3 Test procedure . 52
5.5.3.3 Test Case 2: SWP resume after upper layer indication that the UICC requires no more activity on
this interface . 52
5.5.3.3.1 Test execution . 52
5.5.3.3.2 Initial Conditions . 53
5.5.3.3.3 Test procedure . 53
5.5.4 Power mode states/transitions and Power saving mode . 53
5.5.4.1 Conformance requirements . 53
5.5.4.2 Test case 1: power provided in full power mode . 53
5.5.4.2.1 Test execution . 53
5.5.4.2.2 Initial conditions . 53
5.5.4.2.3 Test procedure . 54
5.5.4.3 Test case 2: switching from full to low power mode . 54
5.5.4.3.1 Test execution . 54
5.5.4.3.2 Initial conditions . 54
5.5.4.3.3 Test procedure . 54
5.5.4.4 Test case 3: switching from low to full power mode . 54
5.5.4.4.1 Test execution . 54
5.5.4.4.2 Initial conditions . 54
5.5.4.4.3 Test procedure . 55
5.6 Data link layer . 55
5.6.1 Overview . 55
5.6.2 Medium Access Control (MAC) layer . 55
5.6.2.1 Bit order . 55
5.6.2.1.1 Conformance requirements . 55
5.6.2.2 Structure . 55
5.6.2.2.1 Conformance requirements . 55
5.6.2.2.2 Test case 1: interpretation of incorrectly formed frames - SHDLC RSET frames . 56
5.6.2.2.3 Test case 2: interpretation of incorrectly formed frames - SHDLC I-frames . 56
5.6.2.3 Bit stuffing . 57
5.6.2.3.1 Conformance requirements . 57
5.6.2.3.2 Test case 1: behaviour of CLF with bit stuffing in frame . 57
5.6.2.4 Error detection . 57
5.6.2.4.1 Conformance requirements . 57
5.6.3 Supported LLC layers . 58
5.6.3.1 LPDU structures . 58
5.6.3.1.1 Conformance requirements . 58
5.6.3.2 Interworking of the LLC layers . 58
5.6.3.2.1 Conformance requirements . 58
5.6.3.2.2 Test case 1: ignore ACT LLC frame reception after the SHDLC link establishment . 58
ETSI

---------------------- Page: 5 ----------------------
Release 11 6 ETSI TS 102 694-1 V11.0.0 (2019-05)
5.6.3.2.3 Test case 2: ignore ACT LLC frame reception in CLT session. 59
5.6.3.2.4 Test case 3: CLT session during SHDLC communication . 59
5.6.3.2.5 Test case 4: closing condition of CLT session whereas SHDLC link has been established
before CLT session . 59
5.6.4 ACT LLC definition .
...