ETSI TS 102 230-2 V9.2.0 (2019-06)

Smart Cards; UICC-Terminal interface; Physical, electrical and logical test specification; Part 2: UICC features (Release 9)

RTS/SCP-00102230Uv920

General Information

• Status: Published
• Publication Date: 27-Jun-2019
• Technical Committee: SET TEST - SET TEST
• Current Stage: 12 - Completion
• Due Date: 21-May-2019
• Completion Date: 28-Jun-2019

Standards Content (Sample)

ETSI TS 102 230-2 V9.2.0 (2019-06)






TECHNICAL SPECIFICATION
Smart Cards;
UICC-Terminal interface;
Physical, electrical and logical test specification;
Part 2: UICC features
(Release 9)

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Release 9 2 ETSI TS 102 230-2 V9.2.0 (2019-06)



Reference
RTS/SCP-00102230Uv920
Keywords
smart card, testing
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Release 9 3 ETSI TS 102 230-2 V9.2.0 (2019-06)
Contents
Intellectual Property Rights . 11
Foreword . 11
Modal verbs terminology . 12
Introduction . 12
1 Scope . 13
2 References . 13
2.1 Normative references . 13
2.2 Informative references . 14
3 Definition of terms, symbols, abbreviations and formats . 15
3.1 Terms . 15
3.2 Symbols . 17
3.3 Abbreviations . 17
3.4 Formats . 18
3.4.1 Format of the table of optional features . 18
3.4.2 Format of the applicability table . 19
3.4.3 Status and Notations . 19
3.4.4 Numbers and Strings . 20
4 Test environment . 20
4.1 Table of optional features . 20
4.2 Applicability table . 21
4.3 Information provided by the device supplier . 24
4.4 Test equipment . 24
4.4.1 Overview . 24
4.4.2 Measurement/setting uncertainties . 24
4.4.2.1 V . 24
CC
4.4.2.2 RST . 25
4.4.2.3 CLK. 25
4.4.2.4 I/O . 25
4.4.3 Precision force-inducing contacting device . 25
4.4.4 Temperature controllable environment . 25
4.4.5 Temperature measuring device . 26
4.4.6 Voltage measuring device . 26
4.4.7 Precision measuring device. 26
4.4.8 Current measuring device . 26
4.4.9 Timing Measurements on contact I/O . 26
4.4.10 Default conditions for DUT operation . 26
4.5 Test execution . 27
4.5.1 Parameter variations . 27
4.5.2 Required application . 27
4.5.2.1 Application requirements . 27
4.5.2.2 Required application files . 27
4.5.2.2.1 Requirements for file creation and update . 27
4.5.2.2.2 EF . 27
TRANS16b
4.5.2.2.3 EF . 28
LF4R20b
4.5.2.2.4 EF . 28
LF4R10b
4.5.2.2.5 EF . 29
CYC4R3b
4.5.2.2.6 DF on ADF (Application DF) level . 29
4.5.2.2.7 EF . 30
SUBTRANS
4.5.2.2.8 EF . 30
SUBLF
4.5.2.2.9 EF . 31
SUBCYC
4.6 Pass criterion . 31
ETSI

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Release 9 4 ETSI TS 102 230-2 V9.2.0 (2019-06)
5 Conformance Requirements . 32
5.1 Conformance requirement naming . 32
5.2 Physical characteristic s . 32
5.3 Electrical specifications of the UICC - Terminal interface . 33
5.4 Initial communication establishment procedures . 34
5.5 Transmission protocols . 35
5.6 Application and file structure . 40
5.7 Security features . 44
5.8 Structure of commands and responses . 46
5.9 Commands . 47
5.10 Transmission oriented commands . 55
5.11 Application independent files . 55
5.12 Application independent protocol . 55
5.13 Support of APDU-based UICC applications over USB . 56
6 Test cases . 56
6.1 Introduction . 56
6.2 Physical characteristic tests . 57
6.2.1 Dimensions of the UICC card . 57
6.2.1.1 Test execution . 57
6.2.1.2 Initial conditions . 57
6.2.1.3 Test procedure . 57
6.2.2 Temperature range for card operation . 57
6.2.2.1 Test execution . 57
6.2.2.2 Initial conditions . 57
6.2.2.3 Test procedure 1 . 58
6.2.2.4 Test procedure 2 . 58
6.3 Electrical specifications of the UICC - Terminal interface . 58
6.3.1 Supply voltage V (contact C1) . 58
cc
6.3.1.1 V - Voltage limits . 58
cc
6.3.1.1.1 Test execution . 58
6.3.1.1.2 Initial conditions . 58
6.3.1.1.3 Test procedure . 58
6.3.1.2 V - Idle current limits . 59
cc
6.3.1.2.1 Test execution . 59
6.3.1.2.2 Initial conditions . 59
6.3.1.2.3 Test procedure . 59
6.3.1.3 V - Current limits in clock-stop-mode . 59
cc
6.3.1.3.1 Test execution . 59
6.3.1.3.2 Initial conditions . 59
6.3.1.3.3 Test procedure . 59
6.3.2 Reset RST (contact C2) . 60
6.3.2.1 RST - Static operation . 60
6.3.2.1.1 Test execution . 60
6.3.2.1.2 Initial conditions . 60
6.3.2.2 Test procedure . 60
6.3.3 Programming voltage Vpp (contact C6) . 60
6.3.3.1 Vpp - Static operation . 60
6.3.3.1.1 Test execution . 60
6.3.3.1.2 Initial conditions . 60
6.3.3.1.3 Test procedure 1 . 60
6.3.3.1.4 Test procedure 2 . 61
6.3.4 Clock CLK (contact C3) . 61
6.3.4.1 Frequency and duty cycle . 61
6.3.4.1.1 Test execution . 61
6.3.4.1.2 Initial conditions . 61
6.3.4.1.3 Test procedure . 61
6.3.4.2 Voltage and current . 62
6.3.4.2.1 Test execution . 62
6.3.4.2.2 Initial conditions . 62
6.3.4.2.3 Test procedure . 62
ETSI

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Release 9 5 ETSI TS 102 230-2 V9.2.0 (2019-06)
6.3.5 I/O (contact C7) . 62
6.3.5.1 Voltage and current . 62
6.3.5.1.1 Test execution . 62
6.3.5.1.2 Initial conditions . 63
6.3.5.1.3 Test procedure 1 . 63
6.3.5.1.4 Test procedure 2 . 63
6.3.5.1.5 Test procedure 3 . 64
6.4 Initial communication establishment procedure . 64
6.4.1 Supply voltage switching . 64
6.4.1.1 Supply voltage classes. 64
6.4.1.2 Power consumption of the UICC during ATR . 65
6.4.1.2.1 Test execution . 65
6.4.1.2.2 Initial conditions . 65
6.4.1.2.3 Test procedure . 65
6.4.1.3 Application related electrical parameters . 65
6.4.1.3.1 Test execution . 65
6.4.1.3.2 Initial conditions . 65
6.4.1.3.3 Test procedure . 65
6.4.2 ATR content. 66
6.4.2.1 ATR - Major capabilities . 66
6.4.2.1.1 Test execution . 66
6.4.2.1.2 Initial conditions . 66
6.4.2.1.3 Test procedure . 66
6.4.2.2 ATR - Speed enhancement . 66
6.4.2.2.1 Test execution . 66
6.4.2.2.2 Initial conditions . 66
6.4.2.2.3 Test procedure . 66
6.4.2.3 Global Interface bytes . 67
6.4.2.3.1 Test execution . 67
6.4.2.3.2 Initial conditions . 67
6.4.2.3.3 Test procedure . 67
6.4.3 PPS procedure . 67
6.4.3.1 Test execution . 67
6.4.3.2 Initial conditions . 67
6.4.3.3 Test procedure . 67
6.4.4 Reset procedures . 68
6.4.4.1 Test execution . 68
6.4.4.2 Initial conditions . 68
6.4.4.3 Test procedure 1 . 68
6.4.4.4 Test procedure 2 . 68
6.4.4.5 Test procedure 3 . 69
6.4.4.6 Test procedure 4 . 69
6.4.5 Clock stop mode . 69
6.4.5.1 Test execution . 69
6.4.5.2 Initial conditions . 69
6.4.5.3 Test procedure . 69
6.4.6 Bit/character duration and sampling time . 69
6.4.7 Error handling . 70
6.4.7.1 Test execution . 70
6.4.7.2 Initial conditions . 70
6.4.7.3 Test procedure . 70
6.4.8 Compatibility . 70
6.4.8.1 Test execution . 70
6.5 Transmission Protocols . 70
6.5.1 Physical Layer . 70
6.5.1.1 Test execution . 70
6.5.2 Data Link Layer . 70
6.5.2.1 Character Frame . 70
6.5.2.1.1 Test execution .
...