ISO/IEC 14776-232:2001
(Main)Information technology — Small computer system interface (SCSI) — Part 232: Serial Bus Protocol 2 (SBP-2)
Information technology — Small computer system interface (SCSI) — Part 232: Serial Bus Protocol 2 (SBP-2)
This part of ISO/IEC 14776 defines a protocol for the transport of commands and data over High Performance Serial Bus. The transport protocol, Serial Bus Protocol 2 or SBP-2, requires implementations to conform to the requirements of this standard as well as to ISO/IEC 13213:1994 and permits the exchange of commands, data and status between initiators and targets connected to Serial Bus.
Technologies de l'information — Interface de petit ordinateur (SCSI) — Partie 232: Protocole 2 de bus de série (SBP-2)
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INTERNATIONAL ISO/IEC
STANDARD
14776-232
First edition
2001-11
Information technology –
Small computer system interface (SCSI) –
Part 232: Serial Bus Protocol 2 (SBP-2)
Reference number
ISO/IEC 14776-232:2001(E)
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INTERNATIONAL ISO/IEC
STANDARD
14776-232
First edition
2001-11
Information technology –
Small computer system interface (SCSI) –
Part 232: Serial Bus Protocol 2 (SBP-2)
ISO/IEC 2001
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CONTENTS
FOREWORD. 6
1 Scope and object. 7
1.1 Scope. 7
1.2 Object . 7
2 Normative references . 8
3 Definitions and notation. 9
3.1 Definitions . 9
3.1.1 Conformance. 9
3.1.2 Glossary. 9
3.1.3 Abbreviations .12
3.2 Notation .12
3.2.1 Numeric values .12
3.2.2 Bit, byte and quadlet ordering.12
3.2.3 Register specifications .13
3.2.4 State machines .15
4 Model (informative).17
4.1 Unit architecture.17
4.2 Logical units.17
4.3 Requests and responses .17
4.4 Data buffers .18
4.5 Target agents.20
4.6 Ordered and unordered execution .21
5 Data structures.22
5.1 Operation request blocks (ORBs). .23
5.1.1 Dummy ORB .24
5.1.2 Command block ORBs .24
5.1.3 Management ORBs .26
5.2 Page tables. .33
5.2.1 Unrestricted page tables. .34
5.2.2 Normalized page tables.34
5.3 Status block. .35
5.3.1 Request status .37
5.3.2 Unsolicited device status.39
6 Control and status registers.40
6.1 Core registers .40
6.2 Serial Bus-dependent registers.40
6.3 MANAGEMENT_AGENT register.41
6.4 Command block agent registers .41
6.4.1 AGENT_STATE register .42
6.4.2 AGENT_RESET register.43
6.4.3 ORB_POINTER register .43
6.4.4 DOORBELL register .44
6.4.5 UNSOLICITED_STATUS_ENABLE register.45
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14776-232 ISO/IEC:2001(E) – 3 –
7 Configuration ROM.46
7.1 Power reset initialization .46
7.2 Bus information block .47
7.3 Root directory.48
7.3.1 Module_Vendor_ID entry.48
7.3.2 Node_Capabilities entry .48
7.3.3 Unit_Directory entry .48
7.4 Unit directory.49
7.4.1 Unit_Spec_ID entry. .49
7.4.2 Unit_SW_Version entry .49
7.4.3 Command_Set_Spec_ID entry.50
7.4.4 Command_Set entry.50
7.4.5 Command_Set_Revision entry.50
7.4.6 Firmware_Revision entry.51
7.4.7 Management_Agent entry.51
7.4.8 Unit_Characteristics entry .51
7.4.9 Reconnect_Timeout entry.52
7.4.10 Logical_Unit_Directory entry.52
7.4.11 Logical_Unit_Number entry.52
7.4.12 Unit_Unique_ID entry .53
7.5 Logical unit directory .53
7.5.1 Command_Set_Spec_ID entry.54
7.5.2 Command_Set entry.54
7.5.3 Command_Set_Revision entry.54
7.5.4 Logical_Unit_Number entry .54
7.6 Unit unique ID leaf.54
8 Access .56
8.1 Access protocols .56
8.2 Login.56
8.3 Reconnection .57
8.4 Logout.58
9 Command execution.59
9.1 Requests and request lists .59
9.1.1 Fetch agent initialization (informative) .59
9.1.2 Dynamic appends to request lists (informative) .60
9.1.3 Fetch agent use by the BIOS (informative) .61
9.1.4 Fetch agent state machine .61
9.2 Data transfer .64
9.3 Completion status.64
9.4 Unsolicited status .65
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10 Task management .66
10.1 Task sets .66
10.2 Basic task management model .66
10.3 Error conditions.67
10.4 Task management requests.67
10.4.1 Abort task.67
10.4.2 Abort task set .68
10.4.3 Logical unit reset .69
10.4.4 Target reset.69
10.5 Task management event matrix.70
Annex A (normative) Minimum Serial Bus node capabilities .71
Annex B (normative) SCSI command and status encapsulation.73
Annex C (normative) Security extensions.78
Annex D (informative) Sample configuration ROM.81
Annex E (informative) Serial Bus transaction error recovery.85
Annex F (informative) SCSI Architecture Model conformance .87
Figure 1 – Bit ordering within a byte.13
Figure 2 – Byte ordering within a quadlet .13
Figure 3 – Quadlet ordering within an octlet.13
Figure 4 – CSR specification example.14
Figure 5 – State machine example.16
Figure 6 – Linked list of ORBs .18
Figure 7 – Directly addressed data buffer .19
Figure 8 – Indirectly addressed data buffer (via page table) .19
Figure 9 – Address pointer.22
Figure 10 – ORB pointer .22
Figure 11 – ORB family tree.23
Figure 12 – ORB format .23
Figure 13 – Dummy ORB .24
Figure 14 – Command block ORB .25
Figure 15 – Management ORB.27
Figure 16 – Login ORB .28
Figure 17 – Login response .29
Figure 18 – Query logins ORB .30
Figure 19 – Query logins response format.30
Figure 20 – Reconnect ORB .31
Figure 21 – Logout ORB .32
Figure 22 – Task management ORB .33
Figure 23 – Page table element (unrestricted page table) .34
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14776-232 ISO/IEC:2001(E) – 5 –
Figure 24 – Page table element (when page_size equals four).34
Figure 25 – Status block format .36
Figure 26 – TRANSPORT FAILURE format for sbp_status .38
Figure 27 – MANAGEMENT_AGENT format .41
Figure 28 – AGENT_STATE format.42
Figure 29 – AGENT_RESET format .43
Figure 30 – ORB_POINTER format.44
Figure 31 – DOORBELL format.45
Figure 32 – UNSOLICITED_STATUS_ENABLE format.45
Figure 33 – Configuration ROM hierarchy .46
Figure 34 – Bus information block format .47
Figure 35 – Module_Vendor_ID entry format.48
Figure 36 – Node_Capabilities entry format .48
Figure 37 – Unit_Directory entry format .49
Figure 38 – Unit_Spec_ID entry format .49
Figure 39 – Unit_SW_Version entry format .49
Figure 40 – Command_Set_Spec_ID entry format.50
Figure 41 – Command_Set entry format.50
Figure 42 – Command_Set_Revision entry format.50
Figure 43 – Firmware_Revision entry format.51
Figure 44 – Management_Agent entry format.51
Figure 45 – Unit_Characteristics entry format .51
Figure 46 – Reconnect_Timeout entry format.52
Figure 47 – Logical_Unit_Directory entry format .52
Figure 48 – Logical_Unit_Number entry format .52
Figure 49 – Unit_Unique_ID entry format .53
Figure 50 – Unit unique ID leaf format.54
Figure 51 – Fetch agent initialization with a dummy ORB.60
Figure 52 – Fetch agent state machine .62
Figure B.1 – SCSI command block ORB .73
Figure B.2 – SCSI control byte.73
Figure B.3 – Status block format for SCSI sense data.74
Figure C.1 – Set password ORB .79
Figure D.1 – Basic configuration ROM .81
Figure D.2 – SCSI configuration ROM.83
Table 1 – Data transfer speeds .26
Table 2 – Management request functions.27
Table F.1 – SAM-2 Service responses .89
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INFORMATION TECHNOLOGY –
SMALL COMPUTER SYSTEM INTERFACE (SCSI) –
Part 232: Serial bus protocol 2 (SBP-2)
FOREWORD
1) ISO (International Organization for Standardization) and IEC (International Electrotechnical Commission) form the
specialized system for worldwide standardization. National bodies that are members of ISO or IEC participate in
the development of International Standards through technical committees established by the respective
organization to deal with particular fields of technical activity. ISO and IEC technical committees collaborate in
fields of mutual interest. Other international organizations, governmental and non-governmental, in liaison with
ISO and IEC, also take part in the work.
2) In the field of information technology, ISO and IEC have established a joint technical committee, ISO/IEC JTC1.
Draft International Standards adopted by the joint technical committee are circulated to national bodies for voting.
Publication as an International Standard requires approval by at least 75 % of the national bodies casting a vote.
3) Attention is drawn to the possibility that some of the elements of this International Standard may be the subject of
patent rights. ISO and IEC shall not be held responsible for identifying any or all such patent rights.
International Standard ISO/IEC 14776-232 was prepared by subcommittee 25: Inter-
connection of information technology equipment, of ISO/IEC joint technical committee 1:
Information technology.
This publication has been drafted in accordance with the ISO/IEC Directives, Part 3.
Annexes A, B and C form an integral part of this International Standard.
Annexes D, E and F are for information only.
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14776-232 © ISO/IEC:2001(E) – 7 –
INFORMATION TECHNOLOGY –
SMALL COMPUTER SYSTEM INTERFACE (SCSI) –
Part 232: Serial bus protocol 2 (SBP-2)
1 Scope and object
1.1 Scope
This part of ISO/IEC 14776 defines a protocol for the transport of commands and data over
High Performance Serial Bus. The transport protocol, Serial Bus Protocol 2 or SBP-2, requires
implementations to conform to the requirements of this standard as well as to
ISO/IEC 13213:1994 and permits the exchange of commands, data and status between
initiators and targets connected to Serial Bus.
1.2 Object
Original development work for Serial Bus Protocol (SBP) was initiated out of a desire to adapt
SCSI capabilities and facilities to a particular serial environment IEEE 1394. Serial
interconnects offer a migration path for SCSI into the future because they may be better
suited to cost reduction and speed increases than the parallel interconnects first utilized by
SCSI.
As development of the standard progressed, it became evident that the solutions provided by
SBP-2 were of general applicability to large classes of Serial Bus peripheral devices. With this
in mind, the development work was redirected to provide mechanisms for the delivery of
commands, date and status independent of the command set or device class of the
peripheral. SBP-2 provides a generic framework that may be referenced by other documents
or standards that address the unique requirements of a particular class of devices. The
enhanced goals set for the design of SBP-2 are ranked below:
– the protocol should permit the encapsulation of commands, data and status from a
diversity of command sets, legacy as well as future, in order to preserve the investment in
an existing application and operating system software base;
– the protocol should allow the initiator to dynamically add tasks to this set while the target is
active in execution of earlier tasks. The addition of new tasks should not interfere with the
target’s processing of tasks currently active;
– although the protocol should enable varying levels of features and performance in target
implementations, strong focus should be kept on a minimal set deemed adequate for entry-
level environments;
– within the constraints posed by the preceding goal, the hardware and software design of
the initiator should not be unduly affected by variations in target capabilities;
– in order to promote the scalability of aggregate system performance, the protocol should
distribute the DMA context from the initiator adapter to the target devices.
Although SBP-2 has been designed for Serial Bus as currently specified by IEEE 1394, it is
believed that it will be appropriate for use with future extensions to Serial Bus as they are
standardized.
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2 Normative references
The following referenced documents are indispensable for the application of this document.
For dated references, only the edition cited applies. For undated references, the latest edition
of the referenced document (including any amendments) applies.
ISO/IEC 9899:1999, Programming Languages – C
ISO/IEC 13213:1994, Information technology – Microprocessor systems – Control and Status
Register (CSR) Architecture for Microcomputer Buses
ANSI/IEEE 1394:1995, IEEE Standard for High Perfomance Serial Bus
1)
IEEE P1394a, Draft Standard for High Perfomance Serial Bus (Supplement)
2)
BSR X3 PN 1157-D, Information technology – SCSI Architecture Model 2 (SAM-2)
2)
BSR NCITS PN 1236-D, Information technology – SCSI Primary Commands 2 (SPC-2)
1)
Under development. Available from the Institute of Electrical and Electronics Engineers, 445 Hoes Lane, P.O.
Box 1331, Piscataway, NJ 08855-1331
2)
Under development. Available from the National Committee for Information Technology Standards, 1250 Eye
Street, NW, Suite 200, Washington, DC 20005-3922
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14776-232 © ISO/IEC:2001(E)
3 Definitions and notation
3.1 Definitions
3.1.1 Conformance
Several keywords are used to differentiate levels of requirements and optionality, as follows:
3.1.1.1 expected: A keyword used to describe the behavior of the hardware or software in the design
models assumed by this standard. Other hardware and software design models may also be imple-
mented.
3.1.1.2 ignored: A keyword that describes bits, bytes, quadlets, octlets or fields whose values are not
checked by the recipient.
3.1.1.3 may: A keyword that indicates flexibility of choice with no implied preference.
3.1.1.4 reserved: A keyword used to describe objects—bits, bytes, quadlets, octlets and fields—or the
code values assigned to these objects in cases where either the object or the code value is set aside for
future standardization. Usage and interpretation may be specified by future extensions to this or other
standards. A reserved object shall be zeroed or, upon development of a future standard, set to a value
specified by such a standard. The recipient of a reserved object shall not check its value. The recipient of
an object defined by this standard other than reserved shall check its value and reject reserved code
values.
3.1.1.5 shall: A keyword that indicates a mandatory requirement. Designers are required to implement all
such mandatory requirements to assure interoperability with other products conforming to this standard.
3.1.1.6 should: A keyword that denotes flexibility of choice with a strongly preferred alternative. Equivalent
to the phrase “is recommended.”
3.1.2 Glossary
The following terms are used in this standard:
3.1.2.1 byte: Eight bits of data.
3.1.2.2 command block: Space reserved within an ORB to describe a command intended for a logical
unit that controls device functions or the transfer of data to or from device medium. The format and
meaning of command blocks are outside the scope of SBP-2 and are command set- or device-
dependent.
3.1.2.3 device server: A component of a logical unit responsible to execute tasks initiated by command
blocks that specify data transfer or other device operations.
3.1.2.4 initial node space: The 256 terabytes of Serial Bus address space that may be available to each
node. Addresses within initial node space are 48 bits and are based at zero. The initial node space in-
cludes initial memory space, private space, initial register space and initial units space. See either
ISO/IEC 13213 or ANSI/IEEE 1394 for more information on address spaces.
3.1.2.5 initial register space: A two kilobyte portion of initial node space with a base address of
FFFF F000 0000 . Core registers defined by ISO/IEC 13213 are located within initial register space as
16
are Serial Bus-dependent registers defined by ANSI/IEEE 1394.
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14776-232 © ISO/IEC:2001(E)
3.1.2.6 initial units space: A portion of initial node space with a base address of FFFF F000 0800 . This
16
places initial units space adjacent to and above initial register space. The CSRs and other facilities de-
fined by unit architectures are expected to lie within this space.
3.1.2.7 initiator: A node that originates device service or management requests and signals these re-
quests to a target for processing.
10
3.1.2.8 kilobyte: A quantity of data equal to 2 bytes.
3.1.2.9 logical unit: The part of the unit architecture that is an instance of a device model, e.g., disk, CD-
ROM or printer. Targets implement one or more logical units; the device type of the logical units may differ.
3.1.2.10 login: The process by which an initiator obtains access to a set of target fetch agents. The target
fetch agents and their control and status registers provide a mechanism for an initiator to signal ORBs to
the target.
3.1.2.11 login ID: A value assigned by the target during the login process. The login ID establishes a rela-
tionship between an initiator and a task set. The
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