HD 592 S1:1991

Binary floating-point arithmetic for microprocessor systems

Defines ways for new microprocessor systems to perform binary floating point arithmetic in software, in hardware or in any combination of hardware and software. Note: -For the price of this publication, please consult the ISO/IEC price-code list.

Binäre Gleitpunkt-Arithmetik für Mikroprozessor-Systeme

Arithmétique binaire en virgule flottante pour systèmes à microprocesseurs

Définit, pour les nouveaux systèmes à microprocesseurs, la façon de manipuler l'arithmétique binaire en virgule flottante sous forme de logiciel, de matériel ou d'une quelconque combinaison des deux. Note: - Pour le prix de cette publication, veuillez consulter la liste du code-prix ISO/CEI.

Binarna aritmetika s plavajočo vejico za mikroprocesorske sisteme (IEC 60559:1989)

General Information

• Status: Withdrawn
• Publication Date: 27-May-1991
• Technical Committee: CLC/SS V24 - Information technology equipment and audio, video and audio-visual equipment and systems
• Drafting Committee: ISO/IEC/JTC 1/SC25 - ISO/IEC_JTC_1/SC25
• Parallel Committee: ISOIEC/JTC 1/SC25 - ISOIEC_JTC_1/SC25
• Ref Project: SIST HD 592 S1:1997 - Binary floating-point arithmetic for microprocessor systems

Standards Content (Sample)

SLOVENSKI STANDARD
SIST HD 592 S1:1997
01-avgust-1997
%LQDUQDDULWPHWLNDVSODYDMRþRYHMLFR]DPLNURSURFHVRUVNHVLVWHPH,(&

Binary floating-point arithmetic for microprocessor systems
Binäre Gleitpunkt-Arithmetik für Mikroprozessor-Systeme
Arithmétique binaire en virgule flottante pour systèmes à microprocesseurs
Ta slovenski standard je istoveten z: HD 592 S1:1991
ICS:
35.160 Mikroprocesorski sistemi Microprocessor systems
SIST HD 592 S1:1997 en
2003-01.Slovenski inštitut za standardizacijo. Razmnoževanje celote ali delov tega standarda ni dovoljeno.

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SIST HD 592 S1:1997

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SIST HD 592 S1:1997

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SIST HD 592 S1:1997

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SIST HD 592 S1:1997
NORME CEI
INTERNATIONALE IEC
60559
INTERNATIONAL
Deuxième édition
STAN DARD
Second edition
1989-01
Arithmétique binaire en virgule flottante
pour systèmes à microprocesseurs
Binary floating-point arithmetic
for microprocessor systems
© IEC 1989 Droits de reproduction réservés — Copyright - all rights reserved
Aucune partie de cette publication ne peut être reproduite ni No part of this publication may be reproduced or utilized in
utilisée sous quelque forme que ce soit et par aucun any form or by any means, electronic or mechanical,
procédé, électronique ou mécanique, y compris la photo- including photocopying and microfilm, without permission in
copie et les microfilms, sans l'accord écrit de l'éditeur. writing from the publisher.
International Electrotechnical Commission 3, rue de Varembé Geneva, Switzerland
Telefax: [phone] e-mail: [e-mail] IEC web site http: //www.iec.ch
CODE PRIX
Commission Electrotechnique Internationale
S
PRICE CODE
International Electrotechnical Commission
IEC
Me?NgyHapogHaR 3neKTpOTexH114eCNHA HOMNCCNA
Pour prix, voir catalogue en vigueur
• • For price, see current catalogue

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SIST HD 592 S1:1997
559©IEC - 3 -
CONTENTS
Page
FOREWORD 5
5
PREFACE
Clause
7
1. Scope
7.
1.1 Implementation objectives
7
1.2 Inclusions
7
1.3 Exclusions
7
2. Definitions
11
3. Formats
13
3.1 Sets of values
15
3.2 Basic formats
17
3.3 Extended formats
17
3.4 Combinations of formats
19
4. Rounding
4.1 Round to nearest 19
4.2 Directed roundings 19
19
4.3 Rounding precision
5. Operations 21
5.1 Arithmetic 21
5.2 Square root 23
5.3 Floating-point format conversions 23
5.4 Conversions between floating-point and integer 23
5.5 Round floating-point number to integral value 23
4-4
5.6 Binary decimal conversion 23
5.7 Comparison 27
31
6. Infinity, NaNs and signed zero
31
6.1 Infinity arithmetic
31
6.2 Operations with NaNs
6.3 33 The sign bit
33
7. Exceptions
33
7.1 Invalid operations
35
7.2 Division by zero
35
7.3 Overflow
37
7.4 Underflow
7.5 39 Inexact
Traps 39
8.
8.1 41 Trap handler
41
8.2 Precedence
APPENDIX A - Recommended functions and predicates 43

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SIST HD 592 S1:1997
©
559 IEC - 5
INTERNATIONAL ELECTROTECHNICAL COMMISSION
BINARY FLOATING -POINT ARITHMETIC
FOR MICROPROCESSOR SYSTEMS
FOREWORD
1) The formal decisions or agreements of the IEC on technical matters,
prepared by Technical Committees on which all the National Committees
having a special interest therein are represented, express, as nearly
as possible, an international consensus of opinion on the subjects
dealt with.
They have the form of recommendations for international use and they
2)
are accepted by the National Committees in that sense.
3) In order to promote international unification, the IEC expresses the
wish that all National Committees should adopt the text of the IEC
recommendation for their national rules in so far as national
conditions will permit. Any divergence between the IEC recommendation
and the corresponding national rules should, as far as possible, be
clearly indicated in the latter.
PREFACE
This standard has been prepared by Sub-Committee 47B: Microprocessor
systems, of IEC Technical Committee No. 47: Semiconductor devices. (This
Sub-Committee has been taken over by ISO/IEC JTC 1 . )
This second edition of IEC Publication 559 replaces the first edition
issued in 1982.
The text of this standard is based on the following documents:
Six Months' Rule Report on Voting
47B(CO)19 47B(CO)26
Full information on the voting for the approval of this standard can be
found in the Voting Report indicated in the above table.

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SIST HD 592 S1:1997
559 ©I EC - 7 -
BINARY FLOATING-POINT ARITHMETIC
FOR MICROPROCESSOR SYSTEMS
1. Scope
1.1 Implementation objectives
It is intended that an implementation of a floating-point system
conforming to this standard can be realized entirely in software,
entirely in hardware, or in any com
...