ISO/IEC 11518-6:2000

Information technology - High-Performance Parallel Interface - Part 6: Physical Switch Control (HIPPI-SC)

This part of ISO/IEC 11518 defines the control for HIPPI physical layer switches. HIPPI by itself is an efficient simplex high-performance point-to-point interface. The physical switch control allows the interconnection of multiple HIPPI based equipments with HIPPI physical layer switches. Characteristics of this HIPPI physical switch control protocol include: - support for both source routing and destination addresses; - I-Fields and CCIs can span multiple physical layer switches within a fabric; - when a Destination end-point receives a packet, it can easily manipulate the I-Field received to return a reply packet to the Source; - support for physical layer switches with differing numbers of ports, all within the same fabric; - specified reserved addresses to aid address self-discovery, switch management, and switch control. The purpose of this part of ISO/IEC 11518 is to facilitate the development and use of the HIPPI in computer systems by providing common physical switch control. It provides switch control structures for physical layer switches interconnecting computers, high-performance display systems, and high-performance, intelligent block-transfer peripherals. This part of ISO/IEC 11518 also applies to point-to-point HIPPI topologies.

General Information

• Status: Published
• Publication Date: 24-Oct-2000
• ICS: 35.200 - Interface and interconnection equipment
• Technical Committee: ISO/IEC JTC 1/SC 25 - Interconnection of information technology equipment
• Current Stage: PPUB - Publication issued
• Start Date: 25-Oct-2000
• Completion Date: 30-Sep-2000

Relations

• Revises: ISO/IEC 11518-6:1996 - Information technology - High-Performance Parallel Interface - Part 6: Physical Switch Control (HIPPI-SC)
• Effective Date: 05-Sep-2023

Overview

ISO/IEC 11518-6:2000 - Information technology - High-Performance Parallel Interface - Part 6: Physical Switch Control (HIPPI-SC) defines the control protocol for HIPPI physical-layer switches. HIPPI-SC specifies the 32-bit I-Field / Connection Control Information (CCI) format and the behaviors required for switching HIPPI point-to-point links into a multi-port fabric. The standard enables interconnection of multiple HIPPI-based devices (computers, high-performance displays, block-transfer peripherals) while supporting both source routing and logical addressing across a fabric.

Key topics and technical requirements

• I-Field / CCI format (32 bits): bit assignments include L (locally administered), VU (vendor-unique), W (double-wide / cable selection), D (direction), PS (path selection), C (camp-on), and the Routing Control field.
• Source routing (PS = 00): Routing Control is split into sub-fields sized [Log N] for an N×N switch; switches consume the current sub-field, insert their input port, and shift the field to forward packets.
• Logical addressing (PS = 01 or 11): Routing Control carries two 12-bit logical addresses (Destination and Source) with interpretation dependent on the D bit.
• Camp-on (C bit): Optional behavior to wait for a busy path rather than immediate rejection; selection algorithm is implementation-specific.
• Double-wide support (W bit): Indicates 800 Mbit/s (single cable) vs 1 600 Mbit/s (dual-cable) operation and maps to Cable-A/B interconnects.
• Reserved logical addresses: A range (e.g., F90–FBF) is reserved for address self-discovery and switch management; trial self-discovery addresses facilitate iterative discovery (optional feature).
• Fabric behavior: I-Fields and CCIs can span multiple switches; reply packets can reuse or invert D to return along the discovered path.
• Normative reference: ISO/IEC 11518-1 (HIPPI-PH) defines the mechanical/electrical signalling used with the CCI.

Applications and who uses it

• System architects and network engineers designing HIPPI-based interconnect fabrics for high-performance computing (HPC) clusters, visualization systems, and block-transfer peripherals.
• Switch and NIC vendors implementing HIPPI physical-layer switches and ensuring interoperability across diverse port counts and cable configurations.
• Integrators and test labs performing interoperability testing, address self-discovery, and switch management in legacy HIPPI deployments or specialized HPC environments.
• Anyone implementing point-to-point HIPPI topologies where common physical switch control is required.

Related standards

• ISO/IEC 11518-1: HIPPI-PH (Mechanical, electrical, signalling) - normative reference
• ISO/IEC 11518 parts: HIPPI-FP (Part 2), HIPPI-LE (Part 3), HIPPI-IPI (Part 4), HIPPI-MI (Part 5), HIPPI-ATM (Part 8), HIPPI-Serial (Part 9)

Keywords: ISO/IEC 11518-6, HIPPI-SC, HIPPI physical switch control, I-Field, Connection Control Information, source routing, logical address, HIPPI fabric, high-performance interconnect.

Standards Content (Sample)

INTERNATIONAL ISO/IEC
STANDARD
11518-6
Second edition
2000-10
Information technology –
High-Performance Parallel Interface –
Part 6:
Physical Switch Control (HIPPI-SC)
Reference number
INTERNATIONAL ISO/IEC
STANDARD
11518-6
Second edition
2000-10
Information technology –
High-Performance Parallel Interface –
Part 6:
Physical Switch Control (HIPPI-SC)
 ISO/IEC 2000
All rights reserved. Unless otherwise specified, no part of this publication may be reproduced or utilized in any form or by any
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– 2 – 11518-6 © ISO/IEC:2000(E)
CONTENTS
Page
FOREWORD . 3
INTRODUCTION .4
Clause
1 Scope . 5
2 Normative references. 5
3 Definitions and conventions . 5
3.1 Definitions . 5
3.2 Editorial conventions. 7
4 CCI and I-Field formats. 7
4.1 Format. 7
4.2 Source routing . 8
4.3 Logical address . 8
4.4 Reserved Logical Addresses. 8
5 Switch behavior . 10
5.1 Use of INTERCONNECT signals. 10
5.2 CLOCK signal . 10
5.3 Connection request successful . 10
5.4 Breaking a connection . 11
5.5 Connection request unsuccessful. 11
Annex A (informative) Routing with the CCI and I-Field . 13
Annex B (informative) Implementation considerations . 19
Bibliography . 25
Figure 1 – CCI and I-Field format . 9
Figure 2 – I-Field with source routing, D = 0, and 16 by 16 switch . 9
Figure 3 – I-Field with source routing, D = 1, and 32 by 32 switch . 9
Figure 4 – I-Field with logical addressing and D = 0 . 9
Figure 5 – I-Field with logical addressing and D = 1 . 9
Figure A.1 – Physical layer switch example . 13

11518-6 © ISO/IEC:2000(E) – 3 –
INFORMATION TECHNOLOGY –
HIGH-PERFORMANCE PARALLEL INTERFACE –
Part 6: Physical Switch Control (HIPPI-SC)
FOREWORD
1) ISO (International Organization for Standardization) and IEC (International Electrotechnical Commission) form
the specialized system for worldwide standardization. National bodies that are members of ISO or IEC
participate in the development of International Standards through technical committees established by the
respective organization to deal with particular fields of technical activity. ISO and IEC technical committees
collaborate in fields of mutual interest. Other international organizations, governmental and non-governmental,
in liaison with ISO and IEC, also take part in the work.
2) In the field of information technology, ISO and IEC have established a joint technical committee, ISO/IEC JTC1.
Draft International Standards adopted by the joint technical committee are circulated to national bodies for
voting. Publication as an International Standard requires approval by at least 75 % of the national bodies
casting a vote.
3) Attention is drawn to the possibility that some of the elements of this International Standard may be the subject
of patent rights. ISO and IEC shall not be held responsible for identifying any or all such patent rights.
International Standard ISO/IEC 11518-6 was prepared by subcommittee 25: Interconnection
of information technology equipment, of ISO/IEC joint technical committee 1: Information
technology.
This second edition cancels and replaces the first edition published in 1996. The changes are
upward compatible and consist mainly of a local address self-discovery method detailed in
annex B.3.
This publication has been drafted in accordance with the ISO/IEC Directives, Part 3.
ISO/IEC 11518 consists of the following parts, under the general title Information technology –
High-Performance Parallel Interface:
– Part 1: Mechanical, electrical, and signalling protocol specification (HIPPI-PH)
– Part 2: Framing Protocol (HIPPI-FP)
– Part 3: Encapsulation of ISO/IEC 8802-2 (IEEE Std 802.2) Logical Link Control Protocol
Data Units (HIPPI-LE)
– Part 4: Mapping of HIPPI to IPI device generic command sets (HIPPI-IPI)
– Part 5: Memory Interface (HIPPI-MI)
– Part 6: Physical Switch Control (HIPPI-SC)
– Part 8: Mapping to Asynchronous Transfer Mode (HIPPI-ATM)
– Part 9: Serial Specification (HIPPI-Serial)
Annexes A and B are for information only.

– 4 – 11518-6 © ISO/IEC:2000(E)
INTRODUCTION
This part of ISO/IEC 11518 defines the control for HIPPI physical layer switches. HIPPI by
itself is an efficient simplex high-performance point-to-point interface. The physical switch
control allows the interconnection of multiple HIPPI based equipments with HIPPI physical
layer switches.
Characteristics of this HIPPI physical switch control protocol include:
– support for both source routing and destination addresses;
– I-Fields and CCIs can span multiple physical layer switches within a fabric;
– when a Destination end-point receives a packet, it can easily manipulate the I-Field
received to return a reply packet to the Source;
– support for physical layer switches with differing numbers of ports, all within the same
fabric;
– specified reserved addresses to aid address self-discovery, switch management, and
switch control.
11518-6 © ISO/IEC:2000(E) – 5 –
INFORMATION TECHNOLOGY –
HIGH-PERFORMANCE PARALLEL INTERFACE –
Part 6: Physical Switch Control (HIPPI-SC)
1 Scope
This part of ISO/IEC 11518 specifies a control for physical layer switches using the High-
Performance Parallel Interface (HIPPI), a high-performance point-to-point interface between
data-processing equipment. This part of ISO/IEC 11518 does not protect against errors
introduced by intermediate devices interconnecting multiple HIPPI-PHs.
The purpose of this part of ISO/IEC 11518 is to facilitate the development and use of the
HIPPI in computer systems by providing common physical switch control. It provides switch
control structures for physical layer switches interconnecting computers, high-performance
display systems, and high-performance, intelligent block-transfer peripherals. This part of
ISO/IEC 11518 also applies to point-to-point HIPPI topologies.
2 Normative references
The following normative documents contain provisions which, through reference in this text,
constitute provisions of this part of ISO/IEC 11518. For dated references, subsequent
amendments to, or revisions of, any of these publications do not apply. However, parties to
agreements based on this part of ISO/IEC 11518 are encouraged to investigate the possibility
of applying the most recent edition of the normative documents indicated below. For undated
references, the latest edition of the normative document referred to applies. Members of IEC
and ISO maintain registers of currently valid International Standards.
ISO/IEC 11518-1:1995, Information technology – High-Performance Parallel Interface –
Part 1: Mechanical, electrical, and signalling protocol specification (HIPPI-PH)
3 Definitions and conventions
3.1 Definitions
For the purposes of this part of ISO/IEC 11518, the following definitions apply.
3.1.1
connection
condition of the HIPPI-PH when data transfers from a Source end-point to a Destination end-
point are possible
3.1.2
connection control information (CCI)
a parameter sent as part of the sequence of operations establishing a connection from a
Source to a Destination
3.1.3
end-point
the equipment at either end of the fabric for a particular connection
3.1.4
destination
the equipment at the end of the interface that receives the data

– 6 – 11518-6 © ISO/IEC:2000(E)
3.1.5
destination end-point
the equipment at the end of the fabric that receives the data
3.1.6
fabric
a group of one or more physical layer switches that can be traversed with one I-Field
3.1.7
I-Field
a 32-bit field that is sent as part of the sequence of the physical layer operations establishing
a connection from a Source to a Destination
3.1.8
interface
the set of protocols and control signals used to connect a Source and Destination, as defined
by HIPPI-PH
Within a fabric, an interface connects an end-point to a switch or a switch to a neighbouring
switch.
3.1.9
Logical Address
an address stored in an I-Field that uniquely identifies a Destination end-point or set of end-
points
3.1.10
nibble
a 4-bit entity
3.1.11
optional
features that are not required by this part of ISO/IEC 11518. However, if any optional feature
defined by this part of ISO/IEC 11518 is implemented, it shall be implemented according to
this part of ISO/IEC 11518
3.1.12
packet
a data set, as defined by HIPPI-PH, sent from Source to Destination. A packet is composed of
one or more bursts
3.1.13
physical layer switch
a device which allows a single HIPPI physical layer interface to switch between multiple HIPPI
physical layer interfaces without involving protocols above the HIPPI Mechanical, Electrical,
and Signalling Protocol Specification (HIPPI physical layer)
3.1.14
source
the equipment at the end of the interface that transmits the data
3.1.15
source Address
an address stored in an I-Field that uniquely identifies a Source end-point or set of end-points
3.1.16
source end-point
the equipment at the end of the fabric that transmits the data

11518-6 © ISO/IEC:2000(E) – 7 –
3.1.17
source routing
a means of packet routing whereby the Source end-point specifies the action of each switch
on the way to the Destination
3.2 Editorial conventions
In this part of ISO/IEC 11518, certain terms that are proper names of signals, state
mnemonics, or similar terms are printed in uppercase to avoid possible confusion with other
uses of the same words (for example, REQUEST). Any lowercase uses of these words have
the normal technical English meaning.
A number of conditions, sequences, parameters, events, states, or similar terms are printed
with the first letter of each word in uppercase and the rest lowercase (for example, Source).
Any lowercase uses of these words have the normal technical English meaning.
4 CCI and I-Field formats
4.1 Format
The connection control information (CCI) shall be used for controlling HIPPI physical layer
switches. Within ISO/IEC 11518-1 (HIPPI-PH) the CCI is used as the I-Field, and is asserted
on the HIPPI-PH Data Bus during a connection sequence. The format of the CCI (I-Field) is
shown in figure 1. Examples of CCI and I-Field usage for routing are contained in annex A.
L = Locally Administered (bit 31) = 0 designates that the I-Field is defined by this part of
ISO/IEC 11518. L = 1 designates that the rest of the I-Field, bits 30 - 0, are locally
administered and are not defined by this part of ISO/IEC 11518.
VU = Vendor_Unique (bits 30,29). The contents of the Vendor_Unique bits are not defined in
this part of ISO/IEC 11518. Switches shall pass these bits unmodified to the Destination.
NOTE 1 These bits are available for providing signals to Destinations. Such signals can be used to modify the
Destination's behaviour or supply it with additional information on the purpose of the attempted connection.
W = Double-wide (bit 28) = 0 designates that the Source is using the 800 Mbit/s data rate
option (DATA BUS is 32 bits wide as defined in HIPPI-PH); the switch shall connect through
Cable-A. W = 1 designates that the Source is using the 1 600 Mbit/s data rate option (DATA
BUS is 64 bits wide); the switch shall connect through both Cable-A and Cable-B.
NOTE 2 The W bit is used in conjunction with the INTERCONNECT signals on Cable-A and Cable-B. The
INTERCONNECT signals, as defined in HIPPI-PH, tell a switch or end-point that the cable is physically attached to
an active HIPPI port. The W bit is used to tell the switch, or Destination end-point, whether or not Cable-B is being
used in particular connection.
D = Direction (bit 27) = 0, designates that the right-hand end (least significant bits) of the
Routing Control field shall be the current sub-field. D = 1 designates that the left-hand end
(most significant bits) of the Routing Control field shall be the current sub-field.
NOTE 3 When a reverse path exists, a Destination end-point may return a reply to a received packet by simply
using the same I-Field that it received with the D bit complemented. For this to work correctly with source routing
(PS = 00) the return path must be symmetrical with the forward path.
PS = Path Selection (bits 26, 25). Used to select either (1) a source route (i.e., a specific
route through the switches, with output port numbers specified for each switch) or (2) to
specify the Logical Address.
00 = source routing: Source selects the route through the switches.
01 = Logical address: Switches select the first route from a list of possible routes.
10 = reserved
11 = logical address: Switches select a route.

– 8 – 11518-6 © ISO/IEC:2000(E)
C = Camp-on (bit 24) = 0 specifies that the switch shall reply with a connection reject
sequence if unable to complete the connection. C = 1 specifies that the switch shall attempt to
establish a connection until either the connection is completed or the Source aborts the
connection request.
Camp-on is used by the Source to tell a switch to wait for the selected path (or paths) to
become available, i.e., the switch should not generate a rejected connection sequence
because the selected path is busy. The algorithm used by a switch to select among multiple
Sources camped-on to a single Destination is implementation-specific and is not specified in
this part of ISO/IEC 11518.
NOTE 4 A HIPPI rejected connection has a different set of meanings depending on whether or not the Camp-on
feature is being used. See clause B.1 for details.
4.2 Source routing
When PS = 00 (i.e., source routing) the Routing Control field shall be split into multiple sub-
fields, with the size of each sub-field dependent upon the size of the switch that is using it.
The number of bits in the sub-field is described as [Log N] where N is the switch size. For
example, a 16 by 16 switch would use a 4-bit sub-field.
When D = 0, a switch shall use the current sub-field (right most bits of the Routing Control
field) to select the switch output port. The switch shall right shift the Routing Control field by
the number of bits in the sub-field, and shall insert the switch input port number in the left
most bits of the Routing Control field. See figure 2.
When D = 1, the same actions occur except that the current sub-field shall be at the left end
of the Routing Control field. The Routing Control field shall be shifted left, and the input port
number shall be inserted at the right end of the Routing Control field. See figure 3.
A switch shall not alter the I-Field except when PS=00, and then, only the Routing Control
field shall be modified.
4.3 Logical address
When PS = 01 or 11 (i.e., logical address) the Routing Control field shall be split into two
12-bit fields. One 12-bit field specifies the address of the Destination end-point(s), the other
specifies the address of the Source end-point. When the direction D bit = 0, the right-hand
12 bits shall specify the Destination end-points Logical Address and the left-hand 12 bits shall
specify the Source end-points Logical Address (see figure 4). When D = 1, the opposite is
true (see figure 5).
4.4 Reserved Logical Addresses
Part of the range of logical addresses is reserved to designate the addresses of network
services whose location in the network may vary, and for other network management
functions. All others are available for assignment to specific Destinations. The logical
addresses assigned at the time this part of ISO/IEC 11518 was approved include the following
(shown in hexadecimal notation).
NOTE 5 Later registrations will be added as an addendum to this part of ISO/IEC 11518.
F90 – FBF Trial self-discovery addresses. These addresses are reserved for an iterative
address self-discovery algorithm. F9x tests the low-order 4-bit nibble, FAx tests
the middle 4-bit nibble, and FBx tests the high-order 4-bit nibble, of the switch
port's logical address. If the low-order 4-bit nibble of the trial self-discovery
address (i.e., the "x" in Fnx) matches the selected nibble in the switch port's
logical address, then the switch shall establish a connection back to a HIPPI
Destination that is paired with the HIPPI port requesting the connection, i.e., a
loopback. If the trial self-discovery nibble values are not equal, the switch shall
reject the connection. For example, if the logical address for port "J" is "xyz"
where "x", "y", and "z" are 4-bit nibbles, then loopback connections shall be made
when trial logical addresses F9"z", FA"y", and FB"x" are used. (See B.3.3 and
B.3.5.) Support of this feature is optional.

11518-6 © ISO/IEC:2000(E) – 9 –
Bit 31 23 15 7 0
LCVU WD PS Routing Control
Figure 1 – CCI and I-Field format
Log N
31 23 15 7 0
Input
L VU W D PS C Dest
Other routing information
to the
0 xx x 0 00 Port
x
switch
Output
L VU W D PS C Source
Other routing information
from the
0 xx x 0 00
x Port
switch
Figure 2 – I-Field with source routing, D = 0, and 16 by 16 switch
Log N
31 23 15 7 0
Input
L VU W D PS C Dest
Other routing information
to the
0 xx x 1 00 Port
x
switch
Output
L VU W D PS C Source
Other routing information
from the
0 xx x 1 00 Port
x
switch
Figure 3 – I-Field with source routing, D = 1, and 32 by 32 switch
31 23 11 0
L VU W D PS C
Source Address Logical Address
0 xx x 0 x1 x
Figure 4 – I-Field with logical addressing and D = 0
31 23 11 0
L VU W D PS C
Logical Address Source Address
0 xx x 1 x1
x
Figure 5 – I-Field with logical addressing and D = 1
FC0 – FDF Reserved for local use
FE0 Messages pertaining to switch configuration, including HIPPI-LE Address Resolution
requests as described in RFC 1374 "IP and ARP on HIPPI" [1].
FE1 All IP protocol traffic conventionally directed to the IEEE 802.1 broadcast address as
described in RFC 1042 "Standard for IP transmission over 802 networks" [2].
FE2 RFC 1112 Host extensions for IP multicasting Class D addresses not assigned below
[3].
– 10 – 11518-6 © ISO/IEC:2000(E)
FE3 RFC 1131 OSPF specification All Routers (Class D address 224.0.0.5) [4].
FE4 RFC 1131 OSPF specification All Designated Routers (Class D address 224.0.0.6) [4].
FE5 – FE7 Reserved
FE8 ISO/IEC 9542:1988 CLNP ES-IS all ES's [5].
FE9 ISO/IEC 9542:1988 CLNP ES-IS all IS's [5].
FEA ISO/IEC 10589:1992 IS-IS all Level 1 IS's [6].
FEB ISO/IEC 10589:1992 IS-IS all Level 2 IS's [6].
FEC ISO/IEC 15802-3:1998, clause 8, MAC Bridging flooding. [7].
FED ISO/IEC 15802-3:1998, clause 8, Bridging Spanning Tree Protocol. [7].
FEE Embedded switch management agent. Support of this feature is optional.
FEF – FFC Reserved
FFD Loopback logical address for switches to use when probing other switches. Support of
this feature is optional.
FFE Loopback logical address for hosts to use when probing switches for the host's logical
address. This value is reserved for the establishment of a connection back to a HIPPI
Destination that is paired with the HIPPI Source requesting the connection. (See B.3.2
and B.3.5.) Support of this feature is optional.
FFF Unknown or unassigned address. This value should never be used to address a
Destination or Destinations. It can be used to indicate that the Source is unaware of its
Source Address in the CCI, or to signify an unknown Logical Address in higher layer
protocols. A HIPPI-SC switch may alter the I-Field, substituting a valid Source Address
for this value. Support for this address substitution is optional. Such substitution may be
used to aid in discovery of a system's logical switch address by higher layer protocols.
(See B.3.1, B.3.2, and B.3.5.)
The protocols used to access these services and the means whereby these services keep
track of their configuration of the network are outside the scope of this part of ISO/IEC 11518.
5 Switch behavior
A HIPPI physical switch has input ports (attachments to HIPPI Sources) and output ports
(attachments to HIPPI Destinations). These HIPPI ports shall conform to either the HIPPI-PH
or HIPPI-Serial specifications. This clause defines how an HIPPI physical switch behaves with
regards to the states of the HIPPI-PH control signals on the input and output ports for a
particular connection operation.
5.1 Use of INTERCONNECT signals
As defined in HIPPI-PH, each switch input port and output port shall generate an
INTERCONNECT signal when that port is "on-line"; i.e., powered on and enabled for HIPPI
connections. Each switch input and output port shall monitor the received INTERCONNECT
signal and shall use this signal to validate all other HIPPI control signals.
NOTE 6 A switch port may deassert the INTERCONNECT signal when that port is disabled for maintenance or
diagnostics.
5.2 CLOCK signal
The HIPPI CLOCK signal generated by the switch output port (a HIPPI Source) shall be
continuous and shall conform to the HIPPI-PH specification at all times.
5.3 Connection request successful
Once a connection is completed the switch shall be transparent, with the exception of switch
induced latency, to the HIPPI signal sequences.
NOTE 7 The switch acts as a repeater under the constraints imposed by 7.9 of ISO/IEC 11518-1, and can change
the number of idle words between bursts or packets.

11518-6 © ISO/IEC:2000(E) – 11 –
5.4 Breaking a connection
Either the Source end-point or the Destination end-point may break a connection.
5.4.1 Source deasserts REQUEST
When the Source end-point deasserts the REQUEST signal, the switch shall break the
connection. The switch shall not wait for the Destination end-point to deassert the CONNECT
signal to break the connection. The Source end-point will see the CONNECT signal go false
regardless of Destination end-point actions.
NOTE 8 This immediate disconnection frees the associated input port for the next connection-request. This
maximizes the efficiency of the HIPPI attachment by allowing the Source end-point to make a new connection
without waiting for the propagation delay and the Destination end-point disconnect turn-around time.
5.4.2 Destination deasserts CONNECT
When the Destination end-point deasserts the CONNECT signal, the connection through the
switch shall be broken. The switch shall not wait for the Source end-point to deassert the
REQUEST signal to break the connection. The Destination end-point will see the REQUEST
signal go false regardless of Source end-point actions.
5.4.3 INTERCONNECT false
If the INTERCONNECT signal, received by either the switch input port or the switch output
port, goes false during any stage of a connection then the connection through the switch shall
be broken.
5.5 Connection request unsuccessful
Connection requests can be unsuccessful due to:
– unavailable Destination end-points;
– unavailable fabric resources;
– errors.
5.5.1 Down-stream connection reject
A rejected connection sequence can be initiated by either a down-stream switch or the
Destination end-point. A rejected connection sequence shall be propagated through the
switch without change. When the switch detects the CONNECT signal is false, at the end of
the sequence, the connection through the switch shall be broken.
5.5.2 Switch-generated connection reject
The switch input port logic shall initiate a rejected connection sequence to the Source end-
point, and shall not complete the connection through the switch, in the following situations:
– when the selected output port(s), or Destination end-point, does not exist or is
unavailable. For example, when the INTERCONNECT signal received by the selected
output port is false;
– when the selected output port(s) is(are) busy, i.e., connected to some other port, and
Camp-on = 0;
– when a data parity error is detected on the I-Field while connecting through this switch.
The switch is not obligated to check the I-Field parity after the REQUEST signal has been
propagated through the switch;
– when the I-Field Path Selection (bits 26, 25) specifies an addressing mode not supported
or disabled;
– when the I-Field Path Selection (bits 26, 25) specifies logical addressing, and the
Destination logical address is not mapped to any physical output port;

– 12 – 11518-6 © ISO/IEC:2000(E)
– when the I-Field Double-wide (bit 28) selection conflicts with the switch capabilities or the
end-point capabilities. Clause B.2 discusses such conflicts;
– when the I-Field Locally Administered (bit 31) selection is not supported by the switch.
5.5.3 Connection request contention
When two or more input ports vie for the same output port only one input port can "win". The
winner shall be connected through the switch. The loser(s) shall either wait for the output port
to become available (i.e., Camp-on = 1), or the input port(s) shall generate a rejected
connection sequence (i.e., Camp-on = 0).

11518-6 © ISO/IEC:2000(E) – 13 –
Annex A
(informative)
Routing with the CCI and I-Field
A.1 General example
The CCI and I-Field are used to control HIPPI physical layer switches, supporting the
interconnection of many HIPPI devices. Figure A.1 is an example of a small general
configuration that will be used to describe the operation of the CCI and I-Field as specified in
clause 4. Three hosts, A, B, and C, are shown, but there will probably be many more hosts
connected in an actual configuration. The switching fabric is the interconnection mechanism,
in this example the four switches and the interconnecting HIPPI links.
Switch 1 Switch 2 Switch 3
AB12 36 8 9
7 3
Switch 4
C
Figure A.1 – Physical layer switch example
Two types of operation are specified: (1) source routing, and (2) logical address. The direction
of interpretation of the Routing Control field is also under user control, allowing a Destination
end-point to return a reply by simply using the same I-Field that was received with the
direction bit complemented.
A.2 Source routing
With source routing, the Source end-point specifies the action of each switch on the way to
the Destination. For example, to go from host-A to host-B, host-A could specify 2, 6, 9. This
would result in switch-1 selecting output port-2, switch-2 selecting output port-6, and switch-3
selecting output port-9. Alternatively, host-A could have specified 7, 5, 9 to go through switch-
4 instead of switch-2.
For connection or packet routing, this involves an end-point (the "originator" or "Source")
having to know the physical route to a particular Destination before a connection can be
established. When using multiple switches (where the switches have no intelligence with
regards to network routing), the Source has to establish the entire physical route for a given
connection. Source routing can often facilitate low latency connections because the switches
have no burden of decision making during the connection process. However, source routing
can be unattractive for a configuration with the following features:
a) large and/or dynamic configuration (the hosts must keep track of the interconnection
configuration);
b) "blocking" configuration (there is a path to the Destination available, but it is not the one
specified, and the one specified is unavailable);
c) no mechanism that allows a node to "discover" the addresses and associated routes for
other nodes.
– 14 – 11518-6 © ISO/IEC:2000(E)
Source routing can be very valuable for diagnostics. By specifying a particular path, a
diagnostic program can determine if that path is operable. Source routing can also be
attractive when certain paths are more desirable to use than other paths based on criteria that
the switches are unaware of, for example, usage costs associated with particular links.
When using source routing with the CCI and I-Field as specified in clause 4, PS = 00 and the
Routing Control contains the route information. The eight high-order bits of the I-Field will be
called Ctl. If the switches are 16 × 16 switches using 4-bit addresses, and the direction bit
(D) = 0, then to go from host-A to host-B through switch-2, host-A would set the
I-Field = Ctl, x, x, x, 9, 6, 2, (in hexadecimal). When received at switch-1, switch-1 picks off
the low order 4 bits (the low order because D=0, 4 bits because the switch size = 16 × 16) and
connects input port-1 to output port-2. It also shifts the Routing Control field of the I-Field to
the right and inserts switch-1's input port number in the left end of the Routing Control field.
When received at switch-2, the I-Field will be Ctl, 1, x, x, x, 9, 6. Likewise, when it reaches
switch-3 it will be Ctl, 3, 1, x, x, x, 9. When it reaches host-B, it will be Ctl, 8, 3, 1, x, x, x.
In summary:
Ctl = L = 0 (not a locally administered I-Field)
VU = xx (Vendor Unique bits ignored)
W = x (this example is not concerned with width)
D = 0 (direction bit)
PS = 00 (source routing)
C = x (this example is not concerned with Camp-on)
At A and input to switch-1: I-Field = Ctl, x, x, x, 9, 6, 2
At input to switch-2: I-Field = Ctl, 1, x, x, x, 9, 6
At input to switch-3: I-Field = Ctl, 3, 1, x, x, x, 9
At host-B: I-Field = Ctl, 8, 3, 1, x, x, x
Host-B can send a reply packet back to host-A by complementing the D bit (direction) in the
Ctl field. Now the switches will use the left most bits of the Routing Control field as the output
port selector, shift the Routing Control field to the left, and insert the input port on the right
end. In summary, it would look like:
Ctl = L = 0 (not a locally administered I-Field)
VU = xx (Vendor Unique bits ignored)
W = x (this example is not concerned with width)
D = 1 (direction bit Note that it changed)
PS = 00 (source routing)
C = x (this example is not concerned with Camp-on)
At B and input to switch-3: I-Field = Ctl, 8, 3, 1, x, x, x
At input to switch-2: I-Field = Ctl, 3, 1, x, x, x, 9
At input to switch-1: I-Field = Ctl, 1, x, x, x, 9, 6
At host-A: I-Field = Ctl, x, x, x, 9, 6, 2
Switches other than the 16 × 16 switches of the example can also be used. In that case the
number of bits used by each switch will be determined by the switch size. For example, a
64 × 64 switch will use 6 bits for selection of its output port, shift off 6 bits, and add in 6 bits of
input port number.
Mixing switches
...