SIST EN IEC 62148-19:2019
(Main)Fibre optic active components and devices - Package and interface standards - Part 19: Photonic chip scale package (IEC 62148-19:2019)
Fibre optic active components and devices - Package and interface standards - Part 19: Photonic chip scale package (IEC 62148-19:2019)
This part of IEC 62148 covers the photonic chip scale package.
The purpose of this document is to specify adequately the physical requirements of optical
transmitters and receivers that will enable mechanical interchangeability of transmitters and
receivers.
Aktive Lichtwellenleiterbauelemente und -geräte - Gehäuse- und Schnittstellennormen - Teil 19: Photonisches Gehäuse in Chipgröße (IEC 62148-19:2019)
Composants et dispositifs actifs fibroniques - Normes de boîtier et d’interface - Partie 19 : Boîtier à puce photonique (IEC 62148-19:2019)
L'IEC 62148-19: 2019 couvre les boîtiers à puces photoniques. L'objectif du présent document est de spécifier les exigences physiques des modules d'émission et de réception optique qui permettent l'interchangeabilité mécanique des émetteurs et transmetteurs.
Mots-clés: interface physique des boîtiers à puces photoniques
Aktivne komponente in naprave optičnih vlaken - Standardi za ohišja in vmesnike - 19. del: Fotonsko ohišje v velikosti čipa (IEC 62148-19:2019)
Ta del standarda IEC 62148 zajema fotonsko ohišje v velikosti čipa.
Namen tega dokumenta je ustrezno opredeliti fizične zahteve optičnih oddajnikov in sprejemnikov, ki bodo omogočili mehansko medsebojno zamenljivost oddajnikov ter sprejemnikov.
General Information
Standards Content (Sample)
SLOVENSKI STANDARD
SIST EN IEC 62148-19:2019
01-oktober-2019
Aktivne komponente in naprave optičnih vlaken - Standardi za ohišja in vmesnike -
19. del: Fotonsko ohišje v velikosti čipa (IEC 62148-19:2019)
Fibre optic active components and devices - Package and interface standards - Part 19:
Photonic chip scale package (IEC 62148-19:2019)
Aktive Lichtwellenleiterbauelemente und -geräte - Gehäuse- und Schnittstellennormen -
Teil 19: Photonisches Gehäuse in Chipgröße (IEC 62148-19:2019)
Composants et dispositifs actifs fibroniques - Normes de boîtier et d’interface - Partie 19
: Boîtier à puce photonique (IEC 62148-19:2019)
Ta slovenski standard je istoveten z: EN IEC 62148-19:2019
ICS:
33.180.20 Povezovalne naprave za Fibre optic interconnecting
optična vlakna devices
SIST EN IEC 62148-19:2019 en
2003-01.Slovenski inštitut za standardizacijo. Razmnoževanje celote ali delov tega standarda ni dovoljeno.
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SIST EN IEC 62148-19:2019
EUROPEAN STANDARD EN IEC 62148-19
NORME EUROPÉENNE
EUROPÄISCHE NORM
July 2019
ICS 33.180.20
English Version
Fibre optic active components and devices - Package and
interface standards - Part 19: Photonic chip scale package
(IEC 62148-19:2019)
Composants et dispositifs actifs fibroniques - Normes de Aktive Lichtwellenleiterbauelemente und -geräte - Gehäuse-
boîtier et d'interface - Partie 19 : Boîtier à puce photonique und Schnittstellennormen - Teil 19: Photonisches Gehäuse
(IEC 62148-19:2019) in Chipgröße
(IEC 62148-19:2019)
This European Standard was approved by CENELEC on 2019-06-06. CENELEC members are bound to comply with the CEN/CENELEC
Internal Regulations which stipulate the conditions for giving this European Standard the status of a national standard without any alteration.
Up-to-date lists and bibliographical references concerning such national standards may be obtained on application to the CEN-CENELEC
Management Centre or to any CENELEC member.
This European Standard exists in three official versions (English, French, German). A version in any other language made by translation
under the responsibility of a CENELEC member into its own language and notified to the CEN-CENELEC Management Centre has the
same status as the official versions.
CENELEC members are the national electrotechnical committees of Austria, Belgium, Bulgaria, Croatia, Cyprus, the Czech Republic,
Denmark, Estonia, Finland, France, Germany, Greece, Hungary, Iceland, Ireland, Italy, Latvia, Lithuania, Luxembourg, Malta, the
Netherlands, Norway, Poland, Portugal, Republic of North Macedonia, Romania, Serbia, Slovakia, Slovenia, Spain, Sweden, Switzerland,
Turkey and the United Kingdom.
European Committee for Electrotechnical Standardization
Comité Européen de Normalisation Electrotechnique
Europäisches Komitee für Elektrotechnische Normung
CEN-CENELEC Management Centre: Rue de la Science 23, B-1040 Brussels
© 2019 CENELEC All rights of exploitation in any form and by any means reserved worldwide for CENELEC Members.
Ref. No. EN IEC 62148-19:2019 E
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EN IEC 62148-19:2019 (E)
European foreword
The text of document 86C/1574/FDIS, future edition 1 of IEC 62148-19, prepared by SC 86C "Fibre optic
systems and active devices" of IEC/TC 86 "Fibre optics" was submitted to the IEC-CENELEC parallel vote and
approved by CENELEC as EN IEC 62148-19:2019.
The following dates are fixed:
• latest date by which the document has to be implemented at national level by (dop) 2020-03-06
publication of an identical national standard or by endorsement
• latest date by which the national standards conflicting with the (dow) 2022-06-06
document have to be withdrawn
Attention is drawn to the possibility that some of the elements of this document may be the subject of patent
rights. CENELEC shall not be held responsible for identifying any or all such patent rights.
Endorsement notice
The text of the International Standard IEC 62148-19:2019 was approved by CENELEC as a European Standard
without any modification.
In the official version, for Bibliography, the following notes have to be added for the standards indicated:
IEC 60191 (series) NOTE Harmonized in EN 60191 (series)
IEC 61281-1 NOTE Harmonized as EN IEC 61281-1
IEC 62148-21 NOTE Harmonized as EN IEC 62148-21
2
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EN IEC 62148-19:2019 (E)
Annex ZA
(normative)
Normative references to international publications
with their corresponding European publications
The following documents are referred to in the text in such a way that some or all of their content constitutes
requirements of this document. For dated references, only the edition cited applies. For undated references, the
latest edition of the referenced document (including any amendments) applies.
NOTE 1 Where an International Publication has been modified by common modifications, indicated by (mod), the relevant EN/HD applies.
NOTE 2 Up-to-date information on the latest versions of the European Standards listed in this annex is available here: www.cenelec.eu.
Publication Year Title EN/HD Year
IEC 62148-1 - Fibre optic active components and devices - EN IEC 62148-1 -
Package and interface standards - Part 1:
General and guidance
3
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SIST EN IEC 62148-19:2019
IEC 62148-19
®
Edition 1.0 2019-05
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
Fibre optic active components and devices – Package and interface standards –
Part 19: Photonic chip scale package
Composants et dispositifs actifs fibroniques – Normes de boîtier et d'interface –
Partie 19: Boîtier à puce photonique
INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
COMMISSION
ELECTROTECHNIQUE
INTERNATIONALE
ICS 33.180.20 ISBN 978-2-8322-6869-8
Warning! Make sure that you obtained this publication from an authorized distributor.
Attention! Veuillez vous assurer que vous avez obtenu cette publication via un distributeur agréé.
® Registered trademark of the International Electrotechnical Commission
Marque déposée de la Commission Electrotechnique Internationale
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CONTENTS
FOREWORD . 4
INTRODUCTION . 6
1 Scope . 7
2 Normative references . 7
3 Terms, definitions and abbreviated terms . 7
3.1 Terms and definitions . 7
3.2 Abbreviated terms . 7
4 Classification . 8
5 Specification of photonic chip scale package . 8
5.1 General . 8
5.2 General block diagram (silicon photonics) . 8
5.3 Electrical interface . 9
5.3.1 General . 9
5.3.2 Numbering of electrical terminals . 9
5.4 Optical interface . 9
5.4.1 General . 9
5.4.2 Free space optical beam condition . 9
5.5 Outline and footprint . 9
5.5.1 General . 9
5.5.2 Drawing of footprint . 10
Annex A (normative) Specific configurations . 11
A.1 General . 11
A.2 4ch transceiver . 11
A.2.1 Block diagram . 11
A.2.2 Electrical terminal assignments . 12
A.2.3 Optical terminal assignments . 15
A.2.4 Outline drawing . 16
A.3 8ch transceiver . 18
A.3.1 Block diagram . 18
A.3.2 Electrical terminal assignments . 19
A.3.3 Optical terminal assignments . 23
A.3.4 Outline drawing . 24
A.4 12ch transmitter and receiver . 25
A.4.1 Block diagram . 25
A.4.2 Electrical terminal assignments . 27
A.4.3 Optical terminal assignments . 32
A.4.4 Outline drawing . 34
Bibliography . 38
Figure 1 – General block diagram for photonic chip scale package . 8
Figure 2 – Electrical terminal numbering assignment (top view) . 9
Figure 3 – Recommended pattern layout for PCB . 10
Figure 4 – Informative electrical strip line wiring for high speed electrical interface . 10
Figure A.1 – Block diagram for chip scale package of 4ch transceiver using silicon
photonics chip with optional pads for LD control. 12
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Figure A.2 – Electrical terminal numbering assignment (top view) . 13
Figure A.3 – Optical terminal numbering assignment for 0,25 mm pitch optical interface
for 4ch transceiver (top view) . 16
Figure A.4 – Package outline drawing of 4ch transceiver . 17
Figure A.5 – Block diagram for chip scale package of 8ch transceiver using silicon
photonics chip with optional pads for LD control. 19
Figure A.6 – Electrical terminal numbering assignment (top view) . 20
Figure A.7 – Optical terminal numbering assignment for 0,125 mm pitch optical
interface for 8ch transceiver (top view) . 23
Figure A.8 – Package outline drawing of 8ch transceiver . 24
Figure A.9 – Block diagram for chip scale package of 12ch transmitter using silicon
photonics chip with optional pads for LD control. 26
Figure A.10 – Block diagram for the chip scale package of 12ch receiver with optional
pad for PD bias . 26
Figure A.11 – Electrical terminal numbering assignment (top view) . 27
Figure A.12 – Optical terminal numbering assignment for 0,125 mm pitch optical
interface for 12ch transmitter and receiver (top view) . 33
Figure A.13 – Package outline drawing of 12ch transmitter . 34
Figure A.14 – Package outline drawing of 12ch receiver . 36
Table 1 – Dimensions of recommended pattern layout for PCB . 10
Table A.1 – Specific configurations specified in Annex A . 11
Table A.2 – Terminal function definitions for a 4ch transceiver . 13
Table A.3 – Optical terminal function definitions for 4ch transceiver . 16
Table A.4 – Dimensions of the package outline of 4ch transceiver . 17
Table A.5 – Terminal function definitions for 8ch transceiver. 20
Table A.6 – Optical terminal function definitions for 8ch transceiver . 24
Table A.7 – Dimensions of the package outline of 8ch transceiver . 25
Table A.8 – Terminal function definitions for 12ch transmitter . 27
Table A.9 – Terminal function definitions for 12ch receiver . 30
Table A.10 – Optical terminal function definitions for 12ch transmitter . 33
Table A.11 – Optical terminal function definitions for 12ch receiver . 34
Table A.12 – Dimensions of the package outline of 12ch transmitter . 35
Table A.13 – Dimensions of the package outline of 12ch receiver . 36
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INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________
FIBRE OPTIC ACTIVE COMPONENTS AND DEVICES –
PACKAGE AND INTERFACE STANDARDS –
Part 19: Photonic chip scale package
FOREWORD
1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising
all national electrotechnical committees (IEC National Committees). The object of IEC is to promote international
co-operation on all questions concerning standardization in the electrical and electronic fields. To this end and
in addition to other activities, IEC publishes International Standards, Technical Specifications, Technical Reports,
Publicly Available Specifications (PAS) and Guides (hereafter referred to as “IEC Publication(s)”). Their
preparation is entrusted to technical committees; any IEC National Committee interested in the subject dealt with
may participate in this preparatory work. International, governmental and non-governmental organizations liaising
with the IEC also participate in this preparation. IEC collaborates closely with the International Organization for
Standardization (ISO) in accordance with conditions determined by agreement between the two organizations.
2) The formal decisions or agreements of IEC on technical matters express, as nearly as possible, an international
consensus of opinion on the relevant subjects since each technical committee has representation from all
interested IEC National Committees.
3) IEC Publications have the form of recommendations for international use and are accepted by IEC National
Committees in that sense. While all reasonable efforts are made to ensure that the technical content of IEC
Publications is accurate, IEC cannot be held responsible for the way in which they are used or for any
misinterpretation by any end user.
4) In order to promote international uniformity, IEC National Committees undertake to apply IEC Publications
transparently to the maximum extent possible in their national and regional publications. Any divergence between
any IEC Publication and the corresponding national or regional publication shall be clearly indicated in the latter.
5) IEC itself does not provide any attestation of conformity. Independent certification bodies provide conformity
assessment services and, in some areas, access to IEC marks of conformity. IEC is not responsible for any
services carried out by independent certification bodies.
6) All users should ensure that they have the latest edition of this publication.
7) No liability shall attach to IEC or its directors, employees, servants or agents including individual experts and
members of its technical committees and IEC National Committees for any personal injury, property damage or
other damage of any nature whatsoever, whether direct or indirect, or for costs (including legal fees) and
expenses arising out of the publication, use of, or reliance upon, this IEC Publication or any other IEC Publications.
8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is
indispensable for the correct application of this publication.
9) Attention is drawn to the possibility that some of the elements of this IEC Publication may be the subject of patent
rights. IEC shall not be held responsible for identifying any or all such patent rights.
International Standard IEC 62148-19 has been prepared by subcommittee 86C: Fibre optic
systems and active devices, of IEC technical committee 86: Fibre optics.
The text of this International Standard is based on the following documents:
FDIS Report on voting
86C/1574/FDIS 86C/1586/RVD
Full information on the voting for the approval of this International Standard can be found in the
report on voting indicated in the above table.
This document has been drafted in accordance with the ISO/IEC Directives, Part 2.
A list of all parts in the IEC 62148 series, published under the general title Fibre optic active
components and devices – Package and interface standards, can be found on the IEC website.
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IEC 62148-19:2019 © IEC 2019 – 5 –
The committee has decided that the contents of this document will remain unchanged until the
stability date indicated on the IEC website under "http://webstore.iec.ch" in the data related to
the specific document. At this date, the document will be
• reconfirmed,
• withdrawn,
• replaced by a revised edition, or
• amended.
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INTRODUCTION
A photonic chip scale package is used to convert electrical signals into optical signals and vice-
versa. This document covers the physical interface for photonic chip scale packages. These
modules are designed for use with free space optics or multiple channel optical fibre connectors.
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FIBRE OPTIC ACTIVE COMPONENTS AND DEVICES –
PACKAGE AND INTERFACE STANDARDS –
Part 19: Photonic chip scale package
1 Scope
This part of IEC 62148 covers the photonic chip scale package.
The purpose of this document is to specify adequately the physical requirements of optical
transmitters and receivers that will enable mechanical interchangeability of transmitters and
receivers.
2 Normative references
The following documents are referred to in the text in such a way that some or all of their content
constitutes requirements of this document. For dated references, only the edition cited applies.
For undated references, the latest edition of the referenced document (including any
amendments) applies.
IEC 62148-1, Fibre optic active components and devices – Package and interface standards –
Part 1: General and guidance
3 Terms, definitions and abbreviated terms
3.1 Terms and definitions
For the purposes of this document, the following terms and definitions apply.
ISO and IEC maintain terminological databases for use in standardization at the following
addresses:
• IEC Electropedia: available at http://www.electropedia.org/
• ISO Online browsing platform: available at http://www.iso.org/obp
3.1.1
photonic chip scale package
chip O/E and/or E/O convertor, where electrical I/Os and optical I/Os are also included
3.2 Abbreviated terms
CSP chip scale package
O/E optical to electrical
E/O electrical to optical
I/O input/output
SIG signal
TX transmitter
RX receiver
MOD optical modulator
LD laser diode
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MMF multimode fibre
TIA transimpedance amplifier
PCB printed circuit board
PWB printed wiring board
PD photodiode
4 Classification
The photonic chip scale package specified in this document is classified as type 5 according to
the definitions of IEC 62148-1.
5 Specification of photonic chip scale package
5.1 General
Clause 5 specifies the physical requirements of a photonic chip scale package that will enable
mechanical interchangeability of modules complying with this document, both for the PCB and
for any panel mounting requirement.
5.2 General block diagram (silicon photonics)
The block diagram for the photonic chip scale package is shown in Figure 1, which contains N
channels of electrical inputs, M channels of electrical outputs, Q channels of optical outputs,
and R channels of optical inputs.
The functions of electrical to optical (E/O) conversion or/and optical to electrical (O/E)
conversion are provided by the package according to applications.
Channel numbers of electrical inputs N and optical outputs Q in E/O and optical inputs R and
electrical outputs M in O/E are determined according to a multiplexing scheme such as
wavelength multiplexing and serializer/deserializer.
Specific configurations for the photonic chip scale package are shown in Annex A.
Figure 1 – General block diagram for photonic chip scale package
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5.3 Electrical interface
5.3.1 General
The electrical interface in this document defines only the basic functionality of each terminal.
5.3.2 Numbering of electrical terminals
Electrical terminal numbering assignments are shown in Figure 2. The location of reference
electrical terminal A1 is assigned at bottom left corner, and the direction of the package is
decided by the position of the optical interface shifted to the left of centre, as shown in Figure 2.
Figure 2 – Electrical terminal numbering assignment (top view)
5.4 Optical interface
5.4.1 General
The optical interface in this document defines only the basic functionality of each optical
terminal. The channel spacing of optical interface has two options of 0,25 mm and 0,125 mm.
5.4.2 Free space optical beam condition
The optical output beam from a surface of the photonic chip scale package is coupled to an
optical fibre or optical waveguide with free space optics, such as optical lenses or butt coupling,
to have a specific coupling efficiency designed by each vendor.
Dimension of optical terminals and beam profiles are characterized in accordance with the
vendor’s specification.
5.5 Outline and footprint
5.5.1 General
The footprint of the photonic chip scale package is determined by the number of channels of
the optical transmitter and/or receiver and the dimensions and pitch of the electrical terminals.
The electrical pad pitch and dimensions of the chip follow the general guidance for a chip scale
package (IEC 62148-21).
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Specific configurations for the photonic chip scale package are shown in Annex A.
5.5.2 Drawing of footprint
The recommended pattern layout for the PCB is shown in Figure 3, and informative electrical
wiring for a high speed electrical interface is shown in Figure 4. The dimensions of
recommended pattern layout for PCB are shown in Table 1.
NOTE e = 0,25 mm
Figure 3 – Recommended pattern layout for PCB
Figure 4 – Informative electrical strip line wiring for high speed electrical interface
Table 1 – Dimensions of recommended pattern layout for PCB
Dimensions
mm
Reference
Minimum Maximum
∅fx 0,13 0,17
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Annex A
(normative)
Specific configurations
A.1 General
Specific configurations of chip scale package for multiple channel optical transmitter/receiver
applications are described in Annex A. With options for optical channel spacing of 0,25 mm and
0,125 mm, alternatives of 4-channel transceiver (transmitter and receiver), 8ch transceiver,
12ch transmitter, and 12ch receiver are specified in Clauses A.2 to A.4, as listed in Table A.1.
Table A.1 – Specific configurations specified in Annex A
Configuration Optical channel spacing
0,25 mm 0,125 mm
4ch transceiver A.2 -
8ch transceiver - A.3
12ch transmitter/
- A.4
12ch receiver
A.2 4ch transceiver
A.2.1 Block diagram
The block diagram of a 4ch transceiver is shown in Figure A.1.
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Figure A.1 – Block diagram for chip scale package of 4ch transceiver using silicon
photonics chip with optional pads for LD control
A.2.2 Electrical terminal assignments
Electrical terminal numbering assignments are shown in Figure A.2. Electrical terminals in the
outer two rows and columns (outer two lines) are used. The direction of the package is decided
by the position of the optical interface shifted to the left of centre, as shown in Figure A.2. The
terminal definitions are shown in Table A.2.
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Figure A.2 – Electrical terminal numbering assignment (top view)
Table A.2 – Terminal function definitions for a 4ch transceiver
Terminal
Symbol Function
number
A1 GND Ground
A2 GND Ground
A3 GND Ground
A4 VLDDQ LD drive common
A5 VLDDP3 LD power supply 3 (external drive mode)
A6 VLDDP2 LD power supply 2 (external drive mode)
A7 VLDDP1 LD power supply 1 (external drive mode)
A8 GND Ground
A9 VDD Power supply
A10 GND Ground
A11 VPLD LD driver power supply
A12 VDD33 3,3 V power supply
A13 TMON Temperature monitor output
A14 GND Ground
A15 GND Ground
A16 GND Ground
A17 GND Ground
A18 GND Ground
B1 GND Ground
B2 GND Ground
B3 GND Ground
B4 VLDDQ LD drive common
B5 VLDDP3 LD power supply 3 (external drive mode)
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Terminal
Symbol Function
number
B6 VLDDP2 LD power supply 2 (external drive mode)
B7 VLDDP1 LD power supply 1 (external drive mode)
B8 GND Ground
B9 VDD Power supply
B10 GND Ground
B11 VPLD LD driver power supply
B12 VDD33 3,3 V power supply
B13 VDD Power supply
B14 GND Ground
B15 GND Ground
B16 GND Ground
B17 GND Ground
B18 DIP01 Non-inverted input channel 1
C17 GND Ground
C18 DIN01 Inverted input channel 1
D17 GND Ground
D18 DIP02 Non-inverted input channel 2
E17 GND Ground
E18 DIN02 Inverted input channel 2
F17 GND Ground
F18 DIP03 Non-inverted input channel 3
G17 GND Ground
G18 DIN03 Inverted input channel 3
H17 GND Ground
H18 DIP04 Non-inverted input channel 4
J17 GND Ground
J18 DIN04 Inverted input channel 4
K17 GND Ground
K18 DOP01 Non-inverted output channel 1
L17 GND Ground
L18 DON01 Inverted output channel 1
M17 GND Ground
M18 DOP02 Non-inverted output
...
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