IEC TS 62878-2-1:2015
(Main)Device embedded substrate - Part 2-1: Guidelines - General description of technology
Device embedded substrate - Part 2-1: Guidelines - General description of technology
IEC TS 62878-2-1:2015 describes the basics of device embedding substrate. It is applicable to device embedded substrates fabricated by use of organic base material, which include for example active or passive devices, discrete components formed in the fabrication process of electronic wiring board, and sheet formed components.
Substrat avec appareil(s) intégré(s) - Partie 2-1: Directives - Description générale de la technologie
L'IEC TS 62878-2-1:2015 décrit les bases des substrats d'intégration d'appareil. Il est applicable aux substrats avec appareil(s) intégré(s) fabriqués à partir de matériaux de base organiques, y compris par exemple les appareils actifs ou passifs, les composants discrets formés lors du processus de fabrication d'une carte de câblage électronique, ainsi que les composants de feuilles minces.
General Information
Standards Content (Sample)
IEC TS 62878-2-1 ®
Edition 1.0 2015-03
TECHNICAL
SPECIFICATION
SPECIFICATION
TECHNIQUE
colour
inside
Device embedded substrate –
Part 2-1: Guidelines – General description of technology
Substrat avec appareil(s) intégré(s) –
Partie 2-1: Directives – Description générale de la technologie
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IEC TS 62878-2-1 ®
Edition 1.0 2015-03
TECHNICAL
SPECIFICATION
SPECIFICATION
TECHNIQUE
colour
inside
Device embedded substrate –
Part 2-1: Guidelines – General description of technology
Substrat avec appareil(s) intégré(s) –
Partie 2-1: Directives – Description générale de la technologie
INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
COMMISSION
ELECTROTECHNIQUE
INTERNATIONALE
ICS 31.180; 31.190 ISBN 978-2-8322-2434-2
– 2 – IEC TS 62878-2-1:2015 © IEC 2015
CONTENTS
FOREWORD . 4
INTRODUCTION . 6
1 Scope . 7
2 Normative references. 7
3 Terms, definitions and abbreviations . 7
3.1 Terms and definitions . 7
3.2 Abbreviations . 7
4 Technology of device embedded substrate . 7
4.1 Basic structures . 7
4.2 Technology of device embedded substrate . 9
4.3 Structures of device embedded substrates and terms used in this specification
........................................................................................................................... 12
5 Jisso mounting and interconnection . 13
5.1 General . 13
5.2 Interconnections and structures of device embedded substrate . 15
5.3 Device embedding by conventional process . 17
5.4 Device embedding using vias . 19
6 Naming of each section . 22
6.1 General . 22
6.2 General definition of top and bottom surfaces . 22
6.3 Naming of layers and interconnection position . 24
6.4 Definitions of insulation layer thickness, conductor gap and connection
distance between terminal and conductor . 27
6.4.1 General . 27
6.4.2 Insulation layer thickness, conductor gap and electrode/conductor gap in
pad connection . 27
6.4.3 Insulation layer thickness, conductor gap and electrode/conductor gap in
a via connection . 28
6.5 Additional information . 28
6.5.1 Additional information for the insulation layer . 28
6.5.2 Additional information for conductor gap and electrode/conductor gap . 29
Bibliography . 30
Figure 1 – Examples of device embedded substrate . 8
Figure 2 – Completed device embedded substrate (pad connection) . 9
Figure 3 – Completed device embedded substrate (via connection) . 9
Figure 4 – Structure of a pad connection type substrate on a passive device embedded
ceramics base . 10
Figure 5 – Structure of a device embedded substrate using a ceramic board as the base
(via connection type) . 10
Figure 6 – Entire structure of device embedded substrate . 15
Figure 7 – Base (typical structure) . 16
Figure 8 – Base (cavity structure) . 16
Figure 9 – Base (insulator) . 16
– 3 – IEC TS 62878-2-1:2015 © IEC 2015
Figure 10 – Base (Conductive carrier – metal plate). 16
Figure 11 – Passive device embedded ceramic board used as a base . 17
Figure 12 – Ceramic board used as base (ceramic) . 17
Figure 13 – Wire bonding connection and embedding of active device bare die . 17
Figure 14 – Soldering connection and embedding of active device . 18
Figure 15 – Soldering connection of square type passive device . 18
Figure 16 – Conductive resin connection and embedding of active device . 18
Figure 17 – Conductive resin connection and embedding of square type passive device . 19
Figure 18 – Soldering connection into through hole and embedding of passive device . 19
Figure 19 – Connection by copper plating after embedding of active device . 19
Figure 20 – Connection by copper plating after embedding of square type passive
device . 20
Figure 21 – Conductive paste connection after embedding of active device package . 20
Figure 22 – Conductive paste connection after embedding of square type passive device
chip 20
Figure 23 – Device embedded substrate for device embedding in multi-layers . 21
Figure 24 – Embedding of devices over multiple layers . 21
Figure 25 – Resin base substrate . 21
Figure 26 – Conductor and metal sheet/copper foil as base substrate . 22
Figure 27 – Device embedded substrate using passive device embedded ceramic
substrates as base substrate – Second type . 22
Figure 28 – Definition of top and bottom surfaces . 23
Figure 29 – Definition of top and bottom surfaces (mounting of a mother board) . 23
Figure 30 – Names of layers in pad connection . 24
Figure 31 – Additional information concerning the interconnection position . 25
Figure 32 – Names of layers in via connection [I] . 25
Figure 33 – Names of layers in via connection [II] . 26
Figure 34 – Names of layers in via connection [III] . 26
Figure 35 – Definition of insulating layer thickness and conductor gap in pad connection
Figure 36 – Definition of electrode gap in via connection .
...
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