IEC 63275-1:2022

Semiconductor devices - Reliability test method for silicon carbide discrete metal-oxide semiconductor field effect transistors - Part 1: Test method for bias temperature instability

IEC 63275-1:2022 gives a test method to evaluate gate threshold voltage shift of silicon carbide (SiC) power metal-oxide-semiconductor field-effect transistors (MOSFETs) using room temperature readout after applying continuous positive gate-source voltage stress at elevated temperature. The proposed method accepts a certain amount of recovery by allowing large delay times between stress and measurement (up to 10 h).

Dispositifs à semiconducteurs - Méthode d’essai de fiabilité pour les transistors à effet de champ métal-oxyde-semiconducteurs discrets en carbure de silicium - Partie 1: Méthode d’essai pour la mesure de la dérive de la tension de seuil après polarisation électrique en température

L’IEC 63275-1:2022 donne une méthode d’essai pour évaluer le décalage de la tension de seuil de grille des transistors à effet de champ métal-oxyde-semiconducteurs (MOSFET) de puissance en carbure de silicium (SiC) en utilisant un relevé à température ambiante après avoir appliqué une contrainte de tension grille-source positive continue à température élevée. La méthode proposée accepte une certaine quantité de recouvrement en autorisant des décalages importants entre la contrainte et la mesure (jusqu’à 10 h).

General Information

• Status: Published
• Publication Date: 20-Apr-2022
• ICS: 31.080.30 - Transistors
• Technical Committee: TC 47 - Semiconductor devices
• Drafting Committee: WG 5 - TC 47/WG 5
• Current Stage: PPUB - Publication issued
• Start Date: 20-May-2022
• Completion Date: 21-Apr-2022

Standards Content (Sample)

IEC 63275-1 ®
Edition 1.0 2022-04
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
Semiconductor devices – Reliability test method for silicon carbide discrete
metal‑oxide semiconductor field effect transistors –
Part 1: Test method for bias temperature instability

Dispositifs à semiconducteurs – Méthode d’essai de fiabilité pour les transistors
à effet de champ métal-oxyde-semiconducteurs discrets en carbure de
silicium –
Partie 1: Méthode d’essai pour la mesure de la dérive de la tension de seuil
après polarisation électrique en température

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IEC 63275-1 ®
Edition 1.0 2022-04
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
Semiconductor devices – Reliability test method for silicon carbide discrete

metal‑oxide semiconductor field effect transistors –

Part 1: Test method for bias temperature instability

Dispositifs à semiconducteurs – Méthode d’essai de fiabilité pour

les transistors à effet de champ métal-oxyde-semiconducteurs discrets en

carbure de
silicium –
Partie 1: Méthode d’essai pour la mesure de la dérive de la tension de seuil

après polarisation électrique en température

INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
COMMISSION
ELECTROTECHNIQUE
INTERNATIONALE
ICS 31.080.30 ISBN 978-2-8322-1101-5

– 2 – IEC 63275-1:2022 © IEC 2022
CONTENTS
FOREWORD . 3
INTRODUCTION . 5
1 Scope . 6
2 Normative references . 6
3 Terms and definitions . 6
4 Requirements . 6
4.1 Sample . 6
4.2 Test temperature . 6
4.3 Test voltage . 6
4.4 Test time . 7
4.5 Measurement temperature . 7
4.6 Failure criteria . 7
4.7 Test circuit . 7
5 Procedures . 7
5.1 Sequence of procedure . 7
5.2 Select sample . 8
5.3 V measurement methods . 8
GS(th)
5.4 How to provide a reproducible measurement of V . 11
GS(th)
5.5 Initial measurement . 11
5.6 Apply voltage and temperature stress . 12
5.7 Remove voltage and temperature stress . 12
5.8 Intermediate measurement. 12
6 Test report . 12
Bibliography . 13

Figure 1 – Circuit diagram for bias temperature instability test . 7
Figure 2 – Test flow chart . 8
Figure 3 – Schematic of test pattern for Example 1 . 9
Figure 4 – I versus V curve for Example 1 . 9
DS GS
Figure 5 – Schematic of test pattern for Example 2 and Example 3 . 10
Figure 6 – I versus V curve for Example 2 . 10
DS GS
Figure 7 – I – V curve for Example 3 . 10
DS GS
Figure 8 – Schematic of test pattern for Example 4 . 11

INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________
SEMICONDUCTOR DEVICES –
RELIABILITY TEST METHOD FOR SILICON CARBIDE DISCRETE
METAL‑OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTORS –

Part 1: Test method for bias temperature instability

FOREWORD
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IEC 63275-1 has been prepared by IEC technical committee 47: Semiconductor devices. It is
an International Standard.
The text of this International Standard is based on the following documents:
Draft Report on voting
47/2755/FDIS 47/2764/RVD
Full information on the voting for its approval can be found in the report on voting indicated in
the above table.
The language used for the development of this International Standard is English.

– 4 – IEC 63275-1:2022 © IEC 2022
This document was drafted in accordance with ISO/IEC Directives, Part 2, and developed in
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