Road vehicles -- Local Interconnect Network (LIN)

This document specifies an additional electrical physical layer (EPL) for the Local Interconnect Network (LIN) of the ISO 17987 series. It specifies the transmission over DC powerline without affecting the LIN higher layers, hereafter named DC-LIN. The DC-LIN EPL uses a high-frequency modulated carrier to propagate UART bytes (byte-oriented) over the DC powerline. This document specifies the electrical characteristics, the modulation method of the transmission, and how to impose the carrier signal on the DC powerlines. The DC-LIN EPL supports bit rates of 9 615 bit/s, 10 417 bit/s, and 19 230 bit/s. The DC-LIN EPL is applicable for a wide range of DC powerlines including 12-V and 24-V operations, allowing communicating between different DC powerlines via a coupling capacitor. A DC-LIN EPL interface to powerline example is described in Annex A.

Véhicules routiers -- Réseau Internet local (LIN)

General Information

Status
Published
Publication Date
06-Oct-2019
Current Stage
6060 - International Standard published
Start Date
04-Sep-2019
Completion Date
07-Oct-2019
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INTERNATIONAL ISO
STANDARD 17987-8
First edition
2019-10
Road vehicles — Local Interconnect
Network (LIN) —
Part 8:
Electrical physical layer (EPL)
specification: LIN over DC powerline
(DC-LIN)
Véhicules routiers — Réseau Internet local (LIN) —
Partie 8: Spécification de couche physique électrique (EPL): LIN sur
ligne d'alimentation en courant continu (DC-LIN)
Reference number
ISO 17987-8:2019(E)
ISO 2019
---------------------- Page: 1 ----------------------
ISO 17987-8:2019(E)
COPYRIGHT PROTECTED DOCUMENT
© ISO 2019

All rights reserved. Unless otherwise specified, or required in the context of its implementation, no part of this publication may

be reproduced or utilized otherwise in any form or by any means, electronic or mechanical, including photocopying, or posting

on the internet or an intranet, without prior written permission. Permission can be requested from either ISO at the address

below or ISO’s member body in the country of the requester.
ISO copyright office
CP 401 • Ch. de Blandonnet 8
CH-1214 Vernier, Geneva
Phone: +41 22 749 01 11
Fax: +41 22 749 09 47
Email: copyright@iso.org
Website: www.iso.org
Published in Switzerland
ii © ISO 2019 – All rights reserved
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ISO 17987-8:2019(E)
Contents Page

Foreword ........................................................................................................................................................................................................................................iv

Introduction ..................................................................................................................................................................................................................................v

1 Scope ................................................................................................................................................................................................................................. 1

2 Normative references ...................................................................................................................................................................................... 1

3 Terms, definitions, symbols, and abbreviated terms ..................................................................................................... 1

3.1 Terms and definitions ....................................................................................................................................................................... 2

3.2 Symbols and abbreviated terms............................................................................................................................................... 2

4 Electrical physical layer requirements .......................................................................................................................................... 5

4.1 General ........................................................................................................................................................................................................... 5

4.2 Transmitter characteristics .......................................................................................................................................................... 6

4.2.1 Transmit signal specification ................................................................................................................................ 6

4.2.2 Byte field modulation scheme .............................................................................................................................. 7

4.2.3 Break field modulation scheme .......................................................................................................................14

4.2.4 Wake-up signal modulation scheme ............................................................................................................15

4.3 Timing requirements ......................................................................................................................................................................18

4.3.1 Bit rate tolerance ..........................................................................................................................................................18

4.3.2 Bit timing .............................................................................................................................................................................19

4.3.3 Bit sample timing .........................................................................................................................................................19

4.3.4 TXD assert timeout event ......................................................................................................................................19

4.3.5 Delay between transmitted byte field (DC-LIN node A) and received byte

field (DC-LIN node A)................................................................................................................................................19

4.3.6 Delay between transmitted byte field (DC-LIN node A) and received byte

field (DC-LIN node B) ........................................................................................................................................... .....19

4.4 Receiver characteristics ...............................................................................................................................................................21

4.5 Electrical parameters .....................................................................................................................................................................21

4.5.1 General configuration — Coupling to the DC powerline ............................................................21

4.5.2 Signal specification .....................................................................................................................................................22

4.5.3 Line-out monitoring ...................................................................................................................................................23

4.5.4 ESD compliance .............................................................................................................................................................28

4.6 Communication in the presence of faults......................................................................................................................28

Annex A (informative) DC-LIN EPL peripheral interface design considerations .................................................30

Annex B (normative) DC-LIN EPL conformance test plan ............................................................................................................31

Bibliography .............................................................................................................................................................................................................................56

© ISO 2019 – All rights reserved iii
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ISO 17987-8:2019(E)
Foreword

ISO (the International Organization for Standardization) is a worldwide federation of national standards

bodies (ISO member bodies). The work of preparing International Standards is normally carried out

through ISO technical committees. Each member body interested in a subject for which a technical

committee has been established has the right to be represented on that committee. International

organizations, governmental and non-governmental, in liaison with ISO, also take part in the work.

ISO collaborates closely with the International Electrotechnical Commission (IEC) on all matters of

electrotechnical standardization.

The procedures used to develop this document and those intended for its further maintenance are

described in the ISO/IEC Directives, Part 1. In particular, the different approval criteria needed for the

different types of ISO documents should be noted. This document was drafted in accordance with the

editorial rules of the ISO/IEC Directives, Part 2 (see www .iso .org/directives).

Attention is drawn to the possibility that some of the elements of this document may be the subject of

patent rights. ISO shall not be held responsible for identifying any or all such patent rights. Details of

any patent rights identified during the development of the document will be in the Introduction and/or

on the ISO list of patent declarations received (see www .iso .org/patents).

Any trade name used in this document is information given for the convenience of users and does not

constitute an endorsement.

For an explanation of the voluntary nature of standards, the meaning of ISO specific terms and

expressions related to conformity assessment, as well as information about ISO's adherence to the

World Trade Organization (WTO) principles in the Technical Barriers to Trade (TBT) see www .iso

.org/iso/foreword .html.

This document was prepared by Technical Committee ISO/TC 22, Road vehicles, Subcommittee SC 31,

Data communication.
A list of all parts in the ISO 17987 series can be found on the ISO website.

Any feedback or questions on this document should be directed to the user’s national standards body. A

complete listing of these bodies can be found at www .iso .org/members .html.
iv © ISO 2019 – All rights reserved
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ISO 17987-8:2019(E)
Introduction

ISO 17987 (all parts) specifies the use cases, communication protocol and physical layer requirements

of an in-vehicle communication network called Local Interconnect Network (LIN).

The LIN protocol as proposed is an automotive-focused low speed UART-based network (Universal

Asynchronous Receiver Transmitter). Some of the key characteristics of the LIN protocol are signal-

based communication, schedule table-based frame transfer, master/slave communication with error

detection, node configuration and diagnostic service transportation.

The LIN protocol is for low cost automotive control applications, for example door module and air

conditioning systems. It serves as a communication infrastructure for low-speed control applications

in vehicles by providing:

— signal-based communication to exchange information between applications in different nodes;

— bit rate support from 1 kbit/s to 20 kbit/s;
— deterministic schedule table-based frame communication;

— network management that wakes up and puts the LIN cluster into sleep mode in a controlled manner;

— status management that provides error handling and error signalling;

— transport layer that allows large amount of data to be transported (such as diagnostic services);

— specification of how to handle diagnostic services;
— electrical physical layer specifications;
— node description language describing properties of slave nodes;
— network description file describing behaviour of communication;
— application programmer's interface.

ISO 17987 (all parts) is based on the open systems interconnection (OSI) basic reference model as

specified in ISO/IEC 7498-1 which structures communication systems into seven layers.

The OSI model structures data communication into seven layers called (top down) application layer

(layer 7), presentation layer, session layer, transport layer, network layer, data link layer and physical

layer (layer 1). A subset of these layers is used in ISO 17987 (all parts).

ISO 17987 (all parts) distinguishes between the services provided by a layer to the layer above it and

the protocol used by the layer to send a message between the peer entities of that layer. The reason for

this distinction is to make the services, especially the application layer services and the transport layer

services, reusable also for other types of networks than LIN. In this way, the protocol is hidden from the

service user and it is possible to change the protocol if special system requirements demand it.

ISO 17987 (all parts) provides all documents and references required to support the implementation of

the requirements related to the following.

— ISO 17987-1: This part provides an overview of the ISO 17987 (all parts) and structure along with

the use case definitions and a common set of resources (definitions, references) for use by all

subsequent parts.

— ISO 17987-2: This part specifies the requirements related to the transport protocol and the network

layer requirements to transport the PDU of a message between LIN nodes.

— ISO 17987-3: This part specifies the requirements for implementations of the LIN protocol on the

logical level of abstraction. Hardware related properties are hidden in the defined constraints.

© ISO 2019 – All rights reserved v
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ISO 17987-8:2019(E)

— ISO 17987-4: This part specifies the requirements for implementations of active hardware

components which are necessary to interconnect the protocol implementation.

— ISO/TR 17987-5: This part specifies the LIN application programmers interface (API) and the

node configuration and identification services. The node configuration and identification services

are specified in the API and define how a slave node is configured and how a slave node uses the

identification service.

— ISO 17987-6: This part specifies tests to check the conformance of the LIN protocol implementation

according to ISO 17987-2 and ISO 17987-3. This comprises tests for the data link layer, the network

layer and the transport layer.

— ISO 17987-7: This part specifies tests to check the conformance of the LIN electrical physical layer

implementation (logical level of abstraction) according to ISO 17987-4.

— ISO 17987-8: This part specifies the requirements for implementations of the DC powerline electrical

physical layer (EPL) for the LIN communications system as well as a conformance test plan for the EPL.

vi © ISO 2019 – All rights reserved
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INTERNATIONAL STANDARD ISO 17987-8:2019(E)
Road vehicles — Local Interconnect Network (LIN) —
Part 8:
Electrical physical layer (EPL) specification: LIN over DC
powerline (DC-LIN)
1 Scope

This document specifies an additional electrical physical layer (EPL) for the Local Interconnect Network

(LIN) of the ISO 17987 series. It specifies the transmission over DC powerline without affecting the LIN

higher layers, hereafter named DC-LIN.

The DC-LIN EPL uses a high-frequency modulated carrier to propagate UART bytes (byte-oriented)

over the DC powerline.

This document specifies the electrical characteristics, the modulation method of the transmission, and

how to impose the carrier signal on the DC powerlines.

The DC-LIN EPL supports bit rates of 9 615 bit/s, 10 417 bit/s, and 19 230 bit/s.

The DC-LIN EPL is applicable for a wide range of DC powerlines including 12-V and 24-V operations,

allowing communicating between different DC powerlines via a coupling capacitor. A DC-LIN EPL

interface to powerline example is described in Annex A.
2 Normative references

The following documents are referred to in the text in such a way that some or all of their content

constitutes requirements of this document. For dated references, only the edition cited applies. For

undated references, the latest edition of the referenced document (including any amendments) applies.

ISO 17987-4:2016, Road vehicles — Local Interconnect Network (LIN) — Part 4: Electrical physical layer

(EPL) specification 12 V/24 V

ISO 17987-6, Road vehicles — Local Interconnect Network (LIN) — Part 6: Protocol conformance test

specification

IEC 61000-4-2, Electromagnetic compatibility (EMC) - Part 4-2: Testing and measurement techniques -

Electrostatic discharge immunity test
3 Terms, definitions, symbols, and abbreviated terms
For the purposes of this document, the following terms and definitions apply.

ISO and IEC maintain terminological databases for use in standardization at the following addresses:

— ISO Online browsing platform: available at https: //www .iso .org/obp
— IEC Electropedia: available at http: //www .electropedia .org/
© ISO 2019 – All rights reserved 1
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ISO 17987-8:2019(E)
3.1 Terms and definitions
3.1.1
BR_9_6K
DC-LIN EPL operating at nominal bit rate of 9 615 bit/s
3.1.2
BR_10K
DC-LIN EPL operating at nominal bit rate of 10 417 bit/s
3.1.3
BR_19_2K
DC-LIN EPL operating at nominal bit rate of 19 230 bit/s
3.1.4
byte field
byte that consists of one start bit, eight data bits, and one stop bit
3.1.5
byte field sync preamble

sequence of phase shifts at the beginning of EPL byte field modulation used for byte synchronization

3.1.6
carrier frequency
DC-LIN EPL center frequency that is altered (modulated) to transfer data
3.1.7
coupling capacitor
capacitor for blocking the DC powerline voltage to/from a DC-LIN EPL
3.1.8
DC-LIN EPL RX mode

mode that DC-LIN EPL de-asserts line-out and controls RXD according to signal at line-in

3.1.9
DC-LIN EPL TX mode
mode that DC-LIN EPL controls line-out according to logic state present at TXD
3.1.10
start bit
logic low (‘0’) of the first bit of a byte field
3.1.11
stop bit
logic high (‘1’) of the last bit of a byte field
3.2 Symbols and abbreviated terms
'0' logical 0
'1' logical 1
AC alternate current
API application programmers interface
B byte field data bit signalled on RXD at DC-LIN EPL receiver side
data_bit
B byte field data bit signalled on RXD at DC-LIN EPL transmitter side
data_bit_local
2 © ISO 2019 – All rights reserved
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ISO 17987-8:2019(E)
B break delimiter signalled on RXD at DC-LIN EPL receiver side
del
B break delimiter signalled on RXD at DC-LIN EPL transmitter side
del_local
B byte field error data bit signalled on RXD at DC-LIN EPL transmitter side
err_data_bit_local
B byte field frame error stop bit signalled on RXD at DC-LIN EPL receiver side
fe_stop_bit

B byte field frame error stop bit signalled on RXD at DC-LIN EPL transmitter side

fe_stop_bit_local

B break field delimiter frame error signalled on RXD at DC-LIN EPL transmitter side

fe_del_local

B byte field frame error start bit signalled on RXD at DC-LIN EPL transmitter side

fe_start_bit_local
BR DC-LIN EPL operating bit rate
B byte field start bit signalled on RXD at DC-LIN EPL receiver side
start_bit
B byte field start bit signalled on RXD at DC-LIN EPL transmitter side
start_bit_local
B byte field stop bit signalled on RXD at DC-LIN EPL receiver side
stop_bit
B byte field stop bit signalled on RXD at DC-LIN EPL transmitter side
stop_bit_local
CB consecutive byte field transmission
CF maximal number of carrier frequencies implemented in IUT transmit signal
max
DC direct current
EPL electrical physical layer
ESD electrostatic discharge
fc carrier frequency
FB first byte field transmission
I in-phase signal component
IUT implementation under test
bit/s bit per second
LIN Local Interconnect Network
line-in modulated carrier signal input pin to the EPL from the DC powerline
line-out modulated carrier signal output pin from the EPL to the DC powerline
LT lower tester
L line-out sampled monitoring level
out_lev
L line-out monitoring peak threshold level
out_thr_lev
L line-out monitoring error condition
out_err_cond
max. maximum
min. minimum
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ISO 17987-8:2019(E)
P nominal length of modulated byte field in t
byte_length BIT
P nominal length of modulated byte field data bit
data_bit_len
P data bit modulation phases
data
P data bit ‘1’ 1 phase shift
dh_1
P data bit ‘1’ 2 phase shift
dh_2
P data bit ‘1’ 3 phase shift
dh_3
P data bit ‘0’ 1 phase shift
dl_1
P data bit ‘0’ 2 phase shift
dl_2
P data bit ‘0’ 3 phase shift
dl_3
P reference phase of consecutive byte transmission
ref_consec
P reference phase of the first byte transmission
ref_first
P sync preamble modulation phases
sync_p
P sync preamble 1 phase shift
sp_1
P sync preamble 2 phase shift
sp_2
P sync preamble 3 phase shift
sp_3
P sync preamble 4 phase shift
sp_4
P sync preamble 5 phase shift
sp_5
P sync preamble 6 phase shift
sp_6
P sync preamble 7 phase shift
sp_7
P sync preamble 8 phase shift
sp_8
P sync preamble 9 phase shift
sp_9
P sync preamble 10 phase shift
sp_10
P sync preamble 11 phase shift
sp_11
P sync preamble 12 phase shift
sp_12
P sync preamble 13 phase shift
sp_13
P sync preamble 14 phase shift
sp_14
P sync preamble 15 phase shift
sp_15
P sync preamble 16 phase shift
sp_16
P sync preamble 17 phase shift
sp_17
P sync preamble 18 phase shift
sp_18
P nominal length of modulated byte field sync preamble
sync_pre_len
4 © ISO 2019 – All rights reserved
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ISO 17987-8:2019(E)
Q quadrature signal component
R DC-LIN EPL RX mode
rx_mode
RX DC-LIN EPL RX node error condition
err_cond
t bit time
BIT
t break field data bits ‘0’ length in t
break_field BIT
t line-out monitoring active duration
l_out_mon_l
t line-out monitoring sample time
l_out_mon_samp
t start time of line-out monitoring
l_out_mon_start
t delay between transmitted byte field over to the DC powerline and the receiver
RX_delay
reconstructed byte field from the DC powerline

t delay between transmitted byte field on TXD and the received byte field on RXD at

RX_delay_local
a DC-LIN EPL node (locally)
t maximum process time at RX DC-LIN EPL side
rx_proc_max
t minimum process time at RX DC-LIN EPL side
rx_proc_min
t start time of byte field sync preamble transmission on line-out
SB_TX
T DC-LIN EPL TX mode
tx_mode
t minimum TXD assert (‘0’) time without timeout event (deactivating T )
txd_min_assert tx_mode
t minimum TXD deassert (‘1’) time after timeout event (T remains deactivated)
txd_min_recover tx_mode
logical inverted TXD (i.e. '0' becomes '1' and vice versa)
TXD
typ. typical
UT upper tester
Vpp volt peak-to-peak
V maximum rating for the DC powerline
PWL_max
φ carrier phases
∆fc carrier frequency resolution
° degree
4 Electrical physical layer requirements
4.1 General

The DC-LIN EPL is the physical media access sub-layer, which links the data link layer as standardized

in ISO 17987-3 and the DC powerlines (physical medium dependent sub-layer). Figure 1 depicts an

example of a DC-LIN EPL. The EPL consists of a modem, which encodes the data from the data link layer

into the modulated carrier signal that is coupled to the DC powerline. The modem also decodes the

received data on the DC powerline and provides this to the data link layer at the receivers. Follow the

DC-LIN EPL conformance test plan in Annex B.
© ISO 2019 – All rights reserved 5
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ISO 17987-8:2019(E)

The DC-LIN EPL transmitter encodes each byte field sent by the data link layer on TXD into a modulated

carrier signal, which is transferred over the DC powerline. The modulation consists of a predefined

combination of phase shifts according to the byte field modulation scheme specified in 4.2.2.

The DC-LIN EPL receiver decodes the received modulated byte from the DC powerline and signals it on

RXD to the data link layer.
Key
1 RXD receive data pin
2 TXD transmit data pin
3 modem
4 line-out
5 line-in
6 coupling capacitor
7 DC powerline
Figure 1 — Example of a DC-LIN EPL
4.2 Transmitter characteristics
4.2.1 Transmit signal specification

The transmit signal shall be constructed as the sum of up to four (redundant) selectable modulated

carrier frequencies.
The definition of the transmit signal is given in Formula (1).
Definition of the formula:
Transmit signal=×Afcos 360°× ct× +ϕ()t (1)
[]()
∑ i
i=1
where
6 © ISO 2019 – All rights reserved
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ISO 17987-8:2019(E)
A is the gain amplitude of the carrier signal in volts;
t is the time in seconds;
fc is the selected carrier frequency;
φ(t) is the carrier frequency phase; φ(t) = 0°, 90°, 180°, 270°;
φ(t) changes as a function of the byte field modulation scheme;
n is the maximal carrier frequency selection per transmit signal;
n = 1, 2, 3, 4.
Table 1 specifies the DC-LIN EPL carrier frequency.
Table 1 — Carrier frequency specification
Parameter Description Min. Max. Unit Accuracy
fc Carrier frequency band 5 30 MHz ±0,02 %
∆fc Carrier frequency resolution 0,1 0,1 MHz
In essence, fc ∈{5 MHz; 5,1 MHz; 5,2 MHz; ... 29,8 MHz; 29,9 MHz; 30 MHz}.
4.2.2 Byte field modulation scheme
4.2.2.1 Byte field modulation scheme structure

A byte field modulation scheme shall consist of a byte field sync preamble modulation (specified in

4.2.2.3) and a byte field data bit modulation (specified in 4.2.2.4). A first byte field modulation shall

start with a dedicated reference phase (specified in 4.2.2.2).

A byte field start bit and stop bit shall not be included in a byte field modulation scheme. At receiving

nodes, the DC-LIN EPL shall reconstruct both the start bit and stop bit artificially on RXD (see 4.4).

Figure 2 depicts a byte field modulation scheme structure.
© ISO 2019 – All rights reserved 7
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ISO 17987-8:2019(E)
Key
1 TXD DC-LIN node A
2 DC powerline
3 byte field
4 reference phase
5 byte field sync preamble
6 8 modulated data bits
Start.
Stop.
Figure 2 — Byte field modulation scheme structure

The byte field modulation scheme shall consist of a sequence of ±90° phase shifts while L is

out_err_cond
inactive (see 4.2.2.3 and 4.2.2.4).

While L is active, and only after completion of byte field sync preamble transmission, the

out_err_cond

transmit signal shall consist of no phase shifts (i.e. constant phase transmission) for the remaining field

transmission time (see 4.5.3).

Figure 3 specifies the transmitting phases for 0°, 90°, 180°, and 270° [i.e. φ(t)].

Figure 3 — Transmitter phase’s definition
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ISO 17987-8:2019(E)
4.2.2.2 Reference phase

The DC-LIN EPL shall transmit a reference phase (P ) prior to the first phase transmission of a

ref_first
byte field sync preamble modulation.

A first byte field transmission (FB ) shall be interpreted as a start of a byte field transmission by the

data link layer with an inter-byte space longer than 1/3 t .
BIT

A consecutive byte field transmission (CB ) shall be interpreted as a start of a byte field transmission

by the data link layer with an inter-byte space no longer than 1/3 t .
BIT

In the case of a FB , a dedicated reference phase shall be transmitted (P ) as specified in Figure 4.

TX ref_first

In the case of a CB (i.e. not a FB ), the last phase of the previous byte field modulation transmission

TX TX

shall be used as the reference phase (P ) of the next byte field sync preamble modulation (as

ref_consec
specified in Figure 5).

Figure 4 shows an example of byte field sync preamble modulation of a first byte field transmission.

Key
1 TXD DC-LIN node A 7 byte field sync preamble - actual TX phases
2 DC powerline 8 byte field sync preamble - phase shifts
3 TX phases 9 DC-LIN first byte field transmission of node A
4 phase shifts 10 Inter-byte space > 1/3 t
BIT
5 actual TX phases Start.
6 byte field sync preamble Stop.
Figure 4 — Example of byte field sync preamble modulation of first byte field TX
© ISO 2019 – All rights reserved 9
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ISO 17987-8:2019(E)

Figure 5 shows an example of byte field sync preamble modulation of consecutive byte field

transmissions.
P is the last phase of the previous byte field transmission.
ref_consec
Key
1 TXD DC-LIN node A 8 byte field sync preamble – phase shifts
2 DC powerline 9 consecutive byte field transmission
3 example of TX phases 10 Inter-byte space < 1/3 t
BIT
4 phase shifts 11 first byte field transmission
5 example of TX phases Start.
6 byte field sync preamble Stop.
7 byte field sync preamble – TX phases

Figure 5 — Example of byte field sync preamble modulation of consecutive byte field TX

Table 2 specifies the reference phase length and value.
Table 2 — Reference phase length and value definition
Min. phase Max. phase
Parameter Description Phase Unit
length length
P Reference phase of a first 0° 2/9 1/3 t
ref_first BIT
byte field transmission
(shown in Figure 4)
P Reference phase of a con- Last byte field 1/3 2/3 t
ref_consec BIT
secutive byte field trans- transmitted phase
mission (shown in Figure 5) (0°/90°/180°/270°)
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ISO 17987-8:2019(E)
4.2.2.3 Byte field sync preamble modulation

Upon detection of falling edge of a start bit (t ) from the data link layer, a byte field sync preamble

SB_TX
modulation transmission shall start on line-out.
Table 3 specifies the start time of a byte field sync preamble transmission.
Table 3 — Start time of byte field sync preamble transmission definition
Parameter Description Min. Typ. Max. Unit
t Start time of byte field sync preamble — — 2/16 t
SB_TX BIT
transmission on line-out (shown in
Figure 4)
The byte field sync preamble modulation shall consist of 18 phase shifts.

The nominal length of modulated byte field sync preamble (P ) is given in Formula (2).

sync_pre_len
Definition of the formula:
P = 2 t (2)
sync_pre_len BIT
Table 4 specifies the byte field sync preamble phase shifts.
Table 4 — Byte field sync preamble phase shifts definition
Phase
Parameter Description Phase shift
length
P Sync preamble 1 phase shift +90° 1/9 t
sp_1 BIT
P Sync preamble 2 phase shift +90°
(shown in
sp_2
rd Figure 4
P Sync preamble 3 phase shift −90°
sp_3
and
P Sync preamble 4 phase s
...

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