SIST EN IEC 62714-4:2020
(Main)Engineering data exchange format for use in industrial automation systems engineering - Automation markup language - Part 4: Logic (IEC 62714-4:2020)
Engineering data exchange format for use in industrial automation systems engineering - Automation markup language - Part 4: Logic (IEC 62714-4:2020)
This part of IEC 62714 specifies the integration of logic information as part of an AML model
for the data exchange in a heterogenous engineering tool landscape of production systems.
This document specifies three types of logic information: sequencing, behaviour, and
interlocking information.
This document deals with the six following sequencing and behaviour logic models (covering
the different phases of the engineering process of production systems) and how they are
integrated in AML: Gantt chart, activity-on-node network, timing diagram, Sequential Function
Chart (SFC), Function Block Diagram (FBD), and mathematical expression.
This document specifies how to model Gantt chart, activity-on-node network, and timing
diagram and how they are stored in Intermediate Modelling Layer (IML).
NOTE 1 With this, it is possible to transform one logic model into another one. A forward transformation supports
the information enrichment process and reduces or avoids a re-entry of information between the exchanging
engineering tools.
NOTE 2 Mapping of other logic models, e.g. event-driven logic models like state charts, onto IML is possible.
This document specifies how interlocking information is modelled (as interlocking source and
target groups) in AML. The interlocking logic model is stored in Function Block Diagram (FBD).
This document specifies the AML logic XML schema that stores the logic models by using
IEC 61131-10.
This document specifies how to reference PLC programs stored in PLCopen XML documents.
This document does not define details of the data exchange procedure or implementation
requirements for the import/export tools.
Datenaustauschformat für Planungsdaten industrieller Automatisierungssysteme - Automation Markup Language (AML) - Teil 4: Logik (IEC 62714-4:2020)
Format d'échange de données pour une utilisation dans l'ingénierie des systèmes d'automatisation industrielle - Automation markup language - Partie 4: Logique (IEC 62714-4:2020)
IEC 62714-4:2020 spécifie l'intégration des informations concernant la logique dans le cadre d'un modèle AML pour l'échange de données dans un environnement d'outils techniques hétérogène des systèmes de production.
Le présent document spécifie trois types d'informations concernant la logique: les informations relatives au séquencement, au comportement et au verrouillage.
Le présent document porte sur les six modèles logiques de séquencement et de comportement suivants (couvrant les différentes phases du processus d'ingénierie des systèmes de production) et sur la manière de les intégrer dans AML: diagramme de Gantt, réseau de représentation nodale, chronogramme, diagramme fonctionnel en séquence (SFC - sequential function chart), diagramme de bloc fonctionnel (FBD - function block diagram) et expression mathématique.
Le présent document spécifie la manière de modéliser le diagramme de Gantt, le réseau de représentation nodale et le chronogramme et de les archiver dans la couche de modélisation intermédiaire (IML - intermediate modelling layer).
Le présent document spécifie la manière de modéliser les informations concernant le verrouillage (source de verrouillage et groupes cibles, par exemple) dans AML. Le modèle logique de verrouillage est archivé dans le diagramme de bloc fonctionnel (FBD).
Le présent document spécifie le schéma XML de logique AML qui archive les modèles logiques selon l'IEC 61131-10.
Le présent document spécifie la manière de référencer les programmes PLC archivés dans les documents XML PLCopen.
Le présent document ne précise pas la procédure d'échange de données ni les exigences de mise en œuvre pour les outils d'importation/exportation.
Oblika izmenjave tehničnih podatkov za uporabo v industrijskem inženiringu avtomatizacije sistemov - Označevalni jezik za avtomatizacijo - 4. del: Logika (IEC 62714-4:2020)
General Information
Relations
Standards Content (Sample)
SLOVENSKI STANDARD
SIST EN IEC 62714-4:2020
01-december-2020
Oblika izmenjave tehničnih podatkov za uporabo v industrijskem inženiringu
avtomatizacije sistemov - Označevalni jezik za avtomatizacijo - 4. del: Logika (IEC
62714-4:2020)
Engineering data exchange format for use in industrial automation systems engineering -
Automation markup language - Part 4: Logic (IEC 62714-4:2020)
Datenaustauschformat für Planungsdaten industrieller Automatisierungssysteme -
Automation Markup Language (AML) - Teil 4: Logik (IEC 62714-4:2020)
Format d'échange de données pour une utilisation dans l'ingénierie des systèmes
d'automatisation industrielle - Automation markup language - Partie 4: Logique (IEC
62714-4:2020)
Ta slovenski standard je istoveten z: EN IEC 62714-4:2020
ICS:
25.040.40 Merjenje in krmiljenje Industrial process
industrijskih postopkov measurement and control
35.060 Jeziki, ki se uporabljajo v Languages used in
informacijski tehniki in information technology
tehnologiji
35.240.50 Uporabniške rešitve IT v IT applications in industry
industriji
SIST EN IEC 62714-4:2020 en,fr,de
2003-01.Slovenski inštitut za standardizacijo. Razmnoževanje celote ali delov tega standarda ni dovoljeno.
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SIST EN IEC 62714-4:2020
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SIST EN IEC 62714-4:2020
EUROPEAN STANDARD EN IEC 62714-4
NORME EUROPÉENNE
EUROPÄISCHE NORM
August 2020
ICS 25.040.40
English Version
Engineering data exchange format for use in industrial
automation systems engineering - Automation markup language
- Part 4: Logic
(IEC 62714-4:2020)
Format d'échange de données pour une utilisation dans Datenaustauschformat für Planungsdaten industrieller
l'ingénierie des systèmes d'automatisation industrielle - Automatisierungssysteme - Automation Markup Language
Automation markup language - Partie 4: Logique (AML) - Teil 4: Logik
(IEC 62714-4:2020) (IEC 62714-4:2020)
This European Standard was approved by CENELEC on 2020-07-21. CENELEC members are bound to comply with the CEN/CENELEC
Internal Regulations which stipulate the conditions for giving this European Standard the status of a national standard without any alteration.
Up-to-date lists and bibliographical references concerning such national standards may be obtained on application to the CEN-CENELEC
Management Centre or to any CENELEC member.
This European Standard exists in three official versions (English, French, German). A version in any other language made by translation
under the responsibility of a CENELEC member into its own language and notified to the CEN-CENELEC Management Centre has the
same status as the official versions.
CENELEC members are the national electrotechnical committees of Austria, Belgium, Bulgaria, Croatia, Cyprus, the Czech Republic,
Denmark, Estonia, Finland, France, Germany, Greece, Hungary, Iceland, Ireland, Italy, Latvia, Lithuania, Luxembourg, Malta, the
Netherlands, Norway, Poland, Portugal, Republic of North Macedonia, Romania, Serbia, Slovakia, Slovenia, Spain, Sweden, Switzerland,
Turkey and the United Kingdom.
European Committee for Electrotechnical Standardization
Comité Européen de Normalisation Electrotechnique
Europäisches Komitee für Elektrotechnische Normung
CEN-CENELEC Management Centre: Rue de la Science 23, B-1040 Brussels
© 2020 CENELEC All rights of exploitation in any form and by any means reserved worldwide for CENELEC Members.
Ref. No. EN IEC 62714-4:2020 E
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SIST EN IEC 62714-4:2020
EN IEC 62714-4:2020 (E)
European foreword
The text of document 65E/654/CDV, future edition 1 of IEC 62714-4, prepared by SC 65E "Devices
and integration in enterprise systems" of IEC/TC 65 "Industrial-process measurement, control and
automation" was submitted to the IEC-CENELEC parallel vote and approved by CENELEC as
EN IEC 62714-4:2020.
The following dates are fixed:
• latest date by which the document has to be implemented at national (dop) 2021-04-21
level by publication of an identical national standard or by endorsement
• latest date by which the national standards conflicting with the (dow) 2023-07-21
document have to be withdrawn
Attention is drawn to the possibility that some of the elements of this document may be the subject of
patent rights. CENELEC shall not be held responsible for identifying any or all such patent rights.
Endorsement notice
The text of the International Standard IEC 62714-4:2020 was approved by CENELEC as a European
Standard without any modification.
In the official version, for Bibliography, the following note has to be added for the standard indicated:
IEC 62881:2018 NOTE Harmonized as EN IEC 62881:2018 (not modified)
2
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SIST EN IEC 62714-4:2020
EN IEC 62714-4:2020 (E)
Annex ZA
(normative)
Normative references to international publications
with their corresponding European publications
The following documents are referred to in the text in such a way that some or all of their content
constitutes requirements of this document. For dated references, only the edition cited applies. For
undated references, the latest edition of the referenced document (including any amendments)
applies.
NOTE 1 Where an International Publication has been modified by common modifications, indicated by (mod), the relevant
EN/HD applies.
NOTE 2 Up-to-date information on the latest versions of the European Standards listed in this annex is available here:
www.cenelec.eu.
Publication Year Title EN/HD Year
IEC 61131-3 - Programmable controllers - Part 3: EN 61131-3 -
Programming languages
IEC 61131-10 - Programmable controllers - Part 10: PLC EN IEC 61131-10 -
open XML exchange format
IEC 62714-1 2014 Engineering data exchange format for use EN 62714-1 -
in industrial automation systems
engineering - Automation markup
language - Part 1: Architecture and
general requirements
W3C 2004 Extensible Markup Language (XML) 1.0 - -
(Third Edition), W3C Recommendation 04
February 2004
W3C 2003 Mathematical Markup Language (MathML) - -
Version 2.0 (Second Edition), W3C
Recommendation 21 October 2003
IETF RFC 5646 - Tags for Identifying Languages - -
IETF RFC 4122 - A Universally Unique IDentifier (UUID) - -
URN Namespace
PLCopen - XML 2.01: XML formats for IEC 61131-3 - -
3
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SIST EN IEC 62714-4:2020
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SIST EN IEC 62714-4:2020
IEC 62714-4
®
Edition 1.0 2020-06
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
colour
inside
Engineering data exchange format for use in industrial automation systems
engineering – Automation markup language –
Part 4: Logic
Format d'échange de données pour une utilisation dans l'ingénierie des
systèmes d'automatisation industrielle – Automation markup language –
Partie 4: Logique
INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
COMMISSION
ELECTROTECHNIQUE
INTERNATIONALE
ICS 25.040.40 ISBN 978-2-8322-8399-8
Warning! Make sure that you obtained this publication from an authorized distributor.
Attention! Veuillez vous assurer que vous avez obtenu cette publication via un distributeur agréé.
® Registered trademark of the International Electrotechnical Commission
Marque déposée de la Commission Electrotechnique Internationale
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SIST EN IEC 62714-4:2020
– 2 – IEC 62714-4:2020 © IEC 2020
CONTENTS
FOREWORD . 9
INTRODUCTION . 11
1 Scope . 13
2 Normative references . 13
3 Terms, definitions and abbreviated terms . 14
3.1 Terms and definitions . 14
3.2 Abbreviated terms . 15
4 Conformity . 16
5 Overview . 16
5.1 Logic information in production system engineering . 16
5.2 Logic models in production system engineering . 17
5.3 Storing logic models in AML logic XML . 18
5.4 Referencing logic information . 20
6 Logic models . 21
6.1 General . 21
6.2 Gantt charts . 21
6.2.1 General . 21
6.2.2 Graphical elements . 21
6.2.3 Chart structure. 21
6.2.4 Logic information . 22
6.2.5 Logic information within Gantt chart . 22
6.3 Activity-on-node networks . 22
6.3.1 General . 22
6.3.2 Graphical elements . 22
6.3.3 Node structure . 23
6.3.4 Network structure . 23
6.3.5 Logic information . 23
6.3.6 Logic information within activity-on-node networks. 23
6.4 Timing diagrams . 24
6.4.1 General . 24
6.4.2 Graphical elements . 24
6.4.3 Diagram structure . 25
6.4.4 Logic information . 25
6.4.5 Logic information within timing diagrams . 26
6.5 Sequential function charts . 26
6.6 Function block diagrams . 27
6.7 Mathematical expression. 27
7 AML logic XML schema description . 27
7.1 Schema overview . 27
7.1.1 Use of IEC 61131-10 schema . 27
7.1.2 Schema versioning . 28
7.2 Root element "AMLLogic" . 29
7.2.1 General . 29
7.2.2 Attributes . 29
7.2.3 Sub-element "WriterHeader" . 29
7.2.4 Sub-element "Types" . 29
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IEC 62714-4:2020 © IEC 2020 – 3 –
7.2.5 Sub-element "Documentation" . 30
7.3 Complex type "FunctionBlock" . 30
7.3.1 General . 30
7.3.2 Attributes . 30
7.3.3 Sub-element "Parameters" . 30
7.3.4 Sub-element "Vars . 30
7.3.5 Sub-element "MainBody" . 30
7.3.6 Complex type "ParameterSet" . 31
7.3.7 Complex type "VariableDecl" . 31
7.4 Complex Type "IML" . 32
7.4.1 General . 32
7.4.2 Attributes . 33
7.4.3 Sub-element "Resource" . 33
7.4.4 Sub-element "TimeInformation" . 33
7.4.5 Choice of "IML***" element . 33
7.4.6 Complex type "IMLStep" . 33
7.4.7 Complex type "IMLTransition" . 34
7.4.8 Complex type "IMLSimultaneousDivergence" . 35
7.4.9 Complex type "IMLSimultaneousConvergence" . 35
7.5 Complex Type "MathematicalExpression" . 35
7.5.1 General . 35
7.5.2 Attributes . 36
7.5.3 Sub-element "VariableMapping" . 36
7.5.4 Sub-element "MathML" . 36
7.6 Simple type "LogicModelTypeEnum" . 36
7.7 Simple type "TimeUnion" . 36
7.8 Simple type "TimeFormatEnum" . 36
7.9 Simple type "UuidString" . 37
8 Storing logic models . 37
8.1 General . 37
8.2 Storing Gantt charts in AML logic XML . 37
8.2.1 Common rules . 37
8.2.2 Storing the start of a Gantt chart . 37
8.2.3 Storing bars . 38
8.2.4 Storing arrows . 38
8.2.5 Storing successor bars . 39
8.2.6 Storing predecessor bars . 41
8.3 Storing activity-on-node networks in AML logic XML . 42
8.3.1 Common rules . 42
8.3.2 Storing the start of an activity-on-node network . 42
8.3.3 Storing nodes . 43
8.3.4 Storing arrows . 43
8.3.5 Storing successor nodes . 44
8.3.6 Storing predecessor nodes . 45
8.4 Storing timing diagrams in AML logic XML . 46
8.4.1 Common rules . 46
8.4.2 Storing the timeline of a timing diagram . 47
8.4.3 Storing resources and resource states . 48
8.4.4 Storing lifelines . 48
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SIST EN IEC 62714-4:2020
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8.4.5 Storing the time signal and the resource signal . 50
8.5 Storing sequential function charts in AML logic XML . 52
8.5.1 Common rules . 52
8.5.2 Storing variables . 52
8.6 Storing function block diagrams in AML logic XML . 53
8.6.1 Common rules . 53
8.6.2 Storing variables . 53
8.7 Storing mathematical expressions in AML logic XML . 54
8.7.1 Common rules . 54
8.7.2 Storing variables . 55
8.7.3 Storing variable mappings . 55
8.7.4 Storing mathematical expressions . 56
9 Meta information about AML logic XML writer tools . 56
10 Extensions of AML classes for logic . 57
10.1 General . 57
10.2 AutomationMLLogicRoleClassLib . 57
10.2.1 General . 57
10.2.2 RoleClass InterlockingTargetGroup . 58
10.2.3 RoleClass InterlockingSourceGroup . 58
10.2.4 RoleClass LogicModelObject . 59
10.3 AutomationMLLogicInterfaceClassLib . 60
10.3.1 General . 60
10.3.2 InterfaceClass LogicModelInterface . 60
10.3.3 InterfaceClass SequencingLogicModelInterface . 60
10.3.4 InterfaceClass BehaviourLogicModelInterface . 61
10.3.5 InterfaceClass InterlockingLogicModelInterface . 61
10.3.6 InterfaceClass LogicModelElementInterface . 61
10.3.7 InterfaceClass VariableInterface . 62
10.3.8 InterfaceClass InterlockingVariableInterface . 62
10.4 AutomationMLPLCopenXMLInterfaceClassLib. 63
10.4.1 General . 63
10.4.2 InterfaceClass VariableInterface . 63
10.5 AutomationMLInterfaceClassLib . 64
10.5.1 General . 64
10.5.2 InterfaceClass InterlockingConnector . 64
10.5.3 InterfaceClass PLCopenXMLInterface . 64
11 Referencing AML logic XML documents . 64
11.1 General . 64
11.2 Referencing logic information . 64
12 Linking AML objects with interlocking information . 65
12.1 General . 65
12.2 Referencing interlocking information . 65
Annex A (informative) Examples for storing logic models in AML logic XML . 67
A.1 Example for storing Gantt charts . 67
A.1.1 General . 67
A.1.2 Storing of activities without predecessor and successor relation . 67
A.1.3 Storing of an activity sequence . 68
A.1.4 Storing of an activity sequence with divergences . 70
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IEC 62714-4:2020 © IEC 2020 – 5 –
A.1.5 Storing of an activity sequence with convergences . 71
A.2 Example for storing activity-on-node networks . 72
A.2.1 General . 72
A.2.2 Storing of activities without predecessor and successor relation . 72
A.2.3 Storing of an activity sequence . 73
A.2.4 Storing of an activity sequence with divergences . 74
A.2.5 Storing of an activity sequence with convergences . 75
A.3 Example for storing timing diagrams . 76
A.3.1 General . 76
A.3.2 Example of storing internal signal . 77
A.3.3 Example of storing external signal . 78
A.3.4 Example of storing signal between two resource states flows . 79
A.4 Example for storing sequential function charts . 81
A.5 Example for storing function block diagrams . 83
A.6 Example for storing mathematical expressions . 85
Annex B (informative) Examples for referencing logic information . 89
B.1 General . 89
B.2 Referencing logic information expressed as logic models . 89
B.2.1 General . 89
B.2.2 Referencing logic information stored in one FunctionBlock . 89
B.2.3 Referencing logic information, which is composed of several
FunctionBlocks . 90
B.2.4 Referencing logic information, which is composed of several AML logic
XML documents . 90
B.3 Referencing logic information as a part of logic models . 92
B.3.1 General . 92
B.3.2 Referencing a variable . 92
B.3.3 Referencing a logic element . 93
B.4 Referencing logic information as a part of already referenced logic models . 93
Annex C (informative) Examples for referencing interlocking information . 96
C.1 General . 96
C.2 Interlocking information . 97
C.3 Referencing interlocking information without interlocking condition . 97
C.4 Referencing interlocking information with interlocking condition . 99
Annex D (normative) XML representation of AML standard libraries . 103
D.1 General . 103
D.2 AutomationMLLogicRoleClassLib . 103
D.3 AutomationMLLogicInterfaceClassLib . 104
D.4 AutomationMLPLCopenXMLInterfaceClassLib. 105
Annex E (normative) XML representation of AML logic XML schema . 106
Bibliography . 110
Figure 1 – Overview of the engineering data exchange format AML . 11
Figure 2 – Example of system representation with roles of information in AML . 17
Figure 3 – Logic models in AML . 18
Figure 4 – Storing logic models in AML logic XML . 19
Figure 5 – Modelling elements of the AML logic XML . 20
Figure 6 – Model elements of Gantt charts .
...
SLOVENSKI STANDARD
oSIST prEN IEC 62714-4:2019
01-julij-2019
Oblika izmenjave tehničnih podatkov za uporabo v industrijskem inženiringu
avtomatizacije sistemov - Označevalni jezik za avtomatizacijo (AvtomatizacijaML) -
4. del: Logika
Engineering data exchange format for use in industrial automation systems engineering
- Automation Markup Language - Part 4: Logic
Ta slovenski standard je istoveten z: prEN IEC 62714-4:2019
ICS:
25.040.40 Merjenje in krmiljenje Industrial process
industrijskih postopkov measurement and control
35.060 Jeziki, ki se uporabljajo v Languages used in
informacijski tehniki in information technology
tehnologiji
35.240.50 Uporabniške rešitve IT v IT applications in industry
industriji
oSIST prEN IEC 62714-4:2019 en,fr,de
2003-01.Slovenski inštitut za standardizacijo. Razmnoževanje celote ali delov tega standarda ni dovoljeno.
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oSIST prEN IEC 62714-4:2019
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oSIST prEN IEC 62714-4:2019
65E/654/CDV
COMMITTEE DRAFT FOR VOTE (CDV)
PROJECT NUMBER:
IEC 62714-4 ED1
DATE OF CIRCULATION: CLOSING DATE FOR VOTING:
2019-05-17 2019-08-09
SUPERSEDES DOCUMENTS:
65E/619/CD,65E/651/CC
IEC SC 65E : DEVICES AND INTEGRATION IN ENTERPRISE SYSTEMS
SECRETARIAT: SECRETARY:
United States of America Mr Donald (Bob) Lattimer
OF INTEREST TO THE FOLLOWING COMMITTEES: PROPOSED HORIZONTAL STANDARD:
Other TC/SCs are requested to indicate their interest, if
any, in this CDV to the secretary.
FUNCTIONS CONCERNED:
EMC ENVIRONMENT QUALITY ASSURANCE SAFETY
SUBMITTED FOR CENELEC PARALLEL VOTING NOT SUBMITTED FOR CENELEC PARALLEL VOTING
Attention IEC-CENELEC parallel voting
The attention of IEC National Committees, members of
CENELEC, is drawn to the fact that this Committee Draft
for Vote (CDV) is submitted for parallel voting.
The CENELEC members are invited to vote through the
CENELEC online voting system.
This document is still under study and subject to change. It should not be used for reference purposes.
Recipients of this document are invited to submit, with their comments, notification of any relevant patent rights of
which they are aware and to provide supporting documentation.
TITLE:
Engineering data exchange format for use in industrial automation systems engineering -
Automation Markup Language - Part 4: Logic
PROPOSED STABILITY DATE: 2024
NOTE FROM TC/SC OFFICERS:
Copyright © 2019 International Electrotechnical Commission, IEC. All rights reserved. It is permitted to download this
electronic file, to make a copy and to print out the content for the sole purpose of preparing National Committee positions.
You may not copy or "mirror" the file or printed version of the document, or any part of it, for any other purpose without
permission in writing from IEC.
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oSIST prEN IEC 62714-4:2019
65E/654/CDV – 2 – IEC 62714-4/CDV Ed 1.0 © IEC
1 CONTENTS
2
3 FOREWORD . 9
4 INTRODUCTION . 11
5 1 Scope . 13
6 2 Normative references . 13
7 3 Terms, definitions and abbreviations . 14
8 3.1 Terms and definitions . 14
9 3.2 Abbreviations . 15
10 4 Conformity . 15
11 Overview . 16
5
12 5.1 Logic information in production system engineering . 16
13 5.2 Logic models in production system engineering . 17
14 5.3 Storing logic models in AML logic XML . 18
15 Referencing logic information . 20
5.4
16 6 Logic models . 21
17 6.1 General . 21
18 6.2 Gantt charts . 21
19 General . 21
6.2.1
20 6.2.2 Graphical elements . 21
21 6.2.3 Chart structure . 21
22 6.2.4 Logic information . 22
23 6.2.5 Logic information within Gantt chart . 22
24 6.3 Activity-on-node networks . 23
25 General . 23
6.3.1
26 6.3.2 Graphical elements . 23
27 6.3.3 Node structure . 23
28 6.3.4 Network structure . 23
29 6.3.5 Logic information . 24
30 6.3.6 Logic information within activity-on-node networks . 24
31 Timing diagrams . 25
6.4
32 6.4.1 General . 25
33 6.4.2 Graphical elements . 25
34 6.4.3 Diagram structure . 25
35 6.4.4 Logic information . 26
36 6.4.5 Logic information within timing diagrams . 26
37 6.5 Sequential function charts . 27
38 6.6 Function block diagrams . 27
39 6.7 Mathematical expression . 27
40 7 AML logic XML schema description . 27
41 7.1 Schema overview . 27
42 7.1.1 Use of IEC 61131-10 schema . 27
43 7.1.2 Schema versioning . 29
44 7.2 Root element “AMLLogic . 30
45 7.2.1 General . 30
46 7.2.2 Attributes . 30
47 7.2.3 Sub-element “WriterHeader” . 30
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65E/654/CDV – 3 – IEC 62714-4/CDV Ed 1.0 © IEC
48 7.2.4 Sub-element “Types” . 30
49 7.2.5 Sub-element “Documentation” . 31
50 7.3 Complex type “FunctionBlock” . 31
51 7.3.1 General . 31
52 7.3.2 Attributes . 31
53 7.3.3 Sub-element “Parameters” . 31
54 7.3.4 Sub-element “Vars . 31
55 7.3.5 Sub-element “MainBody” . 31
56 7.3.6 Complex type “ParameterSet” . 32
57 7.3.7 Complex type “VariableDecl” . 32
58 7.4 Complex Type “IML” . 33
59 7.4.1 General . 33
60 7.4.2 Attributes . 33
61 7.4.3 Sub-element “Resource” . 33
62 7.4.4 Sub-element “TimeInformation” . 34
63 7.4.5 Choice of “IML***” element . 34
64 7.4.6 Complex type “IMLStep” . 34
65 7.4.7 Complex type “IMLTransition” . 35
66 7.4.8 Complex type “IMLSimultaneousDivergence” . 35
67 7.4.9 Complex type “IMLSimultaneousConvergence” . 36
68 7.5 Complex Type “MathematicalExpression” . 36
69 7.5.1 General . 36
70 7.5.2 Attribtues . 36
71 7.5.3 Sub-element “VariableMapping”. 36
72 7.5.4 Sub-element “MathML” . 37
73 7.6 Simple type “LogicModelTypeEnum” . 37
74 7.7 Simple type “TimeUnion” . 37
75 7.8 Simple type “TimeFormatEnum” . 37
76 7.9 Simple type “UuidString”. 37
77 8 Storing logic models . 37
78 8.1 General . 37
79 8.2 Storing Gantt charts in AML logic XML . 38
80 8.2.1 Common rules . 38
81 8.2.2 Storing the start of a Gantt chart . 38
82 8.2.3 Storing bars . 38
83 8.2.4 Storing arrows . 39
84 8.2.5 Storing successor bars . 40
85 8.2.6 Storing predecessor bars . 41
86 8.3 Storing activity-on-node networks in AML logic XML . 42
87 8.3.1 Common rules . 42
88 8.3.2 Storing the start of an activity-on-node network . 42
89 8.3.3 Storing nodes . 43
90 8.3.4 Storing arrows . 43
91 8.3.5 Storing successor nodes . 44
92 8.3.6 Storing predecessor nodes . 45
93 8.4 Storing timing diagrams in AML logic XML . 46
94 8.4.1 Common rules . 46
95 8.4.2 Storing the timeline of a timing diagram . 46
96 8.4.3 Storing resources and resource states . 47
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97 8.4.4 Storing lifelines . 47
98 8.4.5 Storing the time signal and the resource signal . 49
99 8.5 Storing sequential function charts in AML logic XML. 51
100 8.5.1 Common rules . 51
101 8.5.2 Storing variables . 51
102 8.6 Storing function block diagrams in AML logic XML . 52
103 8.6.1 Common rules . 52
104 8.6.2 Storing variables . 52
105 8.7 Storing mathematical expressions in AML logic XML . 52
106 8.7.1 Common rules . 52
107 8.7.2 Storing variables . 53
108 8.7.3 Storing variable mappings . 54
109 8.7.4 Storing mathematical expressions . 54
110 9 Meta information about AML logic XML writer tools . 54
111 10 Extensions of AML classes for logic. 56
112 10.1 General . 56
113 10.2 AutomationMLLogicRoleClassLib . 56
114 10.2.1 General . 56
115 10.2.2 RoleClass InterlockingTargetGroup . 57
116 10.2.3 RoleClass InterlockingSourceGroup . 57
117 10.2.4 RoleClass LogicModelObject . 58
118 10.3 AutomationMLLogicInterfaceClassLib . 58
119 10.3.1 General . 58
120 10.3.2 InterfaceClass LogicModelInterface . 59
121 10.3.3 InterfaceClass SequencingLogicModelInterface . 59
122 10.3.4 InterfaceClass BehaviourLogicModelInterface . 59
123 10.3.5 InterfaceClass InterlockingLogicModelInterface . 60
124 10.3.6 InterfaceClass LogicModelElementInterface . 60
125 10.3.7 InterfaceClass VariableInterface . 60
126 10.3.8 InterfaceClass InterlockingVariableInterface . 61
127 10.4 AutomationMLPLCopenXMLInterfaceClassLib . 61
128 10.4.1 General . 61
129 10.4.2 InterfaceClass VariableInterface . 61
130 10.5 AutomationMLInterfaceClassLib . 62
131 10.5.1 General . 62
132 10.5.2 InterfaceClass InterlockingConnector . 62
133 10.5.3 InterfaceClass PLCopenXMLInterface . 62
134 11 Referencing AML logic XML documents . 62
135 11.1 General . 62
136 11.2 Referencing logic information . 62
137 12 Linking AML objects with interlocking information . 63
138 12.1 General . 63
139 12.2 Referencing interlocking information . 63
140 Annex A (Informative) Examples for storing logic models in AML logic XML . 65
141 A.1 Example for storing Gantt charts . 65
142 A.1.1 Storing of activities without predecessor and successor relation . 65
143 A.1.2 Storing of an activity sequence . 65
144 A.1.3 Storing of an activity sequence with divergences . 67
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145 A.1.4 Storing of an activity sequence with convergences . 68
146 A.2 Example for storing activity-on-node networks . 69
147 A.2.1 Storing of activities without predecessor and successor relation . 69
148 A.2.2 Storing of an activity sequence . 70
149 A.2.3 Storing of an activity sequence with divergences . 71
150 A.2.4 Storing of an activity sequence with convergences . 72
151 A.3 Example for storing timing diagrams . 73
152 A.3.1 Example of storing internal signal . 73
153 A.3.2 Example of storing external signal . 74
154 A.3.3 Example of storing signal between two resource states flows . 76
155 A.4 Example for storing sequential function charts . 77
156 A.5 Example for storing function block diagrams . 80
157 A.6 Example for storing mathematical expressions . 82
158 Annex B (Informative) Examples for referencing logic information . 85
159 B.1 General . 85
160 B.2 Referencing logic information expressed as logic models . 85
161 B.2.1 Referencing logic information stored in one FunctionBlock . 85
162 B.2.2 Referencing logic information, which is composed of several
163 FunctionBlocks . 86
164 B.2.3 Referencing logic information, which is composed of several AML
165 logic XML documents . 86
166 B.3 Referencing logic information as a part of logic models . 87
167 B.3.1 Referencing a variable . 88
168 B.3.2 Referencing a logic element . 88
169 B.4 Referencing logic information as a part of already referenced logic models . 89
170 Annex C (Informative) Examples for referencing interlocking information . 92
171 C.1 General . 92
172 C.2 Interlocking information . 93
173 C.3 Referencing interlocking information without interlocking condition . 93
174 C.4 Referencing interlocking information with interlocking condition . 95
175 Annex D (Normative) XML representation of AML standard libraries . 99
176 D.1 AutomationMLLogicRoleClassLib . 99
177 D.2 AutomationMLLogicInterfaceClassLib . 100
178 D.3 AutomationMLPLCopenXMLInterfaceClassLib . 100
179 Annex E (Normative) XML representation of AML logic XML schema . 102
180 Bibliography . 106
181
182 Figure 1 – Overview of the engineering data exchange format AML . 11
183 Figure 2 – Example of system representation with roles of information in AML . 17
184 Figure 3 – Logic models in AML . 18
185 Figure 4 – Storing logic models in AML logic XML . 19
186 Figure 5 – Modelling elements of the AML logic XML . 20
187 Figure 6 – Model elements of Gantt charts . 21
188 Figure 7 – Information provided by Gantt charts . 22
189 Figure 8 – Model elements of activity-on-node networks . 23
190 Figure 9 – Information provided by activity-on-node networks . 25
191 Figure 10 – Model elements of timing diagrams . 25
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192 Figure 11 – Information provided by timing diagrams . 27
193 Figure 12 – AML logic schema overview . 29
194 Figure 13 – Root element “AMLLogic” . 30
195 Figure 14 – Complex type “FunctionBlock” . 31
196 Figure 15 – Complex type “ParameterSet” . 32
197 Figure 16 – Complex type “VariableDecl” . 32
198 Figure 17 – Complex type “IML” . 33
199 Figure 18 – Complex type “IMLStep” . 34
200 Figure 19 – Complex type “IMLTransition” . 35
201 Figure 20 – Complex type “IMLSimultaneousDivergence” . 36
202 Figure 21 – Complex type “IMLSimultaneousConvergence” . 36
203 Figure 22 – Complex type “MathematicalExpression” . 36
204 Figure 23 – AutomationMLLogicRoleClassLib . 56
205 Figure 24 – AutomationMLLogicInterfaceClassLib . 58
206 Figure 25 – AutomationMLPLCopenXMLInterfaceClassLib . 61
207 Figure A.1 – Flow rate of valves . 82
208 Figure A.2 – Example for storing a mathematical expression . 84
209 Figure B.1 – Referencing logic information (as SFC) stored in one FunctionBlock . 85
210 Figure B.2 – XML text of the CAEX file for referencing logic information stored in one
211 FunctionBlock . 86
212 Figure B.3 – Referencing logic information, which is composed of several
213 FunctionBlocks . 86
214 Figure B.4 – Referencing logic information which is composed of several AML logic
215 XML documents . 87
216 Figure B.5 – XML text of the CAEX file for referencing logic information, which is
217 composed of several AML logic XML documents . 87
218 Figure B.6 – Referencing a variable . 88
219 Figure B.7 – XML text of the CAEX file for referencing a variable . 88
220 Figure B.8 – Referencing a logic element . 89
221 Figure B.9 – XML text of the CAEX file for referencing a logic element . 89
222 Figure B.10 – Referencing a variable of an already referenced logic model . 90
223 Figure B.11 – XML text of the CAEX file for referencing a variable of an already
224 referenced logic model . 90
225 Figure C.1 – Example manufacturing system . 92
226 Figure C.2 – Example interlocking source group and interlocking target group . 93
227 Figure C.3 – Referencing interlocking information without interlocking condition . 94
228 Figure C.4 – XML text of the CAEX file for referencing interlocking information without
229 interlocking condition . 95
230 Figure C.5 – Referencing interlocking information
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