WG 8 - TC 82/WG 8

IEC TS 63202-3:2023 describes procedures for the measurement of current-voltage (I-V) characteristics of crystalline silicon bifacial photovoltaic (PV) cells for both laboratory and mass production applications.
This document is intended to be used for measurement of individual unencapsulated bifacial PV cells, in addition to the requirements described in IEC 60904-1 and differentiating from IEC TS 60904-1-2 which is more applicable to encapsulated PV device. Specific requirements on bifacial reference cells and calibration of solar simulators are also defined to provide useful guidance for the proposed methods.

IEC TS 63202-4:2022 describes procedures for measuring the light and elevated temperature induced degradation (LETID) of crystalline silicon photovoltaic (PV) cells in simulated sunlight. The requirements for measuring initial light induced degradation (LID) of crystalline silicon PV cells are covered by IEC 63202-1, where LID degradation risk of PV cells under moderate temperature and initial durations within termination criteria of 20 kWh·m-2 are evaluated. The procedures described in this document are to evaluate the degradation behaviour of PV cells under elevated temperature and longer duration of light irradiation. The procedures described in this document can be used to detect the LETID risks of PV cells [2],[3] and to judge the effectiveness of LETID mitigation measures, e.g. quick test for production monitoring, thus helping improve the energy yield of PV modules.

IEC 63202-1:2019 describes procedures for measuring the light-induced degradation (LID) of crystalline silicon photovoltaic (PV) cells in simulated sunlight. The magnitude of LID in a crystalline silicon PV cell is determined by comparing maximum output power at Standard Test Conditions (STC) before, and after, exposure to simulated sunlight at a specified temperature and irradiance.
The purpose of this document is to provide standardized PV cell LID information to help PV module manufacturers in minimizing the mismatch between cells within the same module, thereby maximizing power yield.