EN 62433-2:2010
(Main)EMC IC modelling - Part 2: Models of integrated circuits for EMI behavioural simulation - Conducted emissions modelling (ICEM-CE)
EMC IC modelling - Part 2: Models of integrated circuits for EMI behavioural simulation - Conducted emissions modelling (ICEM-CE)
IEC 62433-2:2008(E) specifies macro-models for ICs to simulate conducted electromagnetic emissions on a printed circuit board. The model is commonly called Integrated Circuit Emission Model - Conducted Emission (ICEM-CE). The ICEM-CE model can also be used for modelling an IC-die, a functional block and an Intellectual Property block (IP). The ICEM-CE model can be used to model both digital and analogue ICs. Basically, conducted emissions have two origins: - conducted emmissions through power supply terminals and ground reference structure; - conducted emmisions through input/output (I/O) terminals. The ICEM-CE model addresses those two types of origins in a single approach. This standard defines structures and components of the macro-model for EMI simulation taking into account the IC's internal activities. This standard gives general data, which can be implemented in different formats or languages such as IBIS, IMIC, SPICE, VHDL-AMS and Verilog. SPICE is however chosen as default simulation environment to cover all the conducted emissions. This standard also specifies requirements for information that shall be incorporated in each ICEM-CE model or component part of the model for model circulation, but description syntax is not within the scope of this standard.
EMV-IC-Modellierung - Teil 2: Modelle integrierter Schaltungen für die Simulation des Verhaltens bei elektromagnetischer Beeinflussung - Modellierung leitungsgeführter Aussendungen (ICEM-CE)
Modèles de circuits intégrés pour la CEM - Partie 2: Modèles de circuits intégrés pour la simulation du comportement lors de perturbations électromagnétiques – Modélisation des émissions conduites (ICEM-CE)
La CEI 62433-2:2008 définit des macromodèles pour circuits intégrés, destinés à simuler les émissions électromagnétiques conduites sur une carte de circuit imprimé. On appelle habituellement ce modèle: Modèle des émissions de circuits intégrés - Émission conduite (ICEM-CE). Le modèle ICEM-CE peut également être utilisé pour modéliser une puce de circuit intégré, un bloc fonctionnel et un bloc à propriété intellectuelle (IP). Le modèle ICEM-CE peut être utilisé pour modéliser à la fois des circuits intégrés numériques et analogiques. Les émissions conduites ont fondamentalement deux origines: - les émissions conduites par l'intermédiaire des bornes d'alimentation et des structures de référence de masse; - les émissions conduites par l'intermédiaire des bornes d'entrée/sortie (E/S). Le modèle ICEM-CE traite ces deux types d'origine en une approche unique. La présente norme définit les structures et les composants du macromodèle pour la simulation des perturbations électromagnétiques en tenant compte des activités internes du circuit intégré. La présente norme fournit des données générales, pouvant être mises en oeuvre dans des formats ou des langages différents tels que: IBIS, IMIC, SPICE, VHDL-AMS et Verilog. On choisit toutefois SPICE comme environnement de simulation par défaut pour couvrir la totalité des émissions conduites. La présente norme spécifie également les exigences relatives aux informations qui doivent être incorporées dans chaque modèle ICEM-CE ou élément constituant du modèle pour la circulation du modèle. La syntaxe de la description ne fait toutefois pas partie du domaine d'application de la présente norme.
Modeli integriranih vezij za vedenjsko simulacijo pri EMI - 2.del: Modeli integriranih vezij za vedenjsko simulacijo pri EMI - Vodeni model oddajanja ICEM-CE, ICEM (IEC 62433-2:2008)
Ta del IEC 62433 določa makro modele za integrirana vezja, ki simulirajo vodeno elektromagnetno oddajanje na ploščah tiskanega vezja. Model se pogosto imenuje model oddajanja integriranih vezij – vodeno oddajanje (ICEM-CE). Model ICEM-CE se lahko uporablja tudi za modeliranje integriranega vezja, funkcionalnega bloka in bloka intelektualne lastnine (IP). Model ICEM-CE se lahko uporablja za modeliranje digitalnih in analognih integriranih vezij. V osnovi ima vodeno oddajanje dva vira: . vodeno oddajanje preko napajalnih terminalov in ozemljitvenih referenčnih struktur; . vodeno oddajanje preko vhodnih/izhodnih (I/O) terminalov. Model ICEM-CE obravnava obe vrsti virov z enakim pristopom. Ta standard določa strukture in komponente makro modela za simulacijo pri EMI z upoštevanjem notranjih aktivnosti integriranih vezij. Ta standard podaja splošne podatke, ki se lahko uporabijo v različnih formatih ali jezikih, kot so IBIS, IMIC, SPICE, VHDL-AMS in Verilog. Za privzeto simulacijsko okolje, ki zajema vsa vodena oddajanja, pa je bil izbran SPICE. Ta standard določa tudi zahteve za informacije, ki jih mora vsebovati vsak model ali sestavni del modela ICEM-CE za kroženje modela, vendar pa opisna skladnja ne spada v območje uporabe tega standarda.
General Information
Relations
Standards Content (Sample)
SLOVENSKI STANDARD
01-marec-2010
Modeli integriranih vezij za vedenjsko simulacijo pri EMI - 2.del: Modeli integriranih
vezij za vedenjsko simulacijo pri EMI - Vodeni model oddajanja ICEM-CE, ICEM
(IEC 62433-2:2008)
EMC IC modelling - Part 2: Models of Integrated Circuits for EMI behavioural simulation -
Conducted Emissions modelling (ICEM-CE) (IEC 62433-2:2008)
EMV-IC-Modellierung - Teil 2: Modelle integrierter Schaltungen für die Simulation des
Verhaltens bei elektromagnetischer Beeinflussung - Modellierung leitungsgeführter
Aussendungen (ICEM-CE) (IEC 62433-2:2008)
Compatibilité électromagnétique (CEM) - Partie 2 : Modèles de circuits intégrés pour la
simulation du comportement lors de perturbations électromagnétiques - Modélisation des
émissions conduites (ICEM-CE) (CEI 62433-2:2008)
Ta slovenski standard je istoveten z: EN 62433-2:2010
ICS:
31.200 Integrirana vezja, Integrated circuits.
mikroelektronika Microelectronics
2003-01.Slovenski inštitut za standardizacijo. Razmnoževanje celote ali delov tega standarda ni dovoljeno.
EUROPEAN STANDARD
EN 62433-2
NORME EUROPÉENNE
January 2010
EUROPÄISCHE NORM
ICS 31.200
English version
EMC IC modelling -
Part 2: Models of integrated circuits for EMI behavioural simulation -
Conducted emissions modelling (ICEM-CE)
(IEC 62433-2:2008)
Compatibilité électromagnétique (CEM) - EMV-IC-Modellierung -
Partie 2: Modèles de circuits intégrés Teil 2: Modelle integrierter Schaltungen
pour la simulation du comportement für die Simulation des Verhaltens
lors de perturbations électromagnétiques - bei elektromagnetischer Beeinflussung -
Modélisation des émissions conduites Modellierung leitungsgeführter
(ICEM-CE) Aussendungen (ICEM-CE)
(CEI 62433-2:2008) (IEC 62433-2:2008)
This European Standard was approved by CENELEC on 2009-12-01. CENELEC members are bound to comply
with the CEN/CENELEC Internal Regulations which stipulate the conditions for giving this European Standard
the status of a national standard without any alteration.
Up-to-date lists and bibliographical references concerning such national standards may be obtained on
application to the Central Secretariat or to any CENELEC member.
This European Standard exists in three official versions (English, French, German). A version in any other
language made by translation under the responsibility of a CENELEC member into its own language and notified
to the Central Secretariat has the same status as the official versions.
CENELEC members are the national electrotechnical committees of Austria, Belgium, Bulgaria, Croatia, Cyprus,
the Czech Republic, Denmark, Estonia, Finland, France, Germany, Greece, Hungary, Iceland, Ireland, Italy,
Latvia, Lithuania, Luxembourg, Malta, the Netherlands, Norway, Poland, Portugal, Romania, Slovakia, Slovenia,
Spain, Sweden, Switzerland and the United Kingdom.
CENELEC
European Committee for Electrotechnical Standardization
Comité Européen de Normalisation Electrotechnique
Europäisches Komitee für Elektrotechnische Normung
Central Secretariat: Avenue Marnix 17, B - 1000 Brussels
© 2010 CENELEC - All rights of exploitation in any form and by any means reserved worldwide for CENELEC members.
Ref. No. EN 62433-2:2010 E
Foreword
The text of document 47A/794/FDIS, future edition 1 of IEC 62433-2, prepared by SC 47A, Integrated
circuits, of IEC TC 47, Semiconductor devices, was submitted to the IEC-CENELEC parallel vote and was
approved by CENELEC as EN 62433-2 on 2009-12-01.
The following dates were fixed:
– latest date by which the EN has to be implemented
at national level by publication of an identical
national standard or by endorsement (dop) 2010-09-01
– latest date by which the national standards conflicting
with the EN have to be withdrawn (dow) 2012-12-01
Annex ZA has been added by CENELEC.
__________
Endorsement notice
The text of the International Standard IEC 62433-2:2008 was approved by CENELEC as a European
Standard without any modification.
__________
- 3 - EN 62433-2:2010
Annex ZA
(normative)
Normative references to international publications
with their corresponding European publications
The following referenced documents are indispensable for the application of this document. For dated
references, only the edition cited applies. For undated references, the latest edition of the referenced
document (including any amendments) applies.
NOTE When an international publication has been modified by common modifications, indicated by (mod), the relevant EN/HD
applies.
Publication Year Title EN/HD Year
IEC 61967 Series Integrated circuits - Measurement of EN 61967 Series
electromagnetic emissions,
150 kHz to 1 GHz
IEC 61967-4 - Integrated circuits - Measurement of EN 61967-4 -
electromagnetic emissions,
150 kHz to 1 GHz -
Part 4: Measurement of conducted
emissions - 1 ohm/150 ohm direct coupling
method
IEC 62433-2
Edition 1.0 2008-10
INTERNATIONAL
STANDARD
EMC IC modelling –
Part 2: Models of integrated circuits for EMI behavioural simulation – Conducted
emissions modelling (ICEM-CE)
INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
PRICE CODE
X
ICS 31.200 ISBN 2-8318-1002-7
– 2 – 62433-2 © IEC:2008(E)
CONTENTS
FOREWORD.5
1 Scope.7
2 Normative references .7
3 Terms and definitions .7
4 Philosophy .8
4.1 General .8
4.2 Conducted emission from core activity (digital culprit) .8
4.3 Conducted emission from I/O activity.9
5 Basic components .9
5.1 General .9
5.2 Internal Activity (IA).9
5.3 Passive Distribution Network (PDN) .10
6 IC macro-models .12
6.1 General .12
6.2 General IC macro-model .12
6.3 Block-based IC macro-model.13
6.3.1 Block component .13
6.3.2 Inter-Block Coupling component (IBC) .14
6.3.3 Block-based IC macro-model structure .15
6.4 Sub-model-based IC macro-model .17
6.4.1 Sub-model component.17
6.4.2 Sub-model-based IC macro-model structure .18
7 Requirements for parameter extraction.19
7.1 General .19
7.2 Environmental extraction constraints .19
7.3 IA parameter extraction .19
7.4 PDN parameter extraction .19
7.5 IBC parameter extraction.19
Annex A (informative) Model parameter generation.20
Annex B (informative) Decoupling capacitors optimization .38
Annex C (informative) Conducted emission prediction.40
Annex D (informative) Conducted emission prediction at PCB level .41
Bibliography.43
Figure 1 – Decomposition example of a digital IC for conducted emissions analysis .8
Figure 2 – IA component.9
Figure 3 − Example of IA characteristics in time domain .10
Figure 4 − Example of IA characteristics in frequency domain.10
Figure 5 − Example of a four-terminal PDN using lumped elements .11
Figure 6 − Example of a seven-terminal PDN using distributed elements .11
Figure 7 − Example of a twelve-terminal PDN using matrix representation .12
Figure 8 – General IC macro-model .13
Figure 9 – Example of block component.13
Figure 10 – Example of block components for I/Os .14
62433-2 © IEC:2008(E) – 3 –
Figure 11 – Example of IBC with two internal terminals.15
Figure 12 – Relationship between blocks and IBC.15
Figure 13 – Block-based IC macro-model.16
Figure 14 – Example of block-based IC macro-model.17
Figure 15 – Example of simple sub-model.18
Figure 16 – Sub-model-based IC macro-model .18
Figure A.1 – Typical characterization current gate schematic.22
Figure A.2 – Current peak during switching transition .22
Figure A.3 – Example of IA extraction procedure from design .23
Figure A.4 – Technology Influence.23
Figure A.5 – Final current waveform for a program period.24
Figure A.6 – Comparison between measurement and simulation.24
Figure A.7 – Lumped element model of a package.25
Figure A.8 – Circuit structure of the netlist .26
Figure A.9 – Principle of the IA computation .27
Figure A.10 – Process involved to model i (t) .27
A
Figure A.11 – i (t) measured using IEC 61967-4.28
Ext
Figure A.12 – i (t)and i (t) profiles .28
A Ext
Figure A.13 – Example of a hardware set-up used to extract the PDN parameters .30
Figure A.14 – Miniature 50 Ω coaxial connectors .30
Figure A.15 – Impedance probe using two miniature coaxial connectors .31
Figure A.16 – Open and short terminations .31
Figure A.17 – Measurement probe model.31
Figure A.18 – De-embedding principle .32
Figure A.19 – Example of a predefined PDN structure .33
Figure A.20 – RL configuration .34
Figure A.21 – RLC configuration .34
Figure A.22 – RLC with magnetic coupling configuration.35
Figure A.23 – Impedance seen from Vcc and Gnd .35
Figure A.24 – Complete PDN component .36
Figure A.25 – Set-up for correlation (left), measurement and prediction (right).37
Figure A.26 – Set-up used to measure the internal decoupling capacitor .37
Figure B.1 – Equivalent schematic of the complete electronic s
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