IEC PAS 62182:2000

Preconditioning of nonhermetic surface mount devices prior to reliability testing

Establishes an industry standard preconditioning flow for nonhermetic solid state surface mount devices that is representative of a typical industry multiple solder reflow operation.

General Information

• Status: Replaced
• Publication Date: 13-Sep-2000
• ICS: 31.080.01 - Semiconductor devices in general
• Technical Committee: TC 47 - Semiconductor devices
• Drafting Committee: WG 2 - TC 47/WG 2
• Current Stage: DELPUB - Deleted Publication
• Completion Date: 20-Jan-2005

Relations

• Replaced By: IEC 60749-30:2005 - Semiconductor devices - Mechanical and climatic test methods - Part 30: Preconditioning of non-hermetic surface mount devices prior to reliability testing
• Effective Date: 05-Sep-2023

Standards Content (Sample)

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Edition 1.0
2000-09
Preconditioning of nonhermetic surface
mount devices prior to reliability testing

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IN TER N A TION AL Reference number
E L E C T R OT E CHNI CA L
IEC/PAS 62182
C O MMI S S I O N
EIA/JEDEC
STANDARD
Preconditioning of Nonhermetic
Surface Mount Devices Prior to
Reliability Testing
(Revision of Test Method A113-A)

JEDEC Solid State Technology Association
ELECTRONIC INDUSTRIES ALLIANCE
MARCH 1999
JESD22-A113-B
Copyright © 1999, JEDEC; 2000, IEC

INTERNATIONAL ELECTROTECHNICAL COMMISSION

____________
PRECONDITIONING OF NONHERMETIC SURFACE MOUNT DEVICES

PRIOR TO RELIABILITY TESTING
FOREWORD
A PAS is a technical specification not fulfilling the requirements for a standard, but made available to the
public and established in an organization operating under given procedures.
IEC-PAS 62182 was submitted by JEDEC and has been processed by IEC technical committee 47: Semiconductor
devices.
The text of this PAS is based on the This PAS was approved for
following document: publication by the P-members of the
committee concerned as indicated in
the following document:
Draft PAS Report on voting
47/1455/PAS 47/1488/RVD
Following publication of this PAS, the technical committee or subcommittee concerned will investigate the
possibility of transforming the PAS into an International Standard.
An IEC-PAS licence of copyright and assignment of copyright has been signed by the IEC and JEDEC and is
recorded at the Central Office.
1) The IEC (International Electrotechnical Commission) is a worldwide organization for standardization comprising all
national electrotechnical committees (IEC National Committees). The object of the IEC is to promote international co-
operation on all questions concerning standardization in the electrical and electronic fields. To this end and in addition
to other activities, the IEC publishes International Standards. Their preparation is entrusted to technical committees;
any IEC National Committee interested in the subject dealt with may participate in this preparatory work. International,
governmental and non-governmental organizations liaising with the IEC also participate in this preparation. The IEC
collaborates closely with the International Organization for Standardization (ISO) in accordance with conditions
determined by agreement between the two organizations.
2) The formal decisions or agreements of the IEC on technical matters express, as nearly as possible, an international
consensus of opinion on the relevant subjects since each technical committee has representation from all interested
National Committees.
3) The documents produced have the form of recommendations for international use and are published in the form of
standards, technical specifications, technical reports or guides and they are accepted by the National Committees in

that sense.
4) In order to promote international unification, IEC National Committees undertake to apply IEC International Standards
transparently to the maximum extent possible in their national and regional standards. Any divergence between the
IEC Standard and the corresponding national or regional standard shall be clearly indicated in the latter.
5) The IEC provides no marking procedure to indicate its approval and cannot be rendered responsible for any
equipment declared to be in conformity with one of its standards.
6) Attention is drawn to the possibility that some of the elements of this PAS may be the subject of patent rights. The
IEC shall not be held responsible for identifying any or all such patent rights.
Page i
Copyright © 1999, JEDEC; 2000, IEC

NOTICE
EIA/JEDEC standards and publications contain material that has been prepared, reviewed, and

approved through the JEDEC Board of Directors level and subsequently reviewed and approved

EIA/JEDEC standards and publications are designed to serve the public interest through

eliminating misunderstandings between manufacturers and purchasers, facilitating

interchangeability and improvement of products, and assisting the purchaser in selecting and

obtaining with minimum delay the proper product for use by those other than JEDEC members,
EIA/JEDEC standards and publications are adopted without regard to whether or not their
adoption may involve patents or articles, materials, or processes. By such action JEDEC does not
assume any liability to any patent owner, nor does it assume any obligation whatever to parties
The information included in EIA/JEDEC standards and publications represents a sound approach
to product specification and application, principally from the solid state device manufacturer
viewpoint. Within the JEDEC organization there are procedures whereby an EIA/JEDEC
No claims to be in conformance with this standard may be made unless all requirements stated in
Inquiries, comments, and suggestions relative to the content of this EIA/JEDEC standard or
publication should be addressed to JEDEC Solid State Technology Association, 2500 Wilson
©
JEDEC Publication 21 "Manual of Organization and Procedure".
free to duplicate this document in accordance with the latest revision of
"Copyright" does not apply to JEDEC member companies as they are
Arlington, VA 22201-3834
2500 Wilson Boulevard
Engineering Department
ELECTRONIC INDUSTRIES ALLIANCE 1999
Published by
Boulevard, Arlington, VA 22201-3834, [phone]/7559 or www.jedec.org
the standard are met.
standard or publication may be further processed and ultimately become an ANSI/EIA standard.
adopting the EIA/JEDEC standards or publications.
whether the standard is to be used either domestically or internationally.
by the EIA General Counsel.
Copyright © 1999, JEDEC; 2000, IEC
TEST METHOD A113-B
PRIOR TO RELIABILITY TESTING
2 Apparatus
±
± °
(Revision of Test Method A113-A)
Test Method A113-B
accelerated soak conditions (See J-STD-020).
C/60% RH capability is optional for 3% RH. A chamber with 60 tolerance must be
2 °C and the RH RH. Within the chamber working area, temperature tolerance must be
Moisture chamber(s) capable of operating at 85 °C/85% RH, 85 °C/60% RH, and 30 °C/60%
2.1 Moisture chamber temperature
This test method requires as a minimum access to the following equipment.
components are evaluated.
during assembly be monitored to ensure that it does not exceed the temperature at which the
is recommended that the top of package temperature on the hottest moisture-sensitive SMD
measurement by both the semiconductor manufacturer and the board assembler. Therefore, it
JESD22- A113) and actual reflow conditions used are dependent upon identical temperature
NOTE — Correlation of moisture-induced stress sensitivity (per J-STD-020 and
(which might be impacted by solder reflow).
house reliability testing (qualification and reliability monitoring) to evaluate long term reliability
of this document by the semiconductor manufacturer prior to being submitted to specific in-
reflow operation. These SMDs should be subjected to the appropriate preconditioning sequence
state SMDs (surface mount devices) that is representative of a typical industry multiple solder
nonhermetic solid This Test Method establishes an industry standard preconditioning flow for
1 Purpose
Reliability Test Methods for Packaged Devices.)
(From JEDEC Board Ballot JCB-98-101, under the cognizance of the JC-14.1 Committee on
PRECONDITIONING OF NONHERMETIC SURFACE MOUNT DEVICES
Page
JESD22-A113-B
Copyright © 1999, JEDEC; 2000, IEC
2.2 Solder reflow equipment
°C - 219 °
± °
2.5 Bake oven
(Revision of Test Method A113-A)
Test Method A113-B
Shippability option is used. Temperature Cycling. This equipment is only required if Step 3.1.3
conditions and temperature tolerances are A through H of JEDEC Test Method A104,
(-40 +0/-10) °C to (60 °C +10/-0) °C per JEDEC Test Method A104. Acceptable alternative test
Temperature Cycle Chamber capable of operating as a minimum over the range of
2.6 Temperature Cycle Chamber
Bake oven capable of operating at 125 +5/-0 °C.
Electrical test equipment capable of performing room temperature dc and functional tests.
2.4 Electrical test equipment
Optical Microscope (40x for external visual exam)
2.3 Optical Microscope
standard.
VPR, IR/Convection, and Convection, the Convection results shall be considered as the
be more controllable and repeatable than IR. When there are correlation problems between
body temperature, rather than board or lead temperature. Convection and VPR are known to
NOTE — The moisture se
...