Status
Not Published
Public Enquiry End Date
29-Nov-2026
Current Stage
4020 - Public enquire (PE) (Adopted Project)
Start Date
28-Sep-2026
Due Date
15-Feb-2027

Buy Documents

Draft

oSIST prEN IEC 63758-3:2026 - BARVE

English language (48 pages)
Preview
Preview
e-Library read for
×1 day

oSIST prEN IEC 63758-3:2026 is the Slovenian draft adoption of IEC 63758-3:2026, Qi specification - Version 2.3 - Part 3: Power delivery (Fast Track). It sets out guidelines and requirements for Qi wireless power delivery, mainly for Power Receiver design, and also covers Power Transmitter control, efficiency, protection, and test methods. Engineers, quality teams, and test labs use it to design and verify wireless charging products and fixtures.

What does oSIST prEN IEC 63758-3:2026 specify?

oSIST prEN IEC 63758-3:2026 specifies the power-delivery part of the Qi Specification. Its scope covers Power Receiver design, including circuitry, power consumption, operating power levels, power transfer efficiency, and standby power, and the document also develops the related Power Transmitter behavior and verification methods.

The document is organized into general rules, an introduction and system model, Power Receiver construction, design guidelines, Power Transmitter construction, power consumption, meaningful functionality, susceptibility to unintentional magnetic fields, load-step behavior, over-voltage protection, external power input, power levels, system efficiency, stand-by power, object detection, and Power Receiver localization. Clause 1 sets the common notation and compliance rules that apply throughout the document, so readers know how to interpret packets, values, and requirement wording.

What are the key requirements of oSIST prEN IEC 63758-3:2026?

oSIST prEN IEC 63758-3:2026 puts most of its practical burden on the Power Receiver design, then defines how the Power Transmitter must control current and limit voltage. In practice, it tells product teams what the receiver must contain, how the transmitter must react, and how to check both sides during testing.

Power Receiver construction is defined in Clause 3

A Power Receiver design shall include a dual resonant circuit, a rectification circuit, sensing circuits, a communications modulator, and an output disconnect switch. For the Extended Power Profile, it shall also include a communications demodulator and shall be able to function meaningfully even when transmitter restrictions limit output to 5 W.

That matters because the receiver is not just a coil and rectifier - it must also sense its own voltage, communicate back to the transmitter, and disconnect its output when needed. Designers therefore need enough control electronics and switching behavior to support both charging and protocol handling.

The dual resonant circuit has defined tuning behavior

Clause 3.1 requires two resonant frequencies for the dual resonant circuit and sets the tolerance band according to the Power Receiver power level. The loop quality factor Q shall exceed 77, and any optional switch in the circuit has to stay closed until the receiver sends its first Packet.

This means coil and capacitor selection is not free-form. The receiver has to be tuned carefully, and the resonance has to remain stable enough to work under the intended operating conditions.

Rectification, sensing, modulation, and disconnect behavior are specific

Clause 3.2 requires full-wave rectification, Clause 3.3 requires sensing of the DC voltage directly at the rectifier output, and Clause 3.4 requires the ability to modulate Primary Cell current and voltage. Clause 3.5 adds frequency-shift keying (FSK) demodulation for the Extended Power Profile, and Clause 3.6 requires the output disconnect to keep the output isolated until the first power-transfer phase after a Digital Ping.

In practice, the receiver must both harvest power and communicate on the same wireless link. The output disconnect prevents unwanted back-feed and helps control startup behavior, which is important for safety and for protocol timing.

The transmitter uses closed-loop current control

Clause 5.2 defines a discrete proportional-integral-differential (PID) algorithm for Power Transmitter control. The transmitter shall use Control Error Packets to update Primary Cell current, apply the calculated change within a specified time window, and keep the iteration timing within the stated bounds.

This matters because wireless charging here is not open-loop. The transmitter has to react to receiver feedback and adjust its operating point quickly and in a controlled way, or the receiver will not hold the requested operating condition.

Over-voltage protection is a system requirement

Clause 10 requires the Power Transmitter to limit the amplitude of its Power Signal, or magnetic field strength, so that a properly designed Power Receiver does not generate more than 20 V rectified at its output. The clause also explains why a power-dependent current limit is preferable to a fixed hard limit.

For implementers, this means voltage protection is primarily a transmitter-side system behavior, not just a receiver-side clamp. Product teams have to consider coupling changes, alignment shifts, and load changes together when setting current limits.

Power levels and light-load behavior are defined for Extended Power Profile

Clause 12 says Extended Power Profile designs can support Potential Load Power up to 15 W. It also requires the transmitter to sustain light load operation at 5% of the Maximum Power in the Power Transfer Contract, with a minimum of 250 mW.

That is important for devices that spend time near full charge or in standby. The transmitter still has to keep the link alive at low load without dropping the negotiated contract.

Load steps, load dumps, and meaningful functionality are part of system behavior

Clauses 7 and 9 address what happens when the load changes suddenly. The receiver shall still function meaningfully if it cannot negotiate its intended Guaranteed Load Power, and the load-step and load-dump procedures show how transmitter response is checked under abrupt changes.

This is important in real products because batteries and power-management circuits can change load quickly. The standard therefore looks at how well the link keeps regulation through transients, not only at steady state.

What terms does oSIST prEN IEC 63758-3:2026 define?

  • Power Signal - the alternating magnetic field used for wireless power transfer.
  • Power Transmitter - a subsystem that generates a Power Signal.
  • Power Receiver - a subsystem that extracts electric power from a Power Signal.
  • PowerTransmitterProduct - a device that contains one or more Power Transmitters.
  • PowerReceiverProduct - a device that contains a Power Receiver.
  • Control Error Packet - a packet that carries the feedback used by the transmitter to adjust its Primary Cell current.
  • LoadPower - the power dissipated in the load connected to the Power Receiver output.
  • TransmittedPower - power from the Power Signal that is dissipated by objects not integral to the Power Transmitter Product.

Who uses oSIST prEN IEC 63758-3:2026?

oSIST prEN IEC 63758-3:2026 is used by wireless power designers, hardware engineers, firmware developers, and test engineers working on Qi equipment. It is also relevant to quality managers and buyers who need to confirm that a Power Receiver or Power Transmitter matches the Qi power-delivery behavior.

The document is especially relevant to products such as flat-surface wireless chargers and mobile devices, where alignment, load control, efficiency, and over-voltage behavior matter in day-to-day use. Test labs use it for design verification and conformance-related measurements, while product teams use it to choose circuit architecture, control strategy, and protection margins.

Which standards are used with oSIST prEN IEC 63758-3:2026?

  • Qi Specification, Communications Protocol - defines packet exchange, Digital Ping, Control Error Packets, and the power-transfer phases referenced throughout this part.
  • Qi Specification, Communications Physical Layer - defines the physical-layer signaling used for modulation and FSK demodulation.
  • Qi Specification, Mechanical, Thermal, and User Interface - provides mechanical context such as coil assembly diagrams and interface-related guidance.
  • Qi Specification, PowerReceiver DesignExamples - gives example shielding material parameters referenced for receiver design.
  • Qi Specification, PowerTransmitterReferenceDesigns - gives reference transmitter designs and the design values used for control behavior.
  • ISO/IEC Directives, Part 2 - governs the wording of requirements, recommendations, permissions, and capabilities.

What does the oSIST prEN IEC 63758-3:2026 document contain?

The document contains requirement text, informative guidance, figures, formulas, and test procedures that are used for design and verification. Clause 1 explains structure, compliance wording, numeric notation, data-packet fields, text-string storage, and shorthand packet notation, while Clause 2 introduces the wireless power system model and the core terms.

Later clauses include functional block diagrams for Baseline and Extended Power Profile receivers, a large-signal resonance check, coil-design relations, and the discrete PID control method for transmitters. The document also includes load-step and load-dump procedures with timing diagrams and limit tables, recommended system-efficiency tables, stand-by power measurement methods, analogue ping examples, and localization examples with detection-coil layouts. Those materials support engineering design, laboratory testing, and internal audits of Qi wireless power products.

Buy Documents

Draft

oSIST prEN IEC 63758-3:2026 - BARVE

English language (48 pages)
Preview
Preview
e-Library read for
×1 day

Get Certified

Connect with accredited certification bodies for this standard

BSI Group

BSI (British Standards Institution) is the business standards company that helps organizations make excellence a habit.

UKAS United Kingdom Verified

IMQ S.p.A. (Certification)

Italian electrical product certification.

ACCREDIA Italy Verified

SLG Prüf- und Zertifizierungs GmbH

German testing and certification body.

DAKKS Germany Verified

Sponsored listings

Frequently Asked Questions

oSIST prEN IEC 63758-3:2026 is a draft published by the Slovenian Institute for Standardization (SIST). Its full title is "Qi specification - Version 2.3 - Part 3: Power delivery (Fast Track)". This standard covers: Qi specification - Version 2.3 - Part 3: Power delivery (Fast Track)

Qi specification - Version 2.3 - Part 3: Power delivery (Fast Track)

oSIST prEN IEC 63758-3:2026 is classified under the following ICS (International Classification for Standards) categories: 29.240.99 - Other equipment related to power transmission and distribution networks; 33.160.99 - Other audio, video and audiovisual equipment; 35.200 - Interface and interconnection equipment. The ICS classification helps identify the subject area and facilitates finding related standards.

oSIST prEN IEC 63758-3:2026 is associated with the following European legislation: EU Directives/Regulations: 2014/53/EU; Standardization Mandates: M/607. When a standard is cited in the Official Journal of the European Union, products manufactured in conformity with it benefit from a presumption of conformity with the essential requirements of the corresponding EU directive or regulation.

oSIST prEN IEC 63758-3:2026 is available in PDF format for immediate download after purchase. The document can be added to your cart and obtained through the secure checkout process. Digital delivery ensures instant access to the complete standard document.

Standards Content (Sample)


SLOVENSKI STANDARD
01-november-2026
Specifikacija Qi - Različica 2.3 - 3. del: Dovajanje moči (hitri postopek)
Qi specification - Version 2.3 - Part 3: Power delivery (Fast Track)
Ta slovenski standard je istoveten z: prEN IEC 63758-3:2026
ICS:
29.240.99 Druga oprema v zvezi z Other equipment related to
omrežji za prenos in power transmission and
distribucijo električne energije distribution networks
33.160.99 Druga avdio, video in Other audio, video and
avdiovizuelna oprema audiovisual equipment
35.200 Vmesniška in povezovalna Interface and interconnection
oprema equipment
2003-01.Slovenski inštitut za standardizacijo. Razmnoževanje celote ali delov tega standarda ni dovoljeno.

100/4541/CDV
COMMITTEE DRAFT FOR VOTE (CDV)
PROJECT NUMBER:
IEC 63758-3 ED1
DATE OF CIRCULATION: CLOSING DATE FOR VOTING:
2026-09-18 2026-12-11
SUPERSEDES DOCUMENTS:
IEC TC 100 : AUDIO, VIDEO AND MULTIMEDIA SYSTEMS AND EQUIPMENT
SECRETARIAT: SECRETARY:
Japan Ms Mahiru Uehara
OF INTEREST TO THE FOLLOWING COMMITTEES: HORIZONTAL FUNCTION(S):
TC 106,TC 108
ASPECTS CONCERNED:
SUBMITTED FOR CENELEC PARALLEL VOTING NOT SUBMITTED FOR CENELEC PARALLEL VOTING
Attention IEC-CENELEC parallel voting
The attention of IEC National Committees, members of
CENELEC, is drawn to the fact that this Committee Draft for
Vote (CDV) is submitted for parallel voting.
The CENELEC members are invited to vote through the
CENELEC online voting system.
This document is still under study and subject to change. It should not be used for reference purposes.
Recipients of this document are invited to submit, with their comments, notification of any relevant patent rights of which they
are aware and to provide supporting documentation.
Recipients of this document are invited to submit, with their comments, notification of any relevant “In Some Countries”
clauses to be included should this proposal proceed. Recipients are reminded that the CDV stage is the final stage for
submitting ISC clauses. (SEE AC/22/2007 OR NEW GUIDANCE DOC).

TITLE:
Qi Specification - Version 2.3 - Part 3: Power delivery (Fast Track)

PROPOSED STABILITY DATE: 2029
NOTE FROM TC/SC OFFICERS:
As this is a fast-track process offered by WPC, the Word file is not provided.

electronic file, to make a copy and to print out the content for the sole purpose of preparing National Committee positions.
You may not copy or "mirror" the file or printed version of the document, or any part of it, for any other purpose without
permission in writing from IEC.

QiSpecification
PowerDelivery
Version2.3
PublishDate:08December2025
DISCLAIMER
The information contained herein is believed to be accurate as of the date of publication, but is provided “as is” and may
contain errors. The Wireless Power Consortium makes no warranty, express or implied, with respect to this document
and its contents, including any warranty of title, ownership, merchantability, or fitness for a particular use or purpose.
Neither the Wireless Power Consortium, nor any member of the Wireless Power Consortium will be liable for errors in
this document or for any damages, including indirect or consequential, from use of or reliance on the accuracy of this
document. For any further explanation of the contents of this document, or in case of any perceived inconsistency or
ambiguity of interpretation, contact: info@wirelesspowerconsortium.com.

Contents
1. General 5
1.1 StructureoftheQi Specification 5
1.2 Scope 6
1.3 Compliance 6
1.4 References 6
1.5 Conventions 7
1.5.1 Notationofnumbers 7
1.5.2 Tolerances 7
1.5.3 Fieldsinadatapacket 7
1.5.4 Notationoftextstrings 8
1.5.5 Short-handnotationfordatapackets 8
2. Introduction 9
3. PowerReceiverconstruction 10
3.1 Dualresonantcircuit 12
3.2 Rectificationcircuit 13
3.3 Sensingcircuits 13
3.4 Communicationsmodulator 13
3.5 Communicationsdemodulator 13
3.6 Outputdisconnect 13
3.7 Shielding 14
4. PowerReceiverdesignguidelines(informative) 15
4.1 Large-signalresonancecheck 15
4.2 PowerReceivercoildesign 15
5. PowerTransmitterconstruction 16
5.1 PowerTransmitterreferencedesigns 16
5.2 Powertransfercontrol 16
6. Powerconsumption 19
7. Meaningfulfunctionality 20
8. UnintentionalMagneticFieldSusceptibility(Informative) 21
8.1 Limits 21
8.2 Protection 21
8.3 PowerTransmitterdetection 21
9. LoadSteps 22
9.1 Loadsteptestprocedure 22
9.1.1 BaselinePowerProfileloadsteptest 22
9.1.2 ExtendedPowerProfileloadsteptest 23

9.2 Loaddumptestprocedure 24
9.2.1 BaselinePowerProfileloaddumptest 24
9.2.2 ExtendedPowerProfileloaddumptest 24
10. Over-voltageprotection 26
11. ExternalPowerInput(Informative) 32
11.1 Availablepower—ExtendedPowerProfileonly 32
12. PowerLevels(ExtendedPowerProfileonly) 33
12.1 PotentialLoadPower 33
12.2 Lightload 33
13. SystemEfficiency(Informative) 34
13.1 Definition 34
13.2 PowerTransmitterefficiency 35
13.2.1 BaselinePowerProfile 35
13.2.2 ExtendedPowerProfile 36
13.3 PowerReceiverefficiency 37
14. Stand-byPower(Informative) 38
14.1 TransmitterMeasurementMethod 38
15. ObjectDetection(Informative) 39
15.1 Resonanceshift 39
15.2 Capacitancechange 40
16. PowerReceiverLocalization(Informative) 41
16.1 PrimaryCoilarraybasedFreePositioning 41
16.1.1 AsinglePowerReceivercoveringmultiplePrimaryCells 41
16.1.2 TwoPowerReceiverscoveringtwoadjacentPrimaryCells 41
16.2 TwoPowerReceiverscoveringasinglePrimaryCell 43
16.3 MovingPrimaryCoilbasedFreePositioning 44
16.4 User-assistedpositioning 46
16.4.1 Example1 46
16.4.2 Example2 47
1. General
The Wireless Power Consortium (WPC) is a worldwide organization that aims to develop and promote global standards
for wireless power transfer in various application areas. An important application area comprises flat-surface devices
such as mobile phones and chargers operating at power levels up to 25 W.
1.1 StructureoftheQi Specification
Generaldocuments
l
Introduction
l
Glossary, Acronyms, and Symbols
l
Technical System Overview
l
Power Profiles
Systemdescriptiondocuments
l
Mechanical, Thermal, and User Interface
l
Power Delivery
l
Communications Physical Layer
l
Communications Protocol
l
Foreign Object Detection
l
NFC Tag Protection
l
Authentication Protocol
l
MPP Communications Protocol
l
MPP Magnetics Design
l
MPP Power Delivery
l
MPP Communications Physical Layer
l
MPP Foreign Object Detection
l
MPP Design Guidelines (Informative)
l
Magnetic Covers
l
Active Alignment System
l
Thermal Management Protocol
1.2 Scope
TheQiSpecification,PowerDelivery (this document) comprises guidelines and requirements for Power Receiver design,
including circuitry, power consumption, operating power levels, power transfer efficiency, and standby power.
1.3 Compliance
All provisions in theQiSpecification are mandatory, unless specifically indicated as recommended, optional, note,
example, or informative. Verbal expression of provisions in this Specification follow the rules provided in ISO/IEC
Directives, Part 2.
Table1-Verbalformsforexpressionsofprovisions
Provision Verbalform
requirement “shall” or “shall not”
recommendation “should” or “should not”
permission “may” or “may not”
capability “can” or “cannot”
1.4 References
For undated references, the most recently published document applies. The most recent WPC publications can be
downloaded from http://www.wirelesspowerconsortium.com.

1.5 Conventions
1.5.1 Notationofnumbers
l
Real numbers use the digits 0 to 9, a decimal point, and optionally an exponential part.
l
Integer numbers in decimal notation use the digits 0 to 9.
l
Integer numbers in hexadecimal notation use the hexadecimal digits 0 to 9 and A to F, and are prefixed by "0x"
unless explicitly indicated otherwise.
l
Single bit values use the words ZERO and ONE.
1.5.2 Tolerances
Unless indicated otherwise, all numeric values in theQiSpecification are exactly as specified and do not have any
implied tolerance.
1.5.3 Fieldsinadatapacket
A numeric value stored in a field of a data packet uses a big-endian format. Bits that are more significant are stored at a
lower byte offset than bits that are less significant. Table 2 and Figure 1 provide examples of the interpretation of such
fields.
Table2-Exampleoffieldsinadatapacket(table)
b b b b b b b b
7 6 5 4 3 2 1 0
B (msb)
B 16-bitNumericDataField (lsb)
B OtherField
(msb)
B 16-bitNumericDataField (lsb)
Field
Figure1-Examplesoffieldsinadatapacket

1.5.4 Notationoftextstrings
Text strings consist of a sequence of printable ASCII characters (i.e. in the range of 0x20 to 0x7E) enclosed in double
quotes ("). Text strings are stored in fields of data structures with the first character of the string at the lowest byte
offset, and are padded with ASCII NUL (0x00) characters to the end of the field where necessary.
EXAMPLE: The text string “WPC” is stored in a six-byte fields as the sequence of characters 'W', 'P', 'C', NUL, NUL, and
NUL. The text string “M:4D3A” is stored in a six-byte field as the sequence 'M', ':', '4', 'D', '3', and 'A'.
1.5.5 Short-handnotationfordatapackets
In many instances, theQiSpecification refers to a data packet using the following shorthand notation:
/
In this notation, refers to the data packet's mnemonic defined in theQiSpecification,Communications
Protocol, and refers to a particular value in a field of the data packet. The definitions of the data packets in
theQiSpecification,CommunicationsProtocol, list the meanings of the modifiers.
For example, EPT/cc refers to an End Power Transfer data packet having its End Power Transfer code field set to 0x01.

2. Introduction
Figure 2 provides a simplified model of a wireless power system, consisting of six blocks. The three blocks to the left of
the power transfer interface represent a Power Transmitter and its supply. The three to the right represent a Power
Receiver and its Load. Typically, these blocks comprise the following elements.
l
Supply: in many cases a separate adapter such as a USB PD brick.
l
Inverter: a half-bridge or full-bridge for DC/AC conversion.
l
ResonantTank: a coil and series capacitor boosting the power transfer capability.
l
Rectifier: either a diode bridge or an active (synchronous) bridge for AC/DC conversion.
l
Load: a power sink drawn by the Power Receiver Product, typically a mobile phone's power input to an internal
battery charger.
Figure2-Simplifiedmodelofawirelesspowertransfersystem
With reference to Figure 2, the following definitions are central to the understanding of a wireless power system.
l
PowerSignal—An alternating magnetic field.
l
SupplyPower—The power dissipated from the supply.
l
PowerTransmitter—A subsystem that can generate a Power Signal.
l
PowerTransmitterProduct—A device containing one or more Power Transmitters.
l
TransmittedPower—The power from the Power Signal dissipated by any object that is not an integral part of
the Power Transmitter Product.
l
PowerReceiver—A subsystem that can extract electric power from a Power Signal.
l
PowerReceiverProduct—A device containing a Power Receiver.
l
ReceivedPower—The power from the Power Signal dissipated by any component that is an integral part of the
Power Receiver Product.
l
TestPowerTransmitter—A Power Transmitter Product designed to analyse and check the operation of a
Power Receiver Product’s wireless power functionality.
l
TestPowerReceiver—A Power Receiver Product designed to analyse and check the operation of a Power
Transmitter Product’s wireless power functionality.
l
LoadPower—The power dissipated in the Load.

3. PowerReceiverconstruction
Figure 3 illustrates an example of a functional block diagram for a Baseline Power Profile Power Receiver.
Power Pick-up Unit
Rectification
Secondary Coil
circuit
Voltage sense
Communications
Communications
modulator
& Control Unit
Output
disconnect
Load
Sensing & control
Figure3-FunctionalblockdiagramforaBaselinePowerProfilePowerReceiver
In this example, the Power Receiver consists of a Power Pick-up Unit and a Communications and Control Unit. The
Power Pick-up Unit on the left-hand side of Figure 3 comprises the analogue components of the Power Receiver:
l
A dual resonant circuit consisting of a Secondary Coil plus series and parallel capacitances to enhance the power
transfer efficiency and enable a resonant detection method (seeSection3.1,Dualresonantcircuit ).
l
A rectification circuit that provides full-wave rectification of the AC waveform using, for example, four diodes in a
full-bridge configuration or a suitable configuration of active components (seeSection3.2,Rectificationcircuit ).
The rectification circuit may perform output smoothing as well. In this example, the rectification circuit provides
power to both the Communications and Control Unit of the Power Receiver and the output of the Power Receiver.
A communications modulator (seeSection3.4,Communicationsmodulator ). On the DC side of the Power Receiver, the
communications modulator typically consists of a resistor in series with a switch. On the AC side of the Power Receiver,
the communications modulator typically consists of a capacitor in series with a switch (not shown in Figure 3).
An output disconnect switch, which prevents current from flowing to the output when the Power Receiver does not
provide power at its output. In addition, the output disconnect switch prevents current back flow into the Power
Receiver when the Power Receiver does not provide power at its output. Moreover, the output disconnect switch

minimizes the power that the Power Receiver draws from the Power Transmitter when a Power Signal is first applied to
the Secondary Coil.
A rectified voltage sense.
The Communications and Control Unit on the right-hand side of Figure 3 comprises the digital logic part of the Power
Receiver. This unit executes the relevant power control algorithms and protocols, drives the communications modulator,
controls the output disconnect switch, and monitors several sensing circuits in both the Power Pick-up Unit and the
load. (A good example of a sensing circuit in the load is a circuit that measures the temperature of a rechargeable
battery.)
NOTE: This version of the Specification minimizes the set of Power Receiver design requirements defined in this section. Accordingly,
compliant Power Receiver designs that differ from the sample functional block diagram shown in Figure 3 are possible. For
example, an alternative design includes post-regulation of the output of the rectification circuit (e.g., by using a buck
converter, battery charging circuit, power management unit, etc.). In yet another design, the Communications and Control Unit
interfaces with other subsystems of the Power Receiver Product, e.g. for user interface purposes.
Figure 4 illustrates an example of a functional block diagram for an Extended Power Profile Power Receiver. The
communications demodulator enables the communication of data from the Power Transmitter to an Extended Power
Profile Power Receiver. The presence of a communications demodulator is the only difference with the functional block
diagram of a Baseline Power Profile Power Receiver.
Functional block diagram for an Extended Power Profile Power Receiver
Power Pick-up Unit
Rectification
Secondary Coil
circuit
Voltage sense
Communications modulator
Communications
& Control Unit
Communications demodulator
Output
disconnect
Load
Sensing & control
Figure4-FunctionalblockdiagramforanExtendedPowerProfilePowerReceiver
Power Pick-up Unit components are described in the subsections below.

A Power Receiver design shall include a dual resonant circuit as defined inSection3.1,Dualresonantcircuit , a
rectification circuit as defined inSection3.2,Rectificationcircuit , sensing circuits as defined inSection3.3,Sensing
circuits , a communications modulator as defined inSection3.4,Communicationsmodulator , and an output disconnect
switch as defined inSection3.6,Outputdisconnect .
A Power Receiver design for the Extended Power Profile shall also include a communications demodulator as defined in
Section3.5,Communicationsdemodulator , and shall be able to function meaningfully if the Power Transmitter
restrictions limit the output of power from the Power Receiver to 5 W; seeSection3.7,Shielding .
3.1 Dualresonantcircuit
The dual resonant circuit of the Power Receiver comprises the Secondary Coil and two resonant capacitances. The
purpose of the first resonant capacitance is to enhance the power transfer efficiency. The purpose of the second
resonant capacitance is to enable a resonant detection of the receiver position on some Power Transmitter designs.
Figure 5 illustrates the dual resonant circuit. The switch in the dual resonant circuit is optional. If the switch is not
present, the capacitance shall have a fixed connection to the Secondary Coil . If the switch is present, it shall
(i)
remain closed until the Power Receiver transmits its first Packet (see theQiSpecification,CommunicationsProtocol).
Figure5-DualresonantcircuitofaPowerReceiver
The dual resonant circuit shall have the following resonant frequencies:
In these equations, is the self-inductance of the Secondary Coil when placed on the Interface Surface of a Power
Transmitter and—if necessary—aligned to the Primary Cell; and is the self-inductance of the Secondary Coil without
magnetically active material that is not part of the Power Receiver design close to the Secondary Coil (e.g. away from the
Interface Surface of a Power Transmitter). Moreover, the tolerancesx andy on the resonant frequency arex =y= 5%
for Power Receivers that specify a Maximum Power value in the Configuration Packet of 3 W and above, andx = 5% and
y= 10% for all other Power Receivers.
NOTE: When determining the capacitance value , make sure to account for any parasitic capacitances between the terminals of the
dual resonant circuit that may affect the resonance frequency value .
The quality factor Q of the loop consisting of the Secondary Coil, switch (if present), resonant capacitance and
resonant capacitance , shall exceed the value 77. Here the quality factor Q is defined as:
(i)
The switch shall remain closed even if no power is available from the Secondary Coil.

where is the DC resistance of the loop with the capacitances and short-circuited.
Figure 6 shows the environment that is used to determine the self-inductance of the Secondary Coil. The primary
Shielding shown in Figure 6 consists of material PC44 from TDK Corp. The primary Shielding has a square shape with a
side of 50 mm and a thickness of 1 mm. The centre of the Secondary Coil and the centre of the primary Shielding shall
be aligned. The distance from the Receiver Interface Surface to the primary Shielding is
= 3.4 mm. Shielding on top of the Secondary Coil is present only if the Receiver design includes such Shielding. Other
Power Receiver Product components that influence the inductance of the Secondary Coil shall be present as well when
determining the resonant frequencies. The excitation signal that is used to determine and shall have an amplitude
of 1 V RMS and a frequency of 100 kHz.
Figure6-Characterizationofresonantfrequencies
3.2 Rectificationcircuit
The rectification circuit shall use full-wave rectification to convert the AC waveform to a DC power level.
3.3 Sensingcircuits
The Power Receiver shall monitor the DC voltage directly at the output of the rectification circuit.
3.4 Communicationsmodulator
The Power Receiver shall have the means to modulate the Primary Cell current and Primary Cell voltage as defined inQi
(i)
Specification,CommunicationsPhysicalLayer. This version of the Specification leaves the specific loading method as a
design choice to the Power Receiver. Typical methods include modulation of a resistive load on the DC side of the Power
Receiver and modulation of a capacitive load on the AC side of the Power Receiver.
3.5 Communicationsdemodulator
For the Extended Power Profile, the Power Receiver shall have the means to demodulate frequency-shift keying (FSK)
data from the Power Signal frequency as defined inQiSpecification,CommunicationsPhysicalLayer. This Specification
leaves the specific method up to the designer of the Power Receiver.
3.6 Outputdisconnect
The Power Receiver shall have the means to disconnect its output from the subsystems connected thereto. If the Power
Receiver has disconnected its output, it shall ensure that it still draws a sufficient amount of power from the Power
(i)
Note that the dual resonant circuit as depicted inSection3.1,Dualresonantcircuit does not prohibit implementation
of the communications modulator directly at the Secondary Coil.

Transmitter, such that Power Receiver to Power Transmitter communications remain possible (seeQiSpecification,
CommunicationsPhysicalLayer).
The Power Receiver shall keep its output disconnected until it reaches thepowertransfer phase for the first time after a
Digital Ping (see theQiSpecification,CommunicationsProtocol). Subsequently, the Power Receiver may operate the
output disconnect switch any time while the Power Transmitter applies a Power Signal.
NOTE: The Power Receiver may experience a voltage peak when operating the output disconnect switch (and changing between
maximum and near-zero power dissipation).
3.7 Shielding
An important consideration for a Power Receiver designer is the impact of the Power Transmitter’s magnetic field on
the Power Receiver Product. Stray magnetic fields could interact with the Power Receiver Product and potentially cause
its intended functionality to deteriorate or cause its temperature to increase due to the power dissipation of generated
eddy currents.
It is recommended to limit the impact of magnetic fields by means of Shielding on the top face of the Secondary Coil (see
theQiSpecification,Mechanical,Thermal,andUserInterface for a diagram of the secondary coil assembly). This Shielding
should consist of material that has parameters similar to the materials listed in theQiSpecification,PowerReceiver
DesignExamples. The Shielding should cover the Secondary Coil completely. Additional Shielding beyond the outer
diameter of the Secondary Coil might be necessary depending upon the impact of stray magnetic fields.

4. PowerReceiverdesignguidelines(informative)
4.1 Large-signalresonancecheck
In the course of designing a Power Receiver, it should be verified that the resonance frequency of the dual resonant
circuit remains within the tolerance range defined inSection3.1,Dualresonantcircuit , under large-signal conditions.
The test defined in this section serves this purpose.
Step 1. Connect an RF power source to the assembly of Secondary Coil, Shielding and other components that influence
the inductance of the Secondary Coil and series resonant capacitance ; see Figure 7. The presence of the parallel
capacitance is optional.
L
s
Vin
I
in
V
out
C
s
C
d
Figure7-Largesignalsecondaryresonancetest
Step 2. Position the assembly and an appropriate spacer on primary Shielding material, as shown inSection3.1,Dual
resonantcircuit .
Step 3. Measure the input voltage as a function of the frequency of the RF power source in the range of 90…110 kHz,
while maintaining the input current at a constant level, preferably at about twice the maximum value intended in the
final product.
Step 4. Verify that the frequency at which the measured is at a minimum, occurs within the specified tolerance range
of the resonance frequency .
4.2 PowerReceivercoildesign
The mutual inductanceM of a Secondary Coil, in combination with optional Shielding and other Power Receiver Product
components, and the Primary Coil of a Power Transmitter design A10 should satisfy the following relations:
, if the Primary Coil and Secondary Coil centers are aligned; and
l
, if the Primary Coil and Secondary Coil centers have a lateral offset of 5 √ 2 mm.
l
Here is the maximum output voltage expected from the Secondary Coil—or any other voltage that the Power
Receiver designer considers relevant—and , with = 100 kHz, the frequency at which the mutual inductance
(in units of 1 henry) is measured.

5. Power Transmitter construction
5.1 Power Transmitter reference designs
The Qi Specification includes a set of Power Transmitter reference designs that were developed, tested, and certified by
member companies of the Wireless Power Consortium.
5.2 Power transfer control
This version of the Specification, defines a specific method, which the Power Transmitter shall use to control its Primary
Cell current towards the new Primary Cell current (see Qi Specification, Communications Protocol for a description of the
power transfer phases). This method is based on a discrete proportional-integral-differential (PID) algorithm as
illustrated in Figure 8.
(  )
( )
(   )− (  )
∙
∙
( )
(  )
(  )
(  ) (  )
(    )−
(    )−
−
Σ Σ
(  )
(  )
∙ ∙
∙
(  )
(    )− −
(    )
(  )
(  ) −
(    )
−
∙
(    )−
(    )−
−
(   )
Figure8-PIDcontrolalgorithm
To execute this algorithm, the Power Transmitter shall execute the steps listed below, in the order of appearance. In the
definitions of these steps, the index = 1, 2, 3, … labels the sequence of Control Error Packets, which the Power
Transmitter receives.
Upon receipt of the Control Error Packet, the Power Transmitter shall calculate the new Primary Cell current
l
as
where represents the actual Primary Cell current—reached in response to the previous Control Error
Packet—and represents the Control Error Value contained in the Control Error
Packet. Note that represents the Primary Cell current at the start of thepowertransfer phase.
l If the Control Error Value is non-zero, the Power Transmitter shall adjust its Primary Cell current during a
time window . For this purpose, the Power Transmitter shall execute a loop comprising of the steps listed
below. The index = 1, 2, 3, … labels the iterations of this loop.

l
The Power Transmitter shall calculate the difference between the new Primary Cell and the actual Primary
Cell current as the error
where represents the Primary Cell current determined in iteration − 1 of the loop.
Note that represents the actual Primary Cell current at the start of the loop.
l
The Transmitter shall calculate the proportional, integral, and derivative terms (in any order):
where is the proportional gain, is the integral gain, is the derivative gain, and is the time
required to execute a single iteration of the loop. In addition, the integral term = 0, and the error
= 0. The Power Transmitter shall limit the integral term such that it remains within the range −
… + —if necessary, the Power Transmitter shall replace the calculated integral term with the
appropriate boundary value.
l
The Power Transmitter shall calculate the sum of the proportional, integral, and derivative terms:
.
In this calculation, the Power Transmitter shall limit the sum such that it remains within the
range − … + .
l
The Power Transmitter shall calculate the new value of the controlled variable
,
where is a scaling factor that depends on the controlled variable. In addition, the controlled variable
, with representing the actual value of the controlled variable at the start of the
powertransfer phase, is either the Operating Frequency, the duty cycle of the inverter, or the voltage input
to the inverter. If the calculated exceeds the specified range, the Power Transmitter shall replace the
calculated with the appropriate limiting value.
l The Power Transmitter shall apply the new value of the controlled variable to its Power Conversion
Unit.
l
The Power Transmitter shall determine the actual Primary Cell current .
The maximum number of iterations of the loop , and the time required to execute a single iteration of the loop
shall satisfy the following relation:
, with 1 ms ≤ ≤ 5 ms
l The Power Transmitter shall determine the Primary Cell current exactly at after the end
of the Control Error Packet.
See the definition of the individual Power Transmitter designs inQiSpecificationPowerTransmitterReferenceDesigns or
in the applicable Power Transmitter design document for the values of , , , , and .

6. Powerconsumption
In consideration of compliance testing ), a Power Receiver shall not drive the Transmitted Power of Test Power
Transmitter #2 above 7500 mW with the Power Receiver being positioned on TPT#2 such that power transfer can be
sustained without interruption.

7. Meaningfulfunctionality
(Extended Power Profile) If the Power Receiver is not able to negotiate its intended Guaranteed Load Power level with
the Power Transmitter, it shall negotiate a lower Guaranteed Load Power level, and function meaningfully at that power
level. Meaningful functionality includes charging a connected battery at a rate lower than intended.
NOTE: The following examples list cases in which the Power Receiver may not be able to negotiate its target operating power.
l
The Power Receiver is positioned on a BPP Power Transmitter.
l
The Potential Power provided in the Power Transmitter Capability Packet is lower than the Power Receiver’s
target operating power.
l
The Power Transmitter is powered by an external power supply that is designed to provide no more than 5 W of
power.
8. UnintentionalMagneticFieldSusceptibility(Informative)
8.1 Limits
It should also be noted that a Power Receiver can be exposed to higher than expected fields during otherwise normal
operation. For example, if the Power Receiver is suddenly moved such that its coupling with the Power Transmitter
changes significantly, the communications channel can become unusable and the voltage generated across the Secondary
Coil can increase unexpectedly.
8.2 Protection
In the case that the output disconnect switch is open, it is recommended that a Power Receiver can withstand a voltage
generated across its Secondary Coil of at least . Here, is the larger of
l
1.6 times the maximum target rectified voltage as defined in Table 3, or
l
the voltage that results if coupled with a type MP-A1 Power Transmitter that is operating at its minimum
Operating Frequency and maximum phase difference between the legs of its full-bridge inverter.
Table3-Examplesoftherecommended
Recommended
MaximumTarget
RectifiedVoltage[V]
[V]
12 20
20 32
30 48
8.3 PowerTransmitterdetection
To detect whether the Power Signal originates from a Power Transmitter, as described in theQiSpecification,
CommunicationsPhysicalLayer, the Power Receiver should also take into account the Power Transmitter designs in the
applicable Power Transmitter design document.

9. LoadSteps
A Power Receiver Product may perform load steps and dumps that are beyond the control of its Power Receiver. A load
step or dump causes an immediate impedance change, which is reflected from the Secondary Coil to the Primary Coil
and results in a change of the rectified voltage. Due to the latency of the control loop (which is mainly due to the time
that is required to communicate Control Error Packets), it takes a while before the rectified voltage is readjusted to a
(new) desired value. The Power Transmitter should ensure that the established Power Transfer Contract is not
terminated during such an event. Therefore, an implementation of a Power Transmitter should meet load steps from
10% to 100% of the Maximum Power (as communicated by the Power Receiver in the Configuration Packet) and load
dumps from 100% to 10%.
9.1 Loadsteptestprocedure
9.1.1 BaselinePowerProfileloadsteptest
The following procedure is recommended to verify that the Power Transmitter is able to handle load steps and dumps:
1. Position Test Power Receiver #1 in configuration B on the Interface Surface of the Power Transmitter Product
with an initial load of 32 Ω, a Power Control Hold-off Time of  = 100 ms, and an interval time between
consecutive Control Error Packets of  = 250 ms.
2. Establish communication and regulate the rectified voltage to  = (7 ± 2%) V.
3. Change the load from its initial value to 127 Ω and regulate the rectified voltage to  = (7 ± 2%) V.
4. Change the load from 127 Ω to 10 Ω, = 50 ms before a sending a Control Error Packet.
5. Verify that the Test Power Receiver continues to regulate and that the Power Transmitter Product responds to
the Control Error Packets by adjusting .
6. Measure the rectified voltage ( , , and ) with timings as shown in Figure 9, where
= 1800 ms.
7. Verify that the measured values comply with the limits provided in Table 4.
t
Δt
Δt1
Δt
Δt
V
V Control Error
V Control Error
min
Figure9-Loadsteptestdiagram
Table4-Loadsteplimits
Voltage Minimum Target Maximum Unit
6.9 7 7.1 V
4 7 7.1 V
6 7.1 V
9.1.2 ExtendedPowerProfileloadsteptest
1. Position the Test Power Receiver on the Interface Surface of the Power Transmitter Product, with an initial load
of , a Power Control Hold-off Time of  = 100 ms, and an interval time between consecutive Control
Error Packets of  = 250 ms. See Table 5 for relevant parameters.
2. Establish communications and regulate the rectified voltage to .
3. Change the load from its initial value to and regulate the rectified voltage .
4. Change the load from to at = 50 ms before a sending a Control Error Packet.
5. Verify that the Test Power Receiver continues to regulate and that the Power Transmitter Product responds to
the Control Error Packets by adjusting .
6. Measure the rectified voltages ( , , and ) with timings as shown in Figure 9 above, where
= 1800 ms.
7. Verify the measured values with the limits provided in Table 4.
Table5-Loadstepdefinitions
TestPower InitialLoad LightLoad HeavyLoad RectifiedVoltage
Receiver
TPR#1B 32 Ω 127 Ω 10 Ω (7 ± 2%) V
TPR#MP1B 72 Ω 96 Ω 10 Ω (12 ± 2%) V
Table6-Loadsteplimits
TestPower Voltage Minimum Target Maximum
Receiver [V] [V] [V]
TPR#1B 6.9 7 7.1
4 7 7.1
6 7.1
TPR#MP1B 11.8 12 12.2
6.9 12 12.2
10.3 12.2
9.2 Loaddumptestprocedure
9.2.1 BaselinePowerProfileloaddumptest
1. Position Test Power Receiver #1 in configuration B on the Interface Surface of the Power Transmitter Product,
with an initial load of 32 Ω, a Power Control Hold-off Time  = 100 ms, and an interval time between
consecutive Control Error Packets  = 250 ms.
2. Establish communication and regulate the rectified voltage to  = (7 ± 2%) V.
3. Change the load from its initial value to 10 Ω and regulate the rectified voltage to  = (7 ± 2%) V.
4. Change the load from 10 Ω to 127 Ω, = 50 ms before a sending a Control Error Packet.
5. Verify that the Test Power Receiver continues to regulate and that the Power Transmitter Product responds to
the Control Error Packets by adjusting .
6. Measure the rectified voltage ( , , and ) with timings as shown in Figure 10, where
= 1800 ms.
7. Verify that the measured values comply with the limits provided in Table 7.
V
max
Control Error
V Control Error
V
Δt Δt
1 1
Δt
Δt
t
Figure10-Loaddumptestdiagram
Table7-Loaddumplimits(BaselinePowerProfile)
Voltage Minimum Target Maximum Unit
6.9 7 7.1 V
6.9 7 12 V
6.9 8 V
9.2.2 ExtendedPowerProfileloaddumptest
1. Position the Test Power Receiver on the Interface Surface of the Power Transmitter Product, with an initial load
of , a Power Control Hold-off Time of  = 100 ms, and an interval time between consecutive Control
Error Packets of  = 250 ms. See Table 8 for the relevant parameters.

2. Establish communications and regulate the rectified voltage to .
3. Change the load from its initial value to and regulate the rectified voltage .
4. Change the load from to at = 50 ms before a sending a Control Error Packet.
5. Verify that the Test Power Receiver continues to regulate and that the Power Transmitter Product responds to
the Control Error Packets by adjusting .
6. Measure the rectified voltages ( , , and ) with timings as shown in Figure 10 above, where = 1800 ms.
7. Verify the measured values with the limits provided in Table 8.
Table8-Loaddumpdefinitions(ExtendedPowerProfile)
TestPower InitialLoad LightLoad HeavyLoad RectifiedVoltage
Receiver
TPR#1B 32 Ω 127 Ω 10 Ω (7 ± 2%) V
TPR#MP1B 72 Ω 96 Ω 10 Ω (12 ± 2%) V
Table9-Loaddumplimits
TestPower Voltage Minimum Target Maximum
Receiver [V] [V] [V]
TPR#1B 6.9 7 7.1
6.9 7 12
6.9 8
TPR#MP1B 11.8 12 12.2
11.8 12 20.5
11.8 13.7
10. Over-voltageprotection
A Power Transmitter shall limit the amplitude of its Power Signal (or magnetic field strength) such that it does not
generate a rectified voltage higher than 20 V at the output of a properly designed Power Receiver.
The Power Signal depends on the amount of current that runs through the Primary Coil. This amount is primarily
determined by the Power Transmitter’s Operating Point, the Power Receiver’s load impedance, and the coupling
between the Primary Coil and Secondary Coil. Whereas the Power Receiver can—to a certain extent—control its load
impedance and the Power Transmitter’s Operating Point by transmitting appropriate Control Error Packets, it has little
control over the coupling. As a consequence, scenarios exist in which a higher-than-expected voltage can result at the
Power Receiver’s output.
In one scenario, the user initially places the Power Receiver at a position where the coupling is poor and subsequently
moves it to a position where the coupling is strong. In practice this can happen when the user keeps the Power Receiver
hovering at a small distance above the Interface Surface before setting it down, or when the user places the Power
Receiver with a large misalignment between the Primary Coil and Secondary Coil and subsequently slides it into better
alignment.
In either case, the Power Transmitter can detect the Power Receiver and establish communications before the coils are
properly aligned. The Power Receiver can then start to control its output voltage to a higher level, such as 12 V, in order
to prepare for connecting its load. If the coupling is poor, the Power Receiver typically can reach its target voltage only
by driving the power Transmitter to use a high Primary Coil current (and therefore a strong Power Signal or high
magnetic field). If the coupling suddenly improves substantially, as in the above scenarios, the Power Receiver does not
have time to drive the Power Transmitter back to a lower Primary Coil current. As a result, its output voltage can
substantially increase—up to tens of volts if no special precautions are taken.
Many Power Receiver implementations that are based on common IC technology cannot handle such voltages, with 20 V
being a safe upper limit. Moreover, design constraints often are of such a nature that commonly used solutions for over-
voltage protection cannot be applied. For example, large Zener diodes or dummy loads that can handle the excess power
typically are too bulky to fit in space-limited designs. Accordingly, the Power Receiver typically has no alternative but to
rely on the Power Transmitter to keep its voltage below the safe limit.
Whereas a Power Transmitter can hold its Primary Coil current to a sufficiently low level, placing a hard limit on the
Primary Coil current can prevent a Power Receiver from reaching its target power level when it has connected its load.
A better solution is to define more than one limit according to the amount of power that is transmitted:
l
The Power Transmitter should use a low current limit if the Transmitted Power is low to prevent an over-voltage
from occurring in the Power Receiver
l
It should use a high current limit if the Transmitted Power is high to enable the Power Receiver to reach its
target Operating Point without creating an over-voltage in the Power Receiver.
The system model and analysis below explain this approach in more detail.
Figure 11 illustrates a simplified model of the system comprising a Power Transmitter on the left and a Power Receiver
on the right. For clarity, the load circuit is drawn separately from the Power Receiver. The Power Transmitter consists of
a power source ( , ), a capacitance , an inductance , and a resistance . The power source supplies a
sinusoidal voltage at a frequency . The Power Receiver consists of a capacitance , an inductance , and a
resistance . A load having an impedance is connected to the output terminals of the Power Receiver. The symbols
, , , and represent the load voltage, load current, Primary Coil current, and coupling factor.

Figure11-Simplifiedsystemmodel
For simplicity, the Power Receiver in the model includes neither a rectifier nor a resonance at a frequency as defined
inSection3.1,Dualresonantcircuit andSection3.2,Rectificationcircuit . The absence of the additional resonance does
not significantly affect the results discussed below. The effect of the rectifier is described at the end of this section.
Table 10 lists the parameters associated with the system model in Figure 11. Instead of the resonant capacitances
and , and the resistances and , the resonant frequencies and , and quality factors and are provided.
The relations between these parameters are as follows:
The Power Transmitter controls the amount of power it transfers by adjusting the amplitude of its voltage and
frequency in the ranges given in Table 10.
At start-up, it uses the ping voltage and ping frequency . To control the power up, it decreases its frequency
while keeping its voltage constant at the maximum value. To control the power down, it increases the frequency at
constant voltage, and after reaching the maximum frequency value decreases the voltage while keeping the frequency
constant at that maximum.
At start-up, the Power Receiver uses a load impedance , which represents the load of its control electronics such as
a microprocessor. After start-up, the Power Receiver can adjust its load impedance to reach its target Operating Point as
given by the target voltage and target current .

Table10-Parametersofthesimplifiedmodel
PowerTransmitter PowerReceiver
25 µH 35 µH
100 kHz 100 kHz
100 40
2…24 V (pk) 12 V (rms)
100…200 kHz 1.5 A (rms)
24 V (pk) 0.1…1000 Ω
175 kHz 800 Ω
Power Transmitter operation is subject to these constraints:
l
The Power Transmitter only uses the part of its Operating Frequency range where the Primary Coil current
decreases while the Operating Frequency increases. This constraint ensures that the Control Error Packets from
the Power Receiver have a consistent effect: a positive Control Error Value causes the Primary Coil current to
increase
...