Standard Test Method of Measurement of Common-Emitter D-C Current Gain of Junction Transistors (Withdrawn 2011)

SIGNIFICANCE AND USE
The current gain of a transistor is basic to its operation and is its single most important parameter.
Ionizing radiation, that is, gamma radiation due to a nuclear burst, will degrade the current gain due to lifetime damage in the bulk material. Degradation of gain will be greatest immediately following a burst of ionizing radiation and the gain will rapidly recover to a quasi steady-state value. Defect annealing may continue for weeks but usually the current gain recovery is small or negligible.
This method provides a procedure that does not require special-purpose test equipment.
This method is suitable for use for specification acceptance, service evaluation, or manufacturing control.
SCOPE
1.1 This test method covers the measurement of common-emitter d-c current gain (forward, hFE, or inverted, hFEI) of bipolar transistors, for which the collector-emitter leakage current, ICEO, is less than 10% of the collector current, IC, at which the measurement is to be made, and for which the shunt leakage current in the base circuit is less than 10% of the base current required.  
1.2 This test method is suitable for measurement of common-emitter d-c current gain at a single given value of test transistor collector current or over a given range of collector currents (for example, over the range of the transistor to be tested).  
1.2.1 The nominal ranges of collector current over which the three test circuits are intended to be used are as follows:  
1.2.1.1 Circuit 1, less than 100 [mu]A,  
1.2.1.2 Circuit 2, from 100 [mu]A to 100 mA, and  
1.2.1.3 Circuit 3, greater than 100 mA.  
1.3 This test method incorporates tests to determine if the power dissipated in the transistor is low enough that the temperature of the junction is approximately the same as the ambient temperature.  
1.4 The values stated in International System of Units (SI) are to be regarded as standard. No other units of measurement are included in this standard.
1.5 This standard does not purport to address the safety problems, if any, associated with its use. It is the responsibility of whoever uses this standard to consult and establish appropriate safety and health practices and determine the applicability of regulatory limitations prior to use.
WITHDRAWN RATIONALE
This test method covers the measurement of common-emitter dc current gain (forward, hFE, or inverted, hFEI) of bipolar transitors, for which the collector-emitter leakage current, ICEO, is less than 10 % of the collector current, IC, at which the measurement is to be made, and for which the shunt leakage current in the base circuit is less than 10 % of the base current required.
This standard is being withdrawn because it does not have any relevance to Nuclear and Space Effects. This is strictly an electronic document with nothing to do with radiation and should be related to a group that deals strictly with electronics.
Formerly under the jurisdiction of Committee F01 on Electronics, and the direct responsibility of Subcommittee F01.11 on Nuclear and Space Radiation Effects, this test method was withdrawn in June 2011 with no replacement.

General Information

Status
Withdrawn
Publication Date
09-Dec-1999
Withdrawal Date
31-May-2011
Current Stage
Ref Project

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ASTM F528-99(2005) - Standard Test Method of Measurement of Common-Emitter D-C Current Gain of Junction Transistors (Withdrawn 2011)
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NOTICE: This standard has either been superseded and replaced by a new version or withdrawn.
Contact ASTM International (www.astm.org) for the latest information
Designation:F528–99(Reapproved2005)
Standard Test Method of
Measurement of Common-Emitter DC Current Gain of
Junction Transistors
ThisstandardisissuedunderthefixeddesignationF528;thenumberimmediatelyfollowingthedesignationindicatestheyearoforiginal
adoption or, in the case of revision, the year of last revision.Anumber in parentheses indicates the year of last reapproval.Asuperscript
epsilon (´) indicates an editorial change since the last revision or reapproval.
1. Scope
1.1 This test method covers the measurement of common-
emitter dc current gain (forward, h , or inverted, h )of
FE FEI
bipolar transistors, for which the collector-emitter leakage
current, I , is less than 10 % of the collector current, I ,at
CEO C
which the measurement is to be made, and for which the shunt
leakage current in the base circuit is less than 10 % of the base
current required.
1.2 This test method is suitable for measurement of
common-emitter dc current gain at a single given value of test
transistor collector current or over a given range of collector
currents (for example, over the range of the transistor to be
tested).
1.2.1 The nominal ranges of collector current over which
the three test circuits are intended to be used are as follows:
1.2.1.1 Circuit 1, less than 100 µA,
1.2.1.2 Circuit 2, from 100 µA to 100 mA, and
1.2.1.3 Circuit 3, greater than 100 mA.
1.3 This test method incorporates tests to determine if the
power dissipated in the transistor is low enough that the
temperature of the junction is approximately the same as the
NOTE 1—The transistor shown is an npn type; for pnp types the
ambient temperature.
polarities of the bias supplies are reversed.
1.4 The values stated in International System of Units (SI)
FIG. 1 Explanatory Circuits to Illustrate the Meaning of Terms
are to be regarded as standard. No other units of measurement
Used in Calculation of h and h
FE FEI
are included in this standard.
1.5 This standard does not purport to address all of the
h 5 ~I 2 I !/I
safety concerns, if any, associated with its use. It is the
FE C CEO B
responsibility of the user of this standard to establish appro-
priate safety and health practices and determine the applica-
2.1.2 inverted common-emitter dc current gain, h —the
FEI
bility of regulatory limitations prior to use.
ratio of dc emitter current I (in excess of emitter-collector
E
leakage current I ) to base current when the transistor is
ECO
2. Terminology
connected in the common-collector configuration (seeFig. 1b);
2.1 Definitions:
that is:
2.1.1 common-emitter dc current gain, h —the ratio of dc
FE
h 5 ~I 2 I !/I
FEI E ECO B
collector current (in excess of collector-emitter leakage current
I ) to base current when the transistor is connected in the
CEO
NOTE 1—In the remainder of this test method only h is discussed.
FE
common-emitter configuration (see Fig. 1a); that is:
Measurements and calculations for h are identical and the same
FEI
apparatus and procedures apply.
This test method is under the jurisdiction of ASTM Committee F01 on
3. Summary of Test Method
Electronics, and is the direct responsibility of Subcommittee F01.11 on Quality and
Hardness Assurance.
3.1 Sufficient current, I , is driven into the base of a
B
Current edition approved Jan. 1, 2005. Published January 2005. Originally
transistor to achieve the desired collector current at the
approved in 1977 as F528 – 77 T. Last previous edition approved in 1999 as
F528 – 99. DOI: 10.1520/F0528-99R05. required collector-emitter voltage. The magnitude of the base
Copyright © ASTM International, 100 Barr Harbor Drive, PO Box C700, West Conshohocken, PA 19428-2959, United States.
F528–99 (2005)
current is measured and the gain calculated. Three test circuits
are available for tests at low, intermediate, and high transistor
collector currents, respectively. The measurements and calcu-
lations are repeated for all collector-current values of interest.
3.2 The following quantities are unspecified in the
method and are to be agreed upon by the parties to the test:
3.2.1 The collector currents, I , at which the measurements
C
are to be made,
3.2.2 The collector-emitter voltage, V , to be used when
CE
making the measurements, and
3.2.3 The temperature at which the measurements are to be
made.
4. Significance and Use
4.1 The current gain of a transistor is basic to its operation
and is its single most important parameter.
4.2 Ionizing radiation, that is, gamma radiation due to a
nuclear burst, will degrade the current gain due to lifetime
damage in the bulk material. Degradation of gain will be
greatest immediately following a burst of ionizing radiation
and the gain will rapidly recover to a quasi steady-state value.
Defect annealing may continue for weeks but usually the
current gain recovery is small or negligible.
NOTE 1—Capacitor C in Circuits 2 and 3 is a bypass capacitor that is
4.3 This method provides a procedure that does not require
used if required. (see Note 4).
special-purpose test equipment.
NOTE 2—Oscilloscopes 1 and 2 may be digitizers.
4.4 This method is suitable for use for specification accep-
FIG. 2 Schematics of Circuits for Measurement of h
FE
tance, service evaluation, or manufacturing control.
5. Interferences
5.1 Shunt Leakage—Whenthemagnitudeoftheimpedance
6.1.1.2 Noise and ripple less than 0.5 % of the output
between the base and emitter connections on the test fixture is
voltage,
comparable to the base-emitter impedance of the transistor
6.1.1.3 Adjustable over a nominal range of 0 to 30 V, and
being tested, the measurement results are invalid.
6.1.1.4 Capable of supplying currents up to 250 mA.
6.1.2 DC Voltage Source 2—dc power supply meeting the
NOTE 2—The shunt leakage current can be affected by high humidity.
following specifications:
Since the range over which valid current gain measurements can be made
6.1.2.1 Stability, noise and ripple, and current specifications
is reduced by shunt leakage, transistors that require measurement of very
low currents must be tested in an environment of less than 40 % relative
the same as dc voltage source 1 (see 6.1.1), and
humidity.
6.1.2.2 Adjustable over the range from 0 to
V + I R (typically less than 0.1 V ).
5.2 Temperature— For referee measurements, the tempera-
CE C C CE
ture of the device must be controlled or a set of correction 6.1.3 DC Voltmeters 1 and 2—dc digital voltmeters meeting
the following specifications:
factors developed for adjusting the data to a common tempera-
ture since h may vary as much as 1 to 3 %/°C. Care must be 6.1.3.1 At least 3 ⁄2-digit display,
FE
6.1.3.2 Accuracy of at least 60.5 % of full-scale reading,
exercised in handling the device as well as in controlling the
ambient temperature. The operator may use one or any 6.1.3.3 Resolution of 61 least-significant digit,
combination of the following to reduce operator-induced tem- 6.1.3.4 Scales of at least 100 mV and 1, 10, and 100 V, and
perature increases: 6.1.3.5 Input impedance at least 100 times that of the
5.2.1 Gloves. resistor (R or R ) across which the voltmeters are used to
B C
5.2.2 Tongs or some other suitable means for inserting the measure voltages.
device into the test fixture. 6.1.4 Resistors, specified as follows:
5.2.3 Procedure of waiting for the device to reach thermal 6.1.4.1 R —1 % resistor in the nominal resistance range 10
B
equilibrium (usually 20 to 30 s is sufficient). V to 100 kV, depending on the base current being used.
6.1.4.2 R —1 % resistor in the nominal resistance range 10
C
6. Apparatus
V to 10 kV, depending on the collector current.
6.1.4.3 Voltage Divider Resistors R— and R —R shall
6.1 Circuit 1— Measuring circuit for low currents with the X Y X
be at least equal to 10 R .
following components (see Fig. 2a): Y
6.1.1 DC Voltage Source 1—dc power supply meeting the
NOTE 3—These resistors form a voltage divider used to simplify the
following specifications:
adjustmentofbasecurrent.Nofurthertoleranceorvaluespecificationsare
6.1.1.1 Stable to within 60.1 % of the set voltage, applicable (see Fig. 2a).
F528–99 (2005)
6.2 Circuit 2—Measuring circuit for intermediate currents (e) Common-mode rejection ratio of 20 dB minimum, and
with the following components (see Fig. 2b): 6.2.3.2 Digitizers with Bandwidth, Sampling Interval, and
6.2.1 DC Voltage Source, meeting the specifications of dc Time-base Capabilities, adequate for handling the transient
voltage source 2 (see 6.1.2), and with the capability of signals with good resolution for all pulse widths utilized in the
supplying current pulses of the magnitude required for the test may be used. Hard copy printouts of the recorded signal
transistor under test. may be a part of the capability of this apparatus.
6.2.4 Resistors, specified as follows:
NOTE 4—For power transistors that need large current pulses, this
6.2.4.1 R —1 % resistor of the proper value to match the
requirement can be met with a power supply inadequate in itself by O
output impedance of the pulsed source,
placing a large capacitor (1000 to 10 000 µF) across the output terminals
of the power supply. To compensate for possible inductive components of 6.2.4.2 R —1 % resistor in the nominal resistance range 1
B
the impedance of this large capacitor, it should be paralleled by a small
V to 10 kV, depending on the base current being used, and
capacitor (0.001 to 0.1 µF).
across which the voltage developed by the base current is
6.2.2 Pulsed Voltage Source, meeting the following specifi- measured, and
cations: 6.2.4.3 R —1 % resistor in the nominal resistance range 1
C
6.2.2.1 Polarity selectable as positive or negative, Vto1kV, depending on the collector current being used, and
6.2.2.2 Rise time, t , and fall time, t , (see Fig. 3) less than across which the voltage developed by the collector current is
r f
or equal to 0.1 times the width of the pulse to be used, measured.
6.2.2.3 Pulse width, t , (see Fig. 3) adjustable from 1.0 to
6.3 Circuit 3—Measuring circuit for high currents with the
p
350 µs, inclusive, following components (see Fig. 2c):
6.2.2.4 Pulse top flat within 3 % over interval, t (see Fig.
6.3.1 DC Voltage Source, as specified in 6.2.1,
m
3),
6.3.2 Pulsed Voltage Source, as specified in 6.2.2,
6.2.2.5 An output adjustable over a nominal range from 0 to
6.3.3 Oscilloscopes or Digitizers, as specified in 6.2.3, with
20 V, and
the exception that differential measurement capability is not
6.2.2.6 Capability of driving the maximum base current
required,
required for the transistor to be tested.
6.3.4 Current Transformers 1 and 2, meeting the following
specifications:
NOTE 5—The nonuniform impedance of the base-emitter diode of the
6.3.4.1 Sensitivity of 0.1 V/A or better,
transistor under test may cause the output of some pulse sources to vary
to such a degree that the requirement of 6.2.2.4 cannot be met. The use of 6.3.4.2 Calibrated accuracy of 63 % or better,
a resistive termination and judicious choice of R , R , and R to provide
B X Y 6.3.4.3 Core saturation rating exceeding the product of the
an essentially resistive and constant load to the pulse source may help to
current to be measured and its pulse width,
avoid this difficulty.
6.3.4.4 Rise and fall times less than or equal to 0.1 times the
6.2.3 Oscilloscopes or Digitizers:
width of the pulse used, and
6.2.3.1 General-purpose laboratory oscilloscopes meeting
6.3.4.5 Low-frequency response such that a square pulse of
the following specifications:
the width used in the test results in a droop (voltage drop) of
(a) (a) Bandwidth of dc to 10 MHz minimum,
less than 3 % over the interval t .
m
(b) Deflection factors covering, as a minimum, the range
6.3.5 Resistors, specified as follows:
from 5 mV/div to 1V/div, inclusive,
6.3.5.1 R —1 % resistor of the proper value to match the
O
(c) Input impedance greater than or equal to 100 times the
output impedance of the pulsed voltage source, and
dc resistance across which the oscilloscopes are used to
6.3.5.2 R —1 % resistor of the value specified by the
T
measure voltages,
manufacturer as the termination for the current transformer.
(d) Capability of differential measurements with both
6.4 Test Fixture— Transistor socket suitable for transistor
inputs isolated from test-circuit common,
under test, to be used as required in each of the three test
circuits (see Fig. 2).
6.5 Miscellaneous Circuit Components, to be used as re-
quired in each of the test circuits (see Fig. 2). The switches,
leads, and connections shall be of a quality customarily used in
electronic circuit fabrication.
6.6 Temperature-Measuring Device, capable of measuring
the temperature in the vicinity of the device under test to an
accuracy of6 1°C at the temperature specified for the mea-
surement.
7. Sampling
7.1 This test method is not intended for use as a 100 %
inspection test.
NOTE 1—t must be at least equal to t /3.
m p
7.2 In any test program utilizing this test method, sample
FIG. 3 Minimum Width t of Pulse that May Be Used in h Test
p FE
sizes and selection techniques shall be agreed upon by the
Measurements
parties to the test.
F528–99 (2005)
8. Procedure 8.1.14.3 Switch S2 to Position 2 and readjust dc voltage
source 1 to obtain again the desired I .
C
8.1 Circuit 1—Low Current Levels (see Note 6):
8.1.14.4 Repeat 8.1.14.2 and 8.1.14.3 until the desired I
8.1.1 Assemble the test circuit incorporating a socket suit- C
and V values are obtained.
CE
able for the transistor to be tested (see Fig. 2a).
8.1.15 Measure and record V , in volts.
8.1.1.1 Use R = 100 kV. RB
B
8.1.16 Calculate and record I , in amperes, using the
8.1.2 With no transistor in the test fixture, S1 closed, and S3
B
following equation:
in position 1, adjust dc voltage source 1 to its maximum value.
8.1.3 Using dc voltmeter 1, measure the voltage across R .
I 5 V /R (2)
B
B RB B
Record this value as V , in volts.
RB
8.1.4 Move S3 to position 2. Using dc voltmeter 1, measure
8.1.17 Calculate and record h , using the following equa-
FE
and record the voltage across R , V , in volts.
Y RY
tion:
8.1.5 Calculate and record R , V (Note 2).
SHUNT
h 5 I 2 I !/I (3)
~
FE C CEO B
V
RY
R 5 R 2 1 (1)
S D
SHUNT B
V
RB
8.1.18 Using the temperature-measuring device, measure
8.1.6 Replace the 100-kV resistor used for R in 8.1.1.1
B
the ambient temperature within 50 mm of the test fixture.
with a resistor chosen to have a sufficiently low value of
Record this value as T,in°C.
a
resistance so that the required base current can be supplied
8.1.19 Move S3 to Position 2. Using dc voltmeter 1,
withoutexceedingthevoltageratingofdcvoltagesource1,but
measure and record the voltage across R with the test
Y
have a sufficiently high value of resistance so that the voltage
transistorint
...

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