EN 60191-6-17:2011

Mechanical standardization of semiconductor devices - Part 6-17: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for stacked packages - Fine-pitch ball grid array and fine-pitch land grid array (P-PFBGA and P-PFLGA)

IEC 60191-6-17:2011 provides outline drawings and dimensions for stacked packages and individual stackable packages in the form of FBGA or FLGA.

Mechanische Normung von Halbleiterbauelementen - Teil 6-17: Allgemeine Regeln für die Erstellung von Gehäusezeichnungen von SMD-Halbleitergehäusen - Konstruktionsleitfaden für gestapelte Gehäuse - Feinraster-Ball-Grid-Array und Feinraster-Land-Grid-Array (P-PFBGA/P-PFLGA)

Normalisation mécanique des dispositifs à semiconducteurs - Partie 6-17: Règles générales pour la préparation des dessins d'encombrement des dispositifs à semiconducteurs à montage en surface - Guide de conception pour les boîtiers emplilés - Boîtiers matriciels à billes et à pas fins et boîtiers matriciels à zone de contact plate et à pas fins (P-PFBGA et P-PFLGA)

La CEI 60191-6-17:2011 fournit les dessins d'encombrement et les dimensions pour les boîtiers empilés et les boîtiers empilables individuels sous forme de FBGA ou FLGA.

Standardizacija mehanskih lastnosti za polprevodniške elemente - 6-17. del: Splošna pravila za pripravo tehničnih risb za polprevodniške elemente v okrovih za površinsko montažo - Navodilo za oblikovanje zloženih okrovov - Vezja s finim rastrom mreže krogličnih priključkov in finim rastrom mreže priključkov v ravnini (P-PFBGA in P-PFLGA) (IEC 60191-6-17:2011)

Ta del IEC 60191 zagotavlja tehnične risbe in dimenzije za zložene okrove in posamezne zložene okrove v obliki FBGA in FLGA.

General Information

• Status: Published
• Publication Date: 14-Apr-2011
• Withdrawal Date: 02-Mar-2014
• ICS: 31.080.01 - Semiconductor devices in general
• Technical Committee: CLC/SR 47D - Mechanical standardization of semiconductor devices
• Drafting Committee: IEC/SC 47D - IEC_SC_47D
• Parallel Committee: IEC/SC 47D - IEC_SC_47D
• Current Stage: 6060 - Document made available - Publishing
• Start Date: 15-Apr-2011
• Completion Date: 15-Apr-2011
• Ref Project: SIST EN 60191-6-17:2011 - Mechanical standardization of semiconductor devices - Part 6-17: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for stacked packages - Fine-pitch ball grid array and fine-pitch land grid array (P-PFBGA and PPFLGA) (IEC 60191-6-17:2011)

Standards Content (Sample)

SLOVENSKI STANDARD
SIST EN 60191-6-17:2011
01-junij-2011
6WDQGDUGL]DFLMDPHKDQVNLKODVWQRVWL]DSROSUHYRGQLãNHHOHPHQWHGHO
6SORãQDSUDYLOD]DSULSUDYRWHKQLþQLKULVE]DSROSUHYRGQLãNHHOHPHQWHYRNURYLK
]DSRYUãLQVNRPRQWDåR1DYRGLOR]DREOLNRYDQMH]ORåHQLKRNURYRY9H]MDVILQLP
UDVWURPPUHåHNURJOLþQLKSULNOMXþNRYLQILQLPUDVWURPPUHåHSULNOMXþNRYYUDYQLQL
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Mechanical standardization of semiconductor devices - Part 6-17: General rules for the
preparation of outline drawings of surface mounted semiconductor device packages -
Design guide for stacked packages - Fine-pitch ball grid array and fine-pitch land grid
array (P-PFBGA and PPFLGA) (IEC 60191-6-17:2011)
Mechanische Normung von Halbleiterbauelementen - Teil 6-17: Allgemeine Regeln für
die Erstellung von Gehäusezeichnungen von SMD-Halbleitergehäusen -
Konstruktionsleitfaden für gestapelte Gehäuse - Feinraster-Ball-Grid-Array und
Feinraster-Land-Grid-Array (P-PFBGA/P-PFLGA) (IEC 60191-6-17:2011)
Normalisation mécanique des dispositifs à semiconducteurs - Partie 6-17: Règles
générales pour la préparation des dessins d'encombrement des dispositifs à
semiconducteurs à montage en surface - Guide de conception pour les boîtiers emplilés
- Boîtiers matriciels à billes et à pas fins et boîtiers matriciels à zone de contact plate et à
pas fins (P-PFBGA et P-PFLGA) (CEI 60191-6-17:2011)
Ta slovenski standard je istoveten z: EN 60191-6-17:2011
ICS:
01.100.25 5LVEHVSRGURþMD Electrical and electronics
HOHNWURWHKQLNHLQHOHNWURQLNH engineering drawings
31.240 Mehanske konstrukcije za Mechanical structures for
elektronsko opremo electronic equipment
SIST EN 60191-6-17:2011 en
2003-01.Slovenski inštitut za standardizacijo. Razmnoževanje celote ali delov tega standarda ni dovoljeno.

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SIST EN 60191-6-17:2011

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SIST EN 60191-6-17:2011

EUROPEAN STANDARD
EN 60191-6-17

NORME EUROPÉENNE
April 2011
EUROPÄISCHE NORM

ICS 31.080.01
English version

Mechanical standardization of semiconductor devices -
Part 6-17: General rules for the preparation of outline drawings of surface
mounted semiconductor device packages -
Design guide for stacked packages -
Fine-pitch ball grid array and fine-pitch land grid array (P-PFBGA and P-
PFLGA)
(IEC 60191-6-17:2011)

Normalisation mécanique des dispositifs à Mechanische Normung von
semiconducteurs - Halbleiterbauelementen -
Partie 6-17: Règles générales pour la Teil 6-17: Allgemeine Regeln für die
préparation des dessins d'encombrement Erstellung von Gehäusezeichnungen von
des dispositifs à semiconducteurs à SMD-Halbleitergehäusen -
montage en surface - Konstruktionsleitfaden für gestapelte
Guide de conception pour les boîtiers Gehäuse -
emplilés - Feinraster-Ball-Grid-Array und Feinraster-
Boîtiers matriciels à billes et à pas fins et Land-Grid-Array (P-PFBGA/P-PFLGA)
boîtiers matriciels à zone de contact plate (IEC 60191-6-17:2011)
et à pas fins (P-PFBGA et P-PFLGA)
(CEI 60191-6-17:2011)
This European Standard was approved by CENELEC on 2011-03-03. CENELEC members are bound to comply
with the CEN/CENELEC Internal Regulations which stipulate the conditions for giving this European Standard
the status of a national standard without any alteration.

Up-to-date lists and bibliographical references concerning such national standards may be obtained on
application to the Central Secretariat or to any CENELEC member.

This European Standard exists in three official versions (English, French, German). A version in any other
language made by translation under the responsibility of a CENELEC member into its own language and notified
to the Central Secretariat has the same status as the official versions.

CENELEC members are the national electrotechnical committees of Austria, Belgium, Bulgaria, Croatia, Cyprus,
the Czech Republic, Denmark, Estonia, Finland, France, Germany, Greece, Hungary, Iceland, Ireland, Italy,
Latvia, Lithuania, Luxembourg, Malta, the Netherlands, Norway, Poland, Portugal, Romania, Slovakia, Slovenia,
Spain, Sweden, Switzerland and the United Kingdom.

CENELEC
European Committee for Electrotechnical Standardization
Comité Européen de Normalisation Electrotechnique
Europäisches Komitee für Elektrotechnische Normung

Management Centre: Avenue Marnix 17, B - 1000 Brussels


© 2011 CENELEC - All rights of exploitation in any form and by any means reserved worldwide for CENELEC members.
Ref. No. EN 60191-6-17:2011 E

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SIST EN 60191-6-17:2011
EN 60191-6-17:2011 - 2 -
Foreword
The text of document 47D/785/FDIS, future edition 1 of IEC 60191-6-17, prepared by SC 47D,
Mechanical standardization for semiconductor devices, of IEC TC 47, Semiconductor devices, was
submitted to the IEC-CENELEC parallel vote and was approv
...