EN 60191-6-20:2010

Mechanical standardization of semiconductor devices - Part 6-20: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Measuring methods for package dimensions of small outline J-lead packages (SOJ)

IEC 60191-6-20:2010 specifies methods to measure package dimensions of small outline J-lead-packages (SOJ), package outline form E in accordance with IEC 60191-4.

Mechanische Normung von Halbleiterbauelementen - Teil 6-20: Allgemeine Regeln für die Erstellung von Gehäusezeichnungen von SMD-Halbleitergehäusen - Messverfahren für Gehäusemaße von kleinen Gehäusen mit J-förmigen Anschlüssen (SOJ)

Normalisation mécanique des dispositifs à semiconducteurs - Part 6-20: Règles générales pour la préparation des dessins d'encombrement des boîtiers pour dispositifs à semiconducteurs pour montage en surface - Méthodes de mesure pour les dimensions des boîtiers à sortie en J (SOJ) de faible encombrement

La CEI 60191-6-20:2010 spécifie les méthodes destinées à mesurer les dimensions des boîtiers à sortie en J (SOJ) de faible encombrement, l'encombrement des boîtiers de forme E conformément à la CEI 60191-4.

Standardizacija mehanskih lastnosti polprevodniških elementov - 6-20. del: Splošna pravila za izdelavo tehničnih risb površinsko montiranih sklopov polprevodniških elementov - Merilne metode za mere majhnih okrovov s priključki v obliki črke J (SOJ) (IEC 60191-6-20:2010)

Ta del IEC 60191 določa metode za merjenje mer majhnih okrovov s priključki v obliki črke J (SOJ), okrovov v obliki črke E v skladu z IEC 60191-4.

General Information

• Status: Published
• Publication Date: 14-Oct-2010
• Withdrawal Date: 30-Sep-2013
• ICS: 31.080.01 - Semiconductor devices in general
• Technical Committee: CLC/TC 47X - Semiconductor devices and trusted chips
• Drafting Committee: IEC/SC 47D - IEC_SC_47D
• Parallel Committee: IEC/SC 47D - IEC_SC_47D
• Current Stage: 6060 - Document made available - Publishing
• Start Date: 15-Oct-2010
• Completion Date: 15-Oct-2010
• Ref Project: SIST EN 60191-6-20:2010 - Mechanical standardization of semiconductor devices - Part 6-20: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Measuring methods for package dimensions of small outline J-lead packages (SOJ) (IEC 60191-6-20:2010)

Standards Content (Sample)

SLOVENSKI STANDARD
01-december-2010
6WDQGDUGL]DFLMDPHKDQVNLKODVWQRVWLSROSUHYRGQLãNLKHOHPHQWRYGHO
6SORãQDSUDYLOD]DL]GHODYRWHKQLþQLKULVESRYUãLQVNRPRQWLUDQLKVNORSRY
SROSUHYRGQLãNLKHOHPHQWRY0HULOQHPHWRGH]DPHUHPDMKQLKRNURYRYVSULNOMXþNL
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Mechanical standardization of semiconductor devices - Part 6-20: General rules for the
preparation of outline drawings of surface mounted semiconductor device packages -
Measuring methods for package dimensions of small outline J-lead packages (SOJ) (IEC
60191-6-20:2010)
Mechanische Normung von Halbleiterbauelementen - Teil 6-20: Allgemeine Regeln für
die Erstellung von Gehäusezeichnungen von SMD-Halbleitergehäusen - Messverfahren
für Gehäusemaße von kleinen Gehäusen mit J-förmigen Anschlüssen (SOJ) (IEC 60191-
6-20:2010)
Normalisation mécanique des dispositifs à semiconducteurs - Part 6-20: Règles
générales pour la préparation des dessins d'encombrement des boîtiers pour dispositifs
à semiconducteurs pour montage en surface - Méthodes de mesure pour les dimensions
des boîtiers à sortie en J (SOJ) de faible encombrement (CEI 60191-6-20:2010)
Ta slovenski standard je istoveten z: EN 60191-6-20:2010
ICS:
01.100.25 5LVEHVSRGURþMD Electrical and electronics
HOHNWURWHKQLNHLQHOHNWURQLNH engineering drawings
31.080.01 Polprevodniški elementi Semiconductor devices in
(naprave) na splošno general
2003-01.Slovenski inštitut za standardizacijo. Razmnoževanje celote ali delov tega standarda ni dovoljeno.

EUROPEAN STANDARD
EN 60191-6-20
NORME EUROPÉENNE
October 2010
EUROPÄISCHE NORM
ICS 31.080.01
English version
Mechanical standardization of semiconductor devices -
Part 6-20: General rules for the preparation of outline drawings of surface
mounted semiconductor device packages -
Measuring methods for package dimensions of small outline J-lead
packages (SOJ)
(IEC 60191-6-20:2010)
Normalisation mécanique des dispositifs à Mechanische Normung von
semiconducteurs - Halbleiterbauelementen -
Part 6-20: Règles générales pour la Teil 6-20: Allgemeine Regeln für die
préparation des dessins d'encombrement Erstellung von Gehäusezeichnungen von
des boîtiers pour dispositifs à SMD-Halbleitergehäusen -
semiconducteurs pour montage en Messverfahren für Gehäusemaße von
surface - kleinen Gehäusen mit J-förmigen
Méthodes de mesure pour les dimensions Anschlüssen (SOJ)
des boîtiers à sortie en J (SOJ) de faible (IEC 60191-6-20:2010)
encombrement
(CEI 60191-6-20:2010)
This European Standard was approved by CENELEC on 2010-10-01. CENELEC members are bound to comply
with the CEN/CENELEC Internal Regulations which stipulate the conditions for giving this European Standard
the status of a national standard without any alteration.

Up-to-date lists and bibliographical references concerning such national standards may be obtained on
application to the Central Secretariat or to any CENELEC member.

This European Standard exists in three official versions (English, French, German). A version in any other
language made by translation under the responsibility of a CENELEC member into its own language and notified
to the Central Secretariat has the same status as the official versions.

CENELEC members are the national electrotechnical committees of Austria, Belgium, Bulgaria, Croatia, Cyprus,
the Czech Republic, Denmark, Estonia, Finland, France, Germany, Greece, Hungary, Iceland, Ireland, Italy,
Latvia, Lithuania, Luxembourg, Malta, the Netherlands, Norway, Poland, Portugal, Romania, Slovakia, Slovenia,
Spain, Sweden, Switzerland and the United Kingdom.
CENELEC
European Committee for Electrotechnical Standardization
Comité Européen de Normalisation Electrotechnique
Europäisches Komitee für Elektrotechnische Normung

Management Centre: Avenue Marnix 17, B - 1000 Brussels

© 2010 CENELEC - All rights of exploitation in any form and by any means reserved worldwide for CENELEC members.
Ref. No. EN 60191-6-20:2010 E
Foreword
The text of document 47D/771/FDIS, future edition 1 of IEC 60191-6-20, prepared by SC 47D,
Mechanical standardization for semiconductor devices, of IEC TC 47, Semiconductor devices, was
submitted to the IEC-CENELEC parallel vote and was approved by CENELEC as EN 60191-6-20 on
2010-10-01.
Attention is drawn to the possibility that some of the elements of this document may be the subject of
patent rights. CEN and CENELEC shall not be held responsible for identifying any or all such patent
rights.
The following dates were fixed:
– latest date by which the EN has to be implemented
at national level by publication of an identical
national standard or by endorsement (dop) 2011-07-01
– latest date by which the national standards conflicting
with the EN have to be withdrawn (dow) 2013-10-01
Annex ZA has been added by CENELEC.
__________
Endorsement notice
The text of the International Standard IEC 60191-6-20:2010 was approved by CENELEC as a European
Standard without any modification.
__________
- 3 - EN 60191-6-20:2010
Annex ZA
(normative)
Normative references to international publications
with their corresponding European publications

The following referenced documents are indispensable for the application of this document. For dated
references, only the edition cited applies. For undated references, the latest edition of the referenced
document (including any amendments) applies.

NOTE  When an international publication has been modified by common modifications, indicated by (mod), the relevant EN/HD
applies.
Publication Year Title EN/HD Year

IEC 60191-4 - Mechanical standardization of semiconductor EN 60191-4 -
devices -
Part 4: Coding system and classification into
forms of package outlines for semiconductor
device packages
IEC 60191-6 - Mechanical standardization of semiconductor EN 60191-6 -
devices -
Part 6: General rules for the preparation of
outline drawings of surface mounted
semiconductor device packages
IEC 60191-6-20 ®
Edition 1.0 2010-08
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
Mechanical standardization of semiconductor devices –
Part 6-20: General rules for the preparation of outline drawings of surface
mounted semiconductor device packages – Measuring methods for package
dimensions of small outline J-lead packages (SOJ)

Normalisation mécanique des dispositifs à semiconducteurs –
Partie 6-20: Règles générales pour la préparation des dessins d'encombrement
des boîtiers pour dispositifs à semiconducteurs pour montage en surface –
Méthodes de mesure pour les dimensions des boîtiers à sortie en J (SOJ) de
faible encombrement
INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
COMMISSION
ELECTROTECHNIQUE
PRICE CODE
INTERNATIONALE
L
CODE PRIX
ICS 31.080.01 ISBN 978-2-88912-167-0
– 2 – 60191-6-20 © IEC:2010
INTERNATIONAL ELECTROTECHNICAL COMMISSION
______________
MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES –

Part 6-20: General rules for the preparation of outline drawings
of surface mounted semiconductor device packages –
Measuring methods for package dimensions
of small outline J-lead packages (SOJ)

FOREWORD
1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising
all national electrotechnical committees (IEC National Committees). The object of IEC is to promote
international co-operation on all questions concerning standardization in the electrical and electronic fields. To
this end and in addition to other activities, IEC publishes International Standards, Technical Specifications,
Technical Reports, Publicly Available Specifications (PAS) and Guides (hereafter referred to as “IEC
Publication(s)”). Their preparation is entrusted to technical committees; any IEC National Committee interested
in the subject dealt with may participate in this preparatory work. International, governmental and non-
governmental organizations liaising with the IEC also participate in this preparation. IEC collaborates closely
with the International Organization for Standardization (ISO) in accordance with conditions determined by
agreement between the two organizations.
2) The formal decisions or agreements of IEC on technical matters express, as nearly as possible, an international
consensus of opinion on the relevant subjects since each technical committee has representation from all
interested IEC National Committees.
3) IEC Publications have the form of recommendations for international use and are accepted by IEC National
Committees in that sense. While all reasonable efforts are made to ensure that the technical content of IEC
Publications is accurate, IEC cannot be held responsible for the way in which they are used or for any
misinterpretation by any end user.
4) In order to promote international uniformity, IEC National Committees undertake to apply IEC Publications
transparently to the maximum extent possible in their national and regional publications. Any divergence
between any IEC Publication and the corresponding national or regional publication shall be clearly indicated in
the latter.
5) IEC itself does not provide any attestation of conformity. Independent certification bodies provide conformity
assessment services and, in some areas, access to IEC marks of conformity. IEC is not responsible for any
services carried out by independent certification bodies.
6) All users should ensure that they have the latest edition of this publication.
7) No liability shall attach to IEC or its directors, employees, servants or agents including individual experts and
members of its technical committees and IEC National Committees for any personal injury, property damage or
other damage of any nature whatsoever, whether direct or indirect, or for costs (including legal fees) and
expenses arising out of the publication, use of, or reliance upon, this IEC Publication or any other IEC
Publications.
8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is
indispensable for the correct application of this publication.
9) Attention is drawn to the possibility that some of the elements of this IEC Publication may be the subject of
patent rights. IEC shall not be held responsible for identifying any or all such patent rights.
International Standard IEC 60191-6-20 has been prepared by subcommittee 47D: Mechanical
standardization of semiconductor devices, of IEC technical committee 47: Semiconductor
devices.
The text of this standard is based on the following documents:
FDIS Report on voting
47D/771/FDIS 47D/775/RVD
Full information on the voting for the approval of this standard can be found in the report on
voting indicated in the above table.
This publication has been drafted in accordance with the ISO/IEC Directive, Part 2.

60191-6-20 © IEC:2010 – 3 –
A list of all the parts in the IEC 60191 series, under the general title Mechanical
standardization of semiconductor devices, can be found on the IEC website.
The committee has decided that the contents of this publication will remain unchanged until
the stability date indicated on the IEC web site under "http://webstore.iec.ch" in the data
related to the specific publication. At this date, the publication will be
• reconfirmed,
• withdrawn,
• replaced by a revised edition, or
• amended.
– 4 – 60191-6-20 © IEC:2010
MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES –

Part 6-20: General rules for the preparation of outline drawings
of surface mounted semiconductor device packages –
Measuring methods for package dimensions
of small outline J-lead packages (SOJ)

1 Scope
This part of IEC 60191 specifies methods to measure package dimensions of small outline J-
lead-packages (SOJ), package outline form E in accordance with IEC 60191-4.
2 Normative references
The following referenced documents are indispensable for the application of this document.
For dated references, only the edition cited applies. For undated references, the latest edition
of the referenced document (including any amendments) applies.
IEC 60191-4, Mechanical standardization of semiconductor devices – Part 4: Coding system
and classification into forms of package outlines for semiconductor device packages
IEC 60191-6, Mechanical standardization of semiconductor devices – Part 6: General rules for
the preparation of outline drawings of surface mounted semiconductor device packages
3 Terms and definitions
For the purposes of this document, the terms and definitions given in IEC 60191-6 apply.
4 Measuring methods
4.1 Description of measuring methods
The measuring methods described in this standard are for dimension values guaranteed to
users on the basis of the following items.
a) In general, measuring the dimensions shall be made with the semiconductor packages
mounted on a printed circuit board as the guarantee is made to user.
b) In general, measurement may be made either by hand or automatically.
c) Even if a measuring method deviates from the original definition of dimensions, it is
defined as an alternative measuring method as long as it is equivalent in view of accuracy
and can be used easily. See 4.6.3b.
d) The dimensions that cannot be measured unless the package is destroyed may be
calculated from other dimensions or replaced by representative values.

60191-6-20 © IEC:2010 – 5 –
4.2 Reference characters and outline drawings
An outline drawing is given in Figure 1.
A1
D
A2
A
n n/2+1
Terminal 1
index area
n/2
L
B
IEC  2258/09 A
IEC  2259/09
Figure 1a – Top view Figure 1b – Side view

Seating plane
S
e
y
S
ZD x
M S A-B
IEC  2260/09
Figure 1c – Side view
b2
P
bp
b1
Lp
t
M P A-B
S
bp
IEC  2263/09
IEC  2261/09
IEC  2262/09
...