prEN IEC 60749-26:2024

Semiconductor devices - Mechanical and climatic test methods - Part 26: Electrostatic discharge (ESD) sensitivity testing - Human body model (HBM)

Halbleiterbauelemente - Mechanische und klimatische Prüfverfahren - Teil 26: Prüfung der Empfindlichkeit gegen elektrostatische Entladungen (ESD) - Human Body Model (HBM)

Dispositifs à semiconducteurs - Méthodes d'essais mécaniques et climatiques - Partie 26: Essai de sensibilité aux décharges électrostatiques (DES) - Modèle du corps humain (HBM)

Polprevodniški elementi - Metode za mehansko in klimatsko preskušanje - 26. del: Preskušanje občutljivosti na elektrostatično razelektritev (ESD) - Model človeškega telesa (HBM)

General Information

• Status: Not Published
• Publication Date: 21-Jun-2026
• ICS: 31.080.01 - Semiconductor devices in general
• Technical Committee: CLC/TC 47X - Semiconductor devices and trusted chips
• Current Stage: 4020 - Enquiry circulated - Enquiry
• Start Date: 29-Nov-2024
• Due Date: 29-Nov-2024
• Completion Date: 29-Nov-2024
• Ref Project: oSIST prEN IEC 60749-26:2025 - Semiconductor devices - Mechanical and climatic test methods - Part 26: Electrostatic discharge (ESD) sensitivity testing - Human body model (HBM)

Relations

• Revises: EN IEC 60749-26:2018 - Semiconductor devices - Mechanical and climatic test methods - Part 26: Electrostatic discharge (ESD) sensitivity testing - Human body model (HBM)
• Effective Date: 24-Sep-2024

Standards Content (Sample)

SLOVENSKI STANDARD
01-januar-2025
Polprevodniški elementi - Metode za mehansko in klimatsko preskušanje - 26. del:
Preskušanje občutljivosti na elektrostatično razelektritev (ESD) - Model
človeškega telesa (HBM)
Semiconductor devices - Mechanical and climatic test methods - Part 26: Electrostatic
discharge (ESD) sensitivity testing - Human body model (HBM)
Halbleiterbauelemente - Mechanische und klimatische Prüfverfahren - Teil 26: Prüfung
der Empfindlichkeit gegen elektrostatische Entladungen (ESD) - Human Body Model
(HBM)
Dispositifs à semiconducteurs - Méthodes d'essais mécaniques et climatiques - Partie
26: Essai de sensibilité aux décharges électrostatiques (DES) - Modèle du corps humain
(HBM)
Ta slovenski standard je istoveten z: prEN IEC 60749-26:2024
ICS:
31.080.01 Polprevodniški elementi Semiconductor devices in
(naprave) na splošno general
2003-01.Slovenski inštitut za standardizacijo. Razmnoževanje celote ali delov tega standarda ni dovoljeno.

47/2882/CDV
COMMITTEE DRAFT FOR VOTE (CDV)

PROJECT NUMBER:
IEC 60749-26 ED5
DATE OF CIRCULATION: CLOSING DATE FOR VOTING:
2024-11-29 2025-02-21
SUPERSEDES DOCUMENTS:
47/2872/RR
IEC TC 47 : SEMICONDUCTOR DEVICES
SECRETARIAT: SECRETARY:
Korea, Republic of Mr Cheolung Cha
OF INTEREST TO THE FOLLOWING COMMITTEES: HORIZONTAL FUNCTION(S):

ASPECTS CONCERNED:
SUBMITTED FOR CENELEC PARALLEL VOTING NOT SUBMITTED FOR CENELEC PARALLEL VOTING
Attention IEC-CENELEC parallel voting
The attention of IEC National Committees, members of
CENELEC, is drawn to the fact that this Committee Draft
for Vote (CDV) is submitted for parallel voting.
The CENELEC members are invited to vote through the
CENELEC online voting system.
This document is still under study and subject to change. It should not be used for reference purposes.
Recipients of this document are invited to submit, with their comments, notification of any relevant patent rights of
which they are aware and to provide supporting documentation.
Recipients of this document are invited to submit, with their comments, notification of any relevant “In Some
Countries” clauses to be included should this proposal proceed. Recipients are reminded that the CDV stage is the
final stage for submitting ISC clauses. (SEE AC/22/2007 OR NEW GUIDANCE DOC).

TITLE:
Semiconductor devices - Mechanical and climatic test methods - Part 26: Electrostatic
discharge (ESD) sensitivity testing - Human body model (HBM)

PROPOSED STABILITY DATE: 2029
NOTE FROM TC/SC OFFICERS:
download this electronic file, to make a copy and to print out the content for the sole purpose of preparing National
Committee positions. You may not copy or "mirror" the file or printed version of the document, or any part of it, for
any other purpose without permission in writing from IEC.

IEC CDV 60749-26 © IEC 2024 – 2 – 47/2882/CDV
1 CONTENTS
2 FOREWORD . 5
3 1. Scope . 7
4 2. Normative references . 7
5 3. Terms and definitions . 7
6 4. Apparatus and required equipment . 11
7 4.1. Waveform verification equipment . 11
8 4.2. Oscilloscope . 11
9 4.3. Additional requirements for digital oscilloscopes . 12
10 4.4. Current probe . 12
11 4.5. Evaluation loads . 12
12 4.6. Attenuator . 12
13 4.7. Human body model simulator . 12
14 4.8. HBM test equipment parasitic properties . 13
15 5. Stress test equipment qualification and routine verification . 13
16 5.1. Overview of required HBM tester evaluations . 13
17 5.2. Measurement procedures . 14
18 5.2.1. Reference pin pair determination . 14
19 5.2.2. Waveform capture with current probe . 14
20 5.2.3. Determination of waveform parameters . 15
21 5.2.4. High voltage discharge path test . 18
22 5.3. HBM tester qualification . 18
23 5.3.1. HBM ESD tester qualification requirements . 18
24 5.3.2. HBM tester qualification procedure . 18
25 5.4. Test fixture board qualification for socketed testers . 19
26 5.5. Routine waveform check requirements . 20
27 5.5.1. Standard routine waveform check description . 20
28 5.5.2. Waveform check frequency . 20
29 5.5.3. Alternate routine waveform capture procedure . 21
30 5.6. High voltage discharge path check . 21
31 5.6.1. Relay testers . 21
32 5.6.2. Non-relay testers . 21
33 5.7. Tester waveform records. 21
34 5.7.1. Tester and test fixture board qualification records . 21
35 5.7.2. Periodic waveform check records . 21
36 5.8. Safety . 22
37 5.8.1. Initial set-up . 22
38 5.8.2. Training . 22
39 5.8.3. Personnel safety . 22
40 6. Classification procedure . 22
41 6.1. Devices for classification . 22
42 6.2. Parametric and functional testing . 22
43 6.3. Device stressing . 22
44 6.3.1. Device stressing methods . 22
45 6.3.2. No connect pins . 23
46 6.4. Pin combination stressing . 23
47 6.4.1. Pin combination stressing options . 23

IEC CDV 60749-26 © IEC 2024 – 3 – 47/2882/CDV
48 6.4.2. ‘No-Connect’ Pins . 24
49 6.4.3. Supply pins . 24
50 6.4.4. Non-supply pins . 25
51 6.5. Pin groupings . 25
52 6.5.1. Supply pin groups . 25
53 6.6. Pin stress combinations . 26
54 6.6.1. Pin stress combination categorization . 26
55 6.6.2. Non-supply and supply to supply combinations (1, 2, … N) . 28
56 6.6.3. Non-supply to non-supply combinations . 29
57 6.7. Pin-pair stressing . 29
58 6.8. Low-Parasitic HBM Simulator Allowance . 29
59 6.9. Testing after stressing . 30
60 7. Failure criteria . 30
61 8. Component classification . 30
62 Annex A (informative) Cloned non-supply (I/O) pin sampling test method . 31
63 A.1 Purpose and overview . 31
64 A.2 Pin sampling overview and statistical details . 31
65 A.3 IC product selections . 32
66 A.4 Randomly selecting and testing cloned I/O pins . 33
67 A.5 Determining if sampling can be used with the supplied Excel spreadsheet . 33
68 A.5.1 Using the supplied Excel spreadsheet . 33
69 A.5.2 Without using the Excel spreadsheet . 33
70 A.6 HBM testing with a sample of cloned I/O pins . 34
71 A.7 Examples of testing with sampled cloned I/Os . 34
72 Annex B (informative) Determination of withstand thresholds for pin or pin-combination
73 subsets . 37
74 B.1 Introduction . 37
75 B.2 Testing procedures . 37
76 B.3 Restrictions . 38
77 B.4 Example of using subset withstand threshold data . 38
78 Annex C (informative) HBM test equipment parasitic properties . 39
79 C.1 Optional trailing pulse detection equipment / apparatus . 39
80 C.2 Optional pre-pulse voltage rise detection test equipment . 40
81 C.3 Optional Pre-HBM Current Spike Detection Equipment . 42
82 C.4 Open-relay tester capacitance parasitics . 43
83 C.5 Test to determine if an HBM simulator is a low-parasitic simulator . 44
84 Annex D (informative) HBM test method flow chart . 46
85 Annex E (informative) Failure window detection testing methods . 49
86 E.1 Methodology . 49
87 E.2 Combined Withstand Threshold Method and Window Search . 49
88 E.3 Failure Window Detection with a Known Withstand Threshold . 49
89 Bibliography . 51
91 Figure 1 – Simplified HBM simulator circuit with loads . 13
92 Figure 2 – Current waveform through shorting wires . 16

IEC CDV 60749-26 © IEC 2024 – 4 – 47/2882/CDV
93 Figure 3 – Current waveform through a 500  resistor . 17
94 Figure 4 – Peak current short circuit ringing waveform . 18
95 Figure A.1 – SPL, V1, VM, and z with the Bell shape distribution pin failure curve . 32
96 Figure A.2 – I/O sampling test method flow chart .
...