IEC PAS 62162:2000

Field-induced charged-device model test method for electrostatic discharge withstand thresholds of microelectronic components

Describes a uniform method for establishing charged-device model (CDM) electrostatic discharge (ESD) withstand thresholds. All packages semiconductor components, thin film circuits, surface acoustic wave (SAW) components, opto-electronic components, hybrid integrated circuits (HICS), and multi-chip modules (MCMs) containing any of these components are to be evaluated according to this standard. IEC/PAS 62162 will be re-issued in the form of IEC international standard under reference IEC 60748-20.

General Information

• Status: Replaced
• Publication Date: 21-Aug-2000
• ICS: 31.080.01 - Semiconductor devices in general
• Technical Committee: TC 47 - Semiconductor devices
• Drafting Committee: WG 2 - TC 47/WG 2
• Current Stage: WPUB - Publication withdrawn
• Start Date: 03-May-2017
• Completion Date: 03-May-2017

Relations

• Replaced By: IEC 60749-28:2017 - Semiconductor devices - Mechanical and climatic test methods - Part 28: Electrostatic discharge (ESD) sensitivity testing - Charged device model (CDM) - device level
• Effective Date: 05-Sep-2023

Standards Content (Sample)

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Edition 1.0
2000-08
Field-induced charged-device model
test method for electrostatic
discharge withstand thresholds
of microelectronic components
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IN TER N A TION AL Reference number
E L E C T R OT E CHNI CA L
IEC/PAS 62162
C O MMI S S I O N
Copyright © 1995, JEDEC; 2000, IEC

INTERNATIONAL ELECTROTECHNICAL COMMISSION

____________
FIELD-INDUCED CHARGED-DEVICE MODEL TEST METHOD

FOR ELECTROSTATIC DISCHARGE WITHSTAND THRESHOLDS

OF MICROELECTRONIC COMPONENTS
FOREWORD
A PAS is a technical specification not fulfilling the requirements for a standard, but made available to the
public and established in an organization operating under given procedures.
IEC-PAS 62162 was submitted by JEDEC and has been processed by IEC technical committee 47: Semiconductor
devices.
The text of this PAS is based on the This PAS was approved for
following document: publication by the P-members of the
committee concerned as indicated in
the following document:
Draft PAS Report on voting
47/1462/PAS 47/1495/RVD
Following publication of this PAS, the technical committee or subcommittee concerned will investigate the
possibility of transforming the PAS into an International Standard.
An IEC-PAS licence of copyright and assignment of copyright has been signed by the IEC and JEDEC and is
recorded at the Central Office.
1) The IEC (International Electrotechnical Commission) is a worldwide organization for standardization comprising all
national electrotechnical committees (IEC National Committees). The object of the IEC is to promote international co-
operation on all questions concerning standardization in the electrical and electronic fields. To this end and in addition
to other activities, the IEC publishes International Standards. Their preparation is entrusted to technical committees;
any IEC National Committee interested in the subject dealt with may participate in this preparatory work. International,
governmental and non-governmental organizations liaising with the IEC also participate in this preparation. The IEC
collaborates closely with the International Organization for Standardization (ISO) in accordance with conditions
determined by agreement between the two organizations.
2) The formal decisions or agreements of the IEC on technical matters express, as nearly as possible, an international
consensus of opinion on the relevant subjects since each technical committee has representation from all interested
National Committees.
3) The documents produced have the form of recommendations for international use and are published in the form of
standards, technical specifications, technical reports or guides and they are accepted by the National Committees in
that sense.
4) In order to promote international unification, IEC National Committees undertake to apply IEC International Standards
transparently to the maximum extent possible in their national and regional standards. Any divergence between the
IEC Standard and the corresponding national or regional standard shall be clearly indicated in the latter.
5) The IEC provides no marking procedure to indicate its approval and cannot be rendered responsible for any
equipment declared to be in conformity with one of its standards.
6) Attention is drawn to the possibility that some of the elements of this PAS may be the subject of patent rights. The
IEC shall not be held responsible for identifying any or all such patent rights.
Page i
Copyright © 1995, JEDEC; 2000, IEC
JESD22–C101
page 1
TEST METHOD C101
FIELD-INDUCED CHARGED-DEVICE MODEL TEST METHOD

FOR ELECTROSTATIC DISCHARGE WITHSTAND THRESHOLDS

OF MICROELECTRONIC COMPONENTS
1. PURPOSE
This standard describes a uniform method for establishing charged-device model (CDM) electrostatic

discharge (ESD) withstand thresholds.

2. SCOPE
All packaged semiconductor components, thin film circuits, surface acoustic wave (SAW) components,
hybrid integrated circuits (HICS), and multi-chip modules (MCMs)
opto-electronic components,
containing any of these components are to be evaluated according to this standard. The test methods
described in this standard may also be used to evaluate components that are shipped as wafers or bare
chips. To perform the tests, the components must be assembled into a package similar to that expected
in the final application. The package used shall be recorded.
3. REFERENCE DOCUMENT
JEDEC Standard No. 42, “Requirements for Handling Electrostatic-Discharge-Sensitive (ESDS)
Devices.”
4. TERMS AND DEFINITIONS
Charged device model (CDM) – A specified circuit characterizing an ESD that occurs where a device
acquires charge through some tribe-electric (frictional) processes and then abruptly touches a grounded
object or surface.
Electrostatic discharge (ESD)
– A transfer of electrostatic charge between bodies at different
electrostatic potentials caused by direct contact or induced by an electrostatic field.
Field-induced charging – A charging method using electrostatic induction.
5. CIRCUIT SCHEMATIC FOR THE CDM SIMULATOR
5.1 The waveforms produced by the simulator shall meet the specifications of 6.1 through 9.
5.2 A schematic for the CDM test circuit is shown in figure 1. (Other equivalent circuits are allowed if
the generated waveform meets the requirements of 6.1 through 9.) A detachable discharge head (see

figure 1), consisting of the pogo probe, radial resistor, top ground plane, semi-rigid coaxial cable, and
oscilloscope should also have a bandwidth of at least 3 GHz.
5.3 The Field-Induced Method shall be used to raise the component potential for a subsequent CDM
discharge. The component potential is raised by applying the test voltage to the field charging electrode
shown in figure 1. The size of the charging electrode shall be larger than the size of the component and
the waveform generated shall meet the requirements in table 3.
Test Method Cl01
Copyright © 1995, JEDEC; 2000, IEC
JESD22-C101
Page2
6. SIMULATOR WAVEFORM VERIFICATION

6.1 The three levels of CDM simulator verification tests are:

l Manufacturer Qualification
. User Verification
l Routine Verification
The tests are described in table 1:

TABLE 1 WAVEFORM VERIFICATION TESTS 1

Routine Manufacturer Qualification

Verification
and User Verification
Record of waveforms required yes yes
8.1 check yes yes
9. Tests
#1 #1, #2, #3
6.2 Manufacturer Qualification –
must be done by the manufacturer when the simulator is installed.
High-speed instrumentation must be used, including an oscilloscope with a 1 GHz single-shot
bandwidth. All three qualification tests of section 9 are required, and the test waveforms must be
permanently recorded with copies supplied to the user when requested.
6.3 User Verification – done during initial acceptance testing, whenever the equipment is serviced, and
on a regular basis at least once per month.
The same tests ar
...