Test methods for electrical materials, printed boards and other interconnection structures and assemblies - Part 3-913: Test methods for interconnection structures (printed boards) - Electronic circuit board for high-brightness LEDs

IEC/PAS 61189-3-913:2011(E) specifies the test methods of the electronic circuit board for high-brightness LEDs.

General Information

Status
Replaced
Publication Date
30-Jan-2011
Drafting Committee
Current Stage
DELPUB - Deleted Publication
Completion Date
05-Jan-2016
Ref Project

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IEC PAS 61189-3-913:2011 - Test methods for electrical materials, printed boards and other interconnection structures and assemblies - Part 3-913: Test methods for interconnection structures (printed boards) - Electronic circuit board for high-brightness LEDs Released:1/31/2011
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IEC/PAS 61189-3-913


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Edition 1.0 2011-01



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SPECIFICATION



PRE-STANDARD
colour
inside

Test methods for electrical materials, printed boards and other interconnection
structures and assemblies –
Part 3-913: Test methods for interconnection structures (printed boards) –
Electronic circuit board for high-brightness LEDs




IEC/PAS 61189-3-913:2011(E)

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THIS PUBLICATION IS COPYRIGHT PROTECTED

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IEC/PAS 61189-3-913


®


Edition 1.0 2011-01



PUBLICLY AVAILABLE



SPECIFICATION




PRE-STANDARD
colour
inside

Test methods for electrical materials, printed boards and other interconnection
structures and assemblies –
Part 3-913: Test methods for interconnection structures (printed boards) –
Electronic circuit board for high-brightness LEDs



INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
PRICE CODE
X
ICS 31.180 ISBN 978-2-88912-343-8
® Registered trademark of the International Electrotechnical Commission

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– 2 – PAS 61189-3-913  IEC:2011(E)



CONTENTS

FOREWORD . 5


1 Scope . 7

2 Terms and definitions . 7

3 Test conditions . 7


3.1 Standard condition. 7

3.2 Specified condition . 7

4 Specimen . 7

4.1 Preparation of specimen . 7
4.2 Test pattern . 7
5 Pre-conditioning . 8
6 Appearance, micro-sectioning and dimensions . 8
6.3 Dimension . 8
6.3.1 Appearance . 8
6.3.2 Thickness . 8
6.3.3 (Through-) Hole diameter . 8
6.3.4 Hole position . 8
6.3.5 Conductor width and minimum conductor spacing . 9
6.3.6 Conductor nick and extraneous copper . 9
6.3.7 Land . 9
6.3.8 Land width . 9
6.3.9 Flatness . 9
7 Electrical tests . 10
7.1 Conductor resistance . 10
7.1.1 Conductor . 10
7.1.2 Plated through-hole . 10
7.1.3 Interconnection . 11
7.2 Current tolerance of conductor (when specified in a detailed specification) . 11
7.3 Current tolerance of plated through-hole . 11
7.4 Withstanding voltage of surface layer . 12
7.5 Interlayer withstanding voltage . 12
7.6 Insulation resistance of surface layer (normal and resistance to humidity
(temperature-humidity cycle and steady state)) . 12

7.7 Insulation resistance of inner layer (normal and resistance to humidity
(temperature-humidity cycle and steady state)) . 13
7.8 Insulation resistance between inner layers (normal and resistance to humidity
(temperature-humidity cycle and steady state)) . 13
7.9 Electric integrity . 13
7.9.1 Circuit insulation . 13
7.9.2 Conduction . 13
8 Mechanical tests . 13
8.1 Peel strength of conductor . 13
8.2 Peeling strength of a land with non-plated hole . 14
8.3 Peeling strength of plated through-hole . 14
8.4 Peeling strength of foot print . 15
8.5 Adhesivity of plated film . 15
8.6 Adhesivity of solder resist and symbol mark . 15

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PAS 61189-3-913  IEC:2011(E) – 3 –


8.6.1 Tape peeling strength . 15

8.6.2 Grid line test (see JIS K 5600, 5 and 6). 16

8.6.3 Scratch test using pencil . 16

8.7 Resistance to bending . 17

9 Environmental tests . 18

9.1 Temperature cycle . 18

9.2 Thermal shock (low and high temperatures) (see JIS C 0025) . 18

9.3 Thermal shock (immersion in high temperature) . 19

9.4 Resistance to humidity (temperature/humidity cycle) (see JIS C 60068-2-78) . 19


9.5 Resistance to humidity (steady state) (see JIS C 60068-2-78) . 20
10 Other tests . 20
10.1 Flammability. 20
10.2 Resistance to chemical solvent . 21
10.3 Solderability . 21
10.4 Resistance to soldering heat . 22
10.4.1 Solder float method . 22
10.4.2 Reflow soldering . 22
10.5 Resistance to heat of solder resist and symbol mark . 22
10.5.1 Solder floating method . 22
10.5.2 Reflow soldering method . 23
10.6 Thermal conductivity. 23
10.6.1 Measurement of thermal resistance on the plane . 23
10.6.2 Thermal conductivity in the direction of thickness . 24
10.7 Reflectivity . 25
10.8 Wire bond strength . 25
11 Normative references . 25
Annex A (informative) Figures . 27
Annex B (informative) Reflectivity . 46
Annex C (informative) Connection strength of wire bonding . 47
Annex D (informative) Additional information to IEC/PAS 61189-3-913 . 48
Bibliography . 49

Figure 1 – Land width . 9
Figure 2 – Warpage . 10

Figure 3 – Twist . 10
Figure 4 – Electrode arrangement for resistance measurement . 10
Figure 5 – Electrode arrangement for resistance measurement of a plated through-hole . 11
Figure 6 – Electrode arrangement for resistance measurement of interconnection
measurement . 11
Figure 7 – An example of cutter knife blade (mm) . 16
Figure 8 – Use of a cutter knife . 16
Figure 9 – Use of a pencil . 17
Figure 10 – An example of bending machine . 18
Figure 11 – Flammability test (mm) . 21
Figure A.1a – Composite test pattern for single- and double-sided electronic board (front
surface) . 28

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– 4 – PAS 61189-3-913  IEC:2011(E)


Figure A.1b – Composite test pattern for double-sided electronic board (back surface) . 29

Figure A.1 – Composite test pattern . 29


Figure A.2.1 – Complex test patterns of multi-layer electronics board (perspective) . 31

Figure A.2.2a – Electrode patterns of each specimen (Part 1) . 32

Figure A.2.2b – Electrode patterns of each specimen (Part 2) . 33


Figure A.2.2c – Electrode patterns of each specimen (Part 3) . 34

Figure A.2.2d – Electrode patterns of each specimen (Part 4) . 35

Figure A.2.2e – Electrode patterns of each specimen (Part 5) . 36


Figure A.2.2f – Electrode patterns of each specimen (Part 6) . 37
Figure A.2.2g – Electrode patterns of each specimen (Part 7) . 38
Figure A.2.2 – Electrode pattern of each specimen . 38
Figure A.3 – Temperature rise according to conductor thickness, width and current . 39
Figure A.4a – Insulation resistance (normal, resistance to
humidity-temperature/humidity cycle and steady state) . 40
Figure A.4b – Insulation resistance of inner layers (normal, resistance to
humidity-temperature/humidity cycle and steady state) . 40
Figure A.4c – Insulation resistance between inner layers (normal, resistance to
humidity-temperature/humidity cycle and steady state) . 41
Figure A.4 – Insulation resistance . 41
Figure A.5 – Specimen for resistance to bending test . 41
Figure A.6 – Temperature – humidity cycle . 42
Figure A.7 – Test pattern for resistance to soldering heat test (for information only) . 43
Figure A.8 – Temperature profile of reflow furnace (for information only) . 43
Figure A.9 – Illustration of thermal conductivity test (for information). Arrange the
heating TEG (test equipment group) to the center of the cabinet . 44
Figure A.10 – Surface layer specimen pattern for thermal conductivity test . 44
Figure A.11 – Test equipment for thermal resistance to the thickness direction . 45

Table 1 – Examples of test current . 12
Table 2 – Land, hole and lead wire . 14
Table 3 – Temperature cycle conditions . 18
Table 4 – Thermal shock conditions . 19

Table 5 – Test condition . 19
Table 6 – Heating of specimen . 24
Table 7 – Heating of specimen . 25

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PAS 61189-3-913  IEC:2011(E) – 5 –


INTERNATIONAL ELECTROTECHNICAL COMMISSION

____________



TEST METHODS FOR ELECTRICAL MATERIALS, PRINTED BOARDS

AND OTHER INTERCONNECTION STRUCTURES AND ASSEMBLIES –



Part 3-913: Test methods for interconnection structures (printed boards) –

Electronic circuit board for high-brightness LEDs





FOREWORD
1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising
all national electrotechnical committees (IEC National Committees). The object of IEC is to promote international
co-operation on all questions concerning standardization in the electrical and electronic fields. To this end and in
addition to other activities, IEC publishes International Standards, Technical Specifications, Technical Reports,
Publicly Available Specifications (PAS) and Guides (hereafter referred to as “IEC Publication(s)”). Their
preparation is entrusted to technical committees; any IEC National Committee interested in the subject dealt with
may participate in this preparatory work. International, governmental and non-governmental organizations liaising
with the IEC also participate in this preparation. IEC collaborates closely with the International Organization for
Standardization (ISO) in accordance with conditions determined by agreement between the two organizations.
2) The formal decisions or agreements of IEC on technical matters express, as nearly as possible, an international
consensus of opinion on the relevant subjects since each technical committee has representation from all
interested IEC National Committees.
3) IEC Publications have the form of recommendations for international use and are accepted by IEC National
Committees in that sense. While all reasonable efforts are made to ensure that the technical content of IEC
Publications is accurate, IEC cannot be held responsible for the way in which they are used or for any
misinterpretation by any end user.
4) In order to promote international uniformity, IEC National Committees undertake to apply IEC Publications
transparently to the maximum extent possible in their national and regional publications. Any divergence between
any IEC Publication and the corresponding national or regional publication shall be clearly indicated in the latter.
5) IEC itself does not provide any attestation of conformity. Independent certification bodies provide conformity
assessment services and, in some areas, access to IEC marks of conformity. IEC is not responsible for any
services carried out by independent certification bodies.
6) All users should ensure that they have the latest edition of this publication.
7) No liability shall attach to IEC or its directors, employees, servants or agents including individual experts and
members of its technical committees and IEC National Committees for any personal injury, property damage or
other damage of any nature whatsoever, whether direct or indirect, or for costs (including legal fees) and expenses
arising out of the publication, use of, or reliance upon, this IEC Publication or any other IEC Publications.
8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is
indispensable for the correct application of this publication.
9) Attention is drawn to the possibility that some of the elements of this IEC Publication may be the subject of patent
rights. IEC shall not be held responsible for identifying any or all such patent rights.
A PAS is a technical specification not fulfilling the requirements for a standard, but made

available to the public.
IEC-PAS 61189-3-913 was submitted by the JPCA (Japan Electronics Packaging and Circuits
Association) and has been processed by IEC technical committee 91: Electronics assembly
technology.

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– 6 – PAS 61189-3-913 © IEC:2011(E)


It is based on JPCA-TMC-LED02T-2010. It is published as a double-logo IEC/ JPCA PAS.

The text of this PAS is based on the This PAS was approved for publication by

following document: the P-members of the committee concerned

as indicated in the following document

Draft PAS Report on voting


91/928/PAS 91/943A/RVD




Following publication of this PAS, which is a pre-standard publication, the technical committee
or subcommittee concerned may transform it into an International Standard.
This PAS shall remain valid for an initial maximum period of 3 years starting from the publication
date. The validity may be extended for a single period up to a maximum of 3 years, at the end of
which it shall be published as another type of normative document, or shall be withdrawn.
A list of all the parts in the IEC 61189 series, under the general title Test methods for electrical
materials, printed boards and other interconnection structures and assemblies, can be found on
the IEC website.

IMPORTANT – The 'colour inside' logo on the cover page of this publication indicates
that it contains colours which are considered to be useful for the correct understanding
of its contents. Users should therefore print this document using a colour printer.

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PAS 61189-3-913  IEC:2011(E) – 7 –


TEST METHODS FOR ELECTRICAL MATERIALS, PRINTED BOARDS

AND OTHER INTERCONNECTION STRUCTURES AND ASSEMBLIES –



Part 3-913: Test methods for interconnection structures (printed boards) –

Electronic circuit board for high-brightness LEDs








1 Scope

This standard specifies the test methods of the electronic circuit board for high-brightness LEDs
(hereafter described as electronic circuit board).
NOTE Reference documents to this standard are listed in Clause 11 Normative references and in the Bibliography.
2 Terms and definitions
For the purpose of this document, the terms used in this PAS shall be in accordance with
JPCA-TD01, JIS C 60068-1 and JIC C 5603.
3 Test conditions
3.1 Standard condition
Tests shall be made unless otherwise specified in a specific standard under the standard
condition specified in JIS C 60068-1, 5.3.1, Standard atmospheric condition (standard
o o
condition), temperature of 15 C to 35 C, relative humidity of 25 % to 75 % and atmospheric
pressure of 86 kPa to 106 kPa. Condition specified in 3.1 shall be used in case there is any doubt
to the experimental results or in case required by a specific standard.
3.2 Specified condition
The specified condition as specified in JIS C 60068-1, 5.2, Standard atmospheric condition
o o
(specified condition), is a temperature of 20 C ± 2 C, a relative humidity of 60 % to 70 % and an
atmospheric pressure of 86 kPa to 106 kPa.
4 Specimen

4.1 Preparation of specimen
Specimen shall be prepared as in (1) or (2) below. The surface of a specimen shall not be
contaminated by oil/grease, sweat and others.
1) Specimen by sampling: the specimen shall be sampled from the electronic circuit boards to
be used in production. The specimen shall be cut to the defined size if its shape and size are
defined in a specific standard. A test coupon may used as the specimen when such coupons
are prepared.
2) Specimen using a test pattern: a specimen shall be prepared using the test pattern shown in
4.2 using the same materials and method to produce products.
4.2 Test pattern
The test pattern with the shape and dimension shown in Figures A.1 and A.2 shall be used
depending on the type of the electronic circuit board.

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– 8 – PAS 61189-3-913  IEC:2011(E)


5 Pre-conditioning


Pre-conditioning described in (1) or (2) below shall be made in accordance to the specific

standard.


1) Leave a specimen for 24 h in the standard condition.

o
2) Leave a specimen for 60 min in a thermostat chamber at 85 C and then leave the specimen

for 24 h ± 4 h in the standard atmospheric condition.


6 Appearance, micro-sectioning and dimensions


6.1 Appearance
Appearance check shall be made by naked eyes or using a magnifying glass for appearance of
the specimen, finish and conductor pattern according to its detailed specification. Use a
micrograph of 250X to check a micro-section of a specimen by cutting it and polishing the cutting
face of a specimen embe
...

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