IEC 61189-3-913:2016

Test methods for electrical materials, printed boards and other interconnection structures and assemblies - Part 3-913: Test method for thermal conductivity of electronic circuit boards for high-brightness LEDs

IEC 61189-3-913:2016 specifies the test methods for thermal conductivity specific to printed circuit boards for high-brightness LEDs. The test applies to printed circuit boards for high-brightness LEDs with surface mounted LEDs or with device embedded LEDs in electronic control devices (ECDs). This first edition cancels and replaces the first edition of IEC PAS 61189-3-913 published in 2011. This edition constitutes a technical revision. This edition focused only on the test methods for thermal conductivity specific to printed circuit boards for high-brightness LEDs.

Méthodes d'essai pour les matériaux électriques, les cartes imprimées et autres structures d'interconnexion et ensembles - Partie 3-913: Méthodes d'essais pour la conductivité thermique des circuits imprimés pour les LED à forte luminosité

L'IEC 61189-3-913:2016 spécifie les méthodes d'essai relatives à la conductivité thermique spécifique aux circuits imprimés des LED à forte luminosité. L'essai est applicable aux circuits imprimés pour les LED à forte luminosité, les LED pour montage en surface ou les LED intégrées à un appareil dans des dispositifs de commande électroniques (ECD, Electronic Control Device). Cette première édition annule et remplace la première édition de l'IEC PAS 61189-3-913 parue en 2011. Cette édition constitue une révision technique. Cette édition est consacrée uniquement aux méthodes d essai relatives à la conductivité thermique spécifique aux circuits imprimés des LED à forte luminosité.

Aluminium-magnesium-silicon alloy wire for overhead line conductors

General Information

• Status: Published
• Publication Date: 04-Jan-2016
• ICS: 29.060.10 - Wires
• ICS: 29.240.20 - Power transmission and distribution lines
• ICS: 31.180 - Printed circuits and boards
• Technical Committee: TC 91 - Electronics assembly technology
• Drafting Committee: WG 10 - TC 91/WG 10
• Current Stage: PPUB - Publication issued
• Start Date: 15-Jan-2016
• Completion Date: 05-Jan-2016
• Ref Project: SIST IEC 60104:1999 - Aluminium-magnesium-silicon alloy wire for overhead line conductors

Relations

• Replaces: IEC PAS 61189-3-913:2011 - Test methods for electrical materials, printed boards and other interconnection structures and assemblies - Part 3-913: Test methods for interconnection structures (printed boards) - Electronic circuit board for high-brightness LEDs
• Effective Date: 05-Sep-2023

Standards Content (Sample)

SLOVENSKI STANDARD
01-november-1999
Aluminium-magnesium-silicon alloy wire for overhead line conductors
Aluminium-magnesium-silicon alloy wire for overhead line conductors
Fils en alliage d'aluminium-magnésium-silicium pour conducteurs de lignes aériennes
Ta slovenski standard je istoveten z: IEC 60104
ICS:
29.060.10 Žice Wires
29.240.20 Daljnovodi Power transmission and
distribution lines
2003-01.Slovenski inštitut za standardizacijo. Razmnoževanje celote ali delov tega standarda ni dovoljeno.

NORME CEI
INTERNATIONALE IEC
INTERNATIONAL
Deuxième édition
STAN DARD
Second edition
1987-12
Fils en alliage d'aluminium-magnésium-silicium
pour conducteurs de lignes aériennes
Aluminium-magnesium-silicon alloy wire
for overhead line conductors
© IEC 1987
Droits de reproduction réservés —
Copyright - all rights reserved
Aucune partie de
cette publication ne peut être reproduite ni No part of this publication may be reproduced or utilized in
utilisée quelque
sous forme que ce soit et par aucun any form or by any means, electronic or mechanical,
procédé, électronique ou mécanique, y compris la photo- including photocopying and microfilm, without permission in
copie et les microfilms, sans l'accord écrit de l'éditeur. writing from the publisher.
International Electrotechnical Commission 3, rue de Varembé Geneva, Switzerland
Telefax: [phone] e-mail: [e-mail] IEC web site http: //www.iec.ch
CODE PRIX
Commission Electrotechnique Internationale
F
PRICE CODE
International Electrotechnical Commission
IEC MemitiviapoAHaR 3neKTpOTexHN4eCHÜN KOMHCC1111
Pour prix, voir catalogue en vigueur
• • For price, see current catalogue

104 © IEC 1987 –3 –
INTERNATIONAL ELECTROTECHNICAL COMMISSION
ALUMINIUM-MAGNESIUM-SILICON ALLOY WIRE
FOR OVERHEAD LINE CONDUCTORS
FOREWORD
1) The formal decisions or agreements of the I E C on technical matters, prepared by Technical Committees on which all the
National Committees having a special interest therein are represented, express, as nearly as possible, an international
consensus of opinion on the subjects dealt with.
2)
They have the form of recommendations for international use and they are accepted by the National Committees in that sense.
3) fi
In order to promote international uni cation, the I E C expresses the wish that all National Committees should adopt the text
of the I E C recommendation for their national rules in so far as national conditions will permit. Any divergence between the
I E C recommendation and the corresponding national rules should, as far as possible, be clearly indicated in the latter.
PREFACE
This standard has been prepared by I E C Technical Committee No. 7 : Bare Aluminium Conductors.
This second edition of I E C Publication 104 replaces the first edition, which was issued in 1958.
This standard replaces Clauses 3, 5, 6 and 13, and the requirements of Clauses 4 and 12 and Sub-
clause 8.1 of I E C Publication 208 (1966) : Aluminium Alloy Stranded Conductors (Aluminium-
Magnesium-Silicon Type). It also replaces Clauses 3, 6, 15, Sub-clause 7.1 and the requirements of
Clause 5, Sub-clauses 9.1, 13.2 and 13.3 of IEC Publication 210 (1966) : Aluminium Alloy
Conductors, Steel-reinforced.
The text of this standard is based on the following documents:
Six Months' Rule Report on Voting
7(CO)420 7(CO)423
Further information can be found in the Report on Voting indicated in the table above.
The following !EC publication is quoted in this standard:
Publication No. 468 (1974): Method of Measurement of Resistivity of Metallic Materials.
Other publications quoted:
ISO Standard 6892 (1984) : Metallic Materials – Tensile Testing.
ISO Standard 7802 (1983): Metallic Materials – Wire-Wrapping Test.

104 © I E C – 5
ALUMINIUM-MAGNESIUM-SILICON ALLOY WIRE
FOR OVERHEAD LINE CONDUCTORS
1. Scope
This standard is applicable to aluminium-magnesium-silicon alloy wires of two types having
different mechanical and electrical properties for the manufacture of stranded conductors for
overhead power transmission purposes. It specifies the mechanical and electrical properties of
wires in the diameter range 1.50 mm to 4.50 mm.
The two types are designated Type A and Type B respectively.
Values for alumini
...

IEC 61189-3-913 ®
Edition 1.0 2016-01
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
colour
inside
Test methods for electrical materials, printed boards and other interconnection
structures and assemblies –
Part 3-913: Test method for thermal conductivity of printed circuit boards for
high-brightness LEDs
Méthodes d'essai pour les matériaux électriques, les cartes imprimées et autres
structures d'interconnexion et ensembles –
Partie 3-913: Méthodes d'essai pour la conductivité thermique des circuits
imprimés pour les LED à forte luminosité

All rights reserved. Unless otherwise specified, no part of this publication may be reproduced or utilized in any form
or by any means, electronic or mechanical, including photocopying and microfilm, without permission in writing from
either IEC or IEC's member National Committee in the country of the requester. If you have any questions about IEC
copyright or have an enquiry about obtaining additional rights to this publication, please contact the address below or
your local IEC member National Committee for further information.

Droits de reproduction réservés. Sauf indication contraire, aucune partie de cette publication ne peut être reproduite
ni utilisée sous quelque forme que ce soit et par aucun procédé, électronique ou mécanique, y compris la photocopie
et les microfilms, sans l'accord écrit de l'IEC ou du Comité national de l'IEC du pays du demandeur. Si vous avez des
questions sur le copyright de l'IEC ou si vous désirez obtenir des droits supplémentaires sur cette publication, utilisez
les coordonnées ci-après ou contactez le Comité national de l'IEC de votre pays de résidence.

IEC Central Office Tel.: [phone]
3, rue de Varembé Fax: [phone]
CH-1211 Geneva 20 [e-mail]
Switzerland www.iec.ch
About the IEC
The International Electrotechnical Commission (IEC) is the leading global organization that prepares and publishes
International Standards for all electrical, electronic and related technologies.

About IEC publications
The technical content of IEC publications is kept under constant review by the IEC. Please make sure that you have the
latest edition, a corrigenda or an amendment might have been published.

IEC Catalogue - webstore.iec.ch/catalogue Electropedia - www.electropedia.org
The stand-alone application for consulting the entire The world's leading online dictionary of electronic and
bibliographical information on IEC International Standards, electrical terms containing 20 000 terms and definitions in
Technical Specifications, Technical Reports and other English and French, with equivalent terms in 15 additional
documents. Available for PC, Mac OS, Android Tablets and languages. Also known as the International Electrotechnical
iPad. Vocabulary (IEV) online.

IEC publications search - www.iec.ch/searchpub IEC Glossary - std.iec.ch/glossary
The advanced search enables to find IEC publications by a 65 000 electrotechnical terminology entries in English and
variety of criteria (reference number, text, technical French extracted from the Terms and Definitions clause of
committee,…). It also gives information on projects, replaced IEC publications issued since 2002. Some entries have been
and withdrawn publications. collected from earlier publications of IEC TC 37, 77, 86 and

CISPR.
IEC Just Published - webstore.iec.ch/justpublished
Stay up to date on all new IEC publications. Just Published IEC Customer Service Centre - webstore.iec.ch/csc
details all new publications released. Available online and If you wish to give us your feedback on this publication or
also once a month by email. need further assistance, please contact the Customer Service
Centre: [e-mail].
A propos de l'IEC
La Commission Electrotechnique Internationale (IEC) est la première organisation mondiale qui élabore et publie des
Normes internationales pour tout ce qui a trait à l'électricité, à l'électronique et aux technologies apparentées.

A propos des publications IEC
Le contenu technique des publications IEC est constamment revu. Veuillez vous assurer que vous possédez l’édition la
plus récente, un corrigendum ou amendement peut avoir été publié.

Catalogue IEC - webstore.iec.ch/catalogue Electropedia - www.electropedia.org
Application autonome pour consulter tous les renseignements
Le premier dictionnaire en ligne de termes électroniques et
bibliographiques sur les Normes internationales,
électriques. Il contient 20 000 termes et définitions en anglais
Spécifications techniques, Rapports techniques et autres
et en français, ainsi que les termes équivalents dans 15
documents de l'IEC. Disponible pour PC, Mac OS, tablettes
langues additionnelles. Egalement appelé Vocabulaire
Android et iPad.
Electrotechnique International (IEV) en ligne.

Recherche de publications IEC - www.iec.ch/searchpub
Glossaire IEC - std.iec.ch/glossary
65 000 entrées terminologiques électrotechniques, en anglais
La recherche avancée permet de trouver des publications IEC
en utilisant différents critères (numéro de référence, texte, et en français, extraites des articles Termes et Définitions des
comité d’études,…). Elle donne aussi des informations sur les publications IEC parues depuis 2002. Plus certaines entrées
projets et les publications remplacées ou retirées. antérieures extraites des publications des CE 37, 77, 86 et

CISPR de l'IEC.
IEC Just Published - webstore.iec.ch/justpublished

Service Clients - webstore.iec.ch/csc
Restez informé sur les nouvelles publications IEC. Just
Published détaille les nouvelles publications parues. Si vous désirez nous donner des commentaires sur cette
Disponible en ligne et aussi une fois par mois par email. publication ou si vous avez des questions contactez-nous:
[e-mail].
IEC 61189-3-913 ®
Edition 1.0 2016-01
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
colour
inside
Test methods for electrical materials, printed boards and other interconnection

structures and assemblies –
Part 3-913: Test method for thermal conductivity of printed circuit boards for

high-brightness LEDs
Méthodes d'essai pour les matériaux électriques, les cartes imprimées et autres

structures d'interconnexion et ensembles –

Partie 3-913: Méthodes d'essai pour la conductivité thermique des circuits

imprimés pour les LED à forte luminosité

INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
COMMISSION
ELECTROTECHNIQUE
INTERNATIONALE
ICS 31.180 ISBN 978-2-8322-3104-3

– 2 – IEC 61189-3-913:2016 © IEC 2016
CONTENTS
FOREWORD . 4
1 Scope . 6
2 Normative references . 6
3 Terms and definitions . 6
4 Pre–conditioning . 6
5 Test methods . 6
5.1 General . 6
5.2 Thermal conductivity . 6
5.2.1 Measurement of thermal resistance on the plane . 6
5.2.2 Measurement of thermal resistance across the thickness . 8
Annex A (normative) Boards and panels . 13
A.1 Panel and board sizes . 13
A.1.1 Board size . 13
A.1.2 Allowance of dimensions . 13
A.1.3 Perforation and slit . 14
A.1.4 V-cut. 14
A.2 Total board thickness . 15
A.3 Holes . 16
A.3.1 Insertion holes and vias . 16
A.3.2 Datum hole . 19
A.3.3 Assembly hole (through-hole without wall plating) . 19
A.4 Conductor . 19
A.4.1 Width of conductor pattern and its allowance . 19
A.4.2 Distance between conductors and its allowance . 20
A.4.3 Thickness of the insulating layer . 21
A.5 Printed contact . 21
A.5.1 Allowance of the distance between the centers of two adjacent printed
contacts . 21
A.5.2 Allowance of the terminal width of printed contacts . 22
A.5.3 Shift of the center of printed contacts on the front and back sides of a
board . 22
A.6 Land pattern . 23
A.6.1 Allowance of the distance between the centers of two lands . 23
A.6.2 Allowance of a land width . 23
A.6.3 Land diameter and its allowance for BGA/CSP . 24
A.7 Fiducial mark and mark for component positioning . 25
A.7.1 Typical form and size of the fiducial mark . 25
A.7.2 Dimensional allowance of fiducial mark and component positioning mark . 26
A.7.3 Position allowance of the component positioning mark. 26
A.8 Interlayer connection – Copper plating . 26
Annex B (normative) Equilibrium test . 27
Bibliography . 28

Figure 1 – Illustration of an apparatus for the thermal conductivity test . 10
Figure 2 – Surface layer specimen pattern for thermal conductivity test . 11
Figure 3 – Test equipment for thermal resistance to the thickness direction . 12

Figure A.1 – Board arrangement in a panel . 13
Figure A.2 – Distances from the datum point to perforation and slit . 14
Figure A.3 – Distance from the datum point to the V-cut . 15
Figure A.4 – Allowance of position off-set of V-cuts on front and back surfaces . 15
Figure A.5 – PWB board with symbol mark, solder resist, copper foil and plating . 16
Figure A.6 – Positions of component insertion holes . 17
Figure A.7 – Distance between the wall of a hole and the board edge . 18
Figure A.8 – Wall of a hole and the minimum designed spacing to the inner conductor . 19
Figure A.9 – Width of finished conductor . 20
Figure A.10 – Distance between conductor and board edge . 21
Figure A.11 – Thickness of the insulating layer . 21
Figure A.12 – Distance between centers of terminals of printed contacts . 22
Figure A.13 – Terminal width of a printed contact . 22
Figure A.14 – Shift of the center of printed contacts on front and back sides of a board . 23
Figure A.15 – Land pattern . 23
Figure A.16 – Land width of a land pattern . 24
Figure A.17 – Land diameter of BGA/CSP formed of a conductor only . 24
Figure A.18 – Land diameter (d) of BGA/CSP formed at the opening of solder resist . 25
Figure A.19 – Examples of fiducial mark and component positioning mark . 26

Table 1 – Applied power (P) that corresponds to a range of thermal resistance
on the plane . 8
Table 2 – Applied power (P) that corresponds to a range of thermal resistance

across the thickness (K/W) . 9
Table A.1 – Panel dimensions . 13
Table A.2 – Allowance of dimensions . 14
Table A.3 – Allowance of the distances from the datum point to perforation and slit . 14
Table A.4 – Allowance of the distance from the datum point to the center of the V-cut . 15
Table A.5 – Total thickness and its allowance . 16
Table A.6 – Allowance of holes for component insertion. 16
Table A.7 – Position allowance of component insertion holes . 17
Table A.8 – Distance between the wall of a hole and board edge . 18
Table A.9 – Minimum clearance between the wall of a hole and the inner layer
conductor . 18
Table A.10 – Allowance of conductor width . 20
Table A.11 – Allowance of the distance between conductors . 20
Table A.12 – Allowance of terminal width of a printed contact . 22
Table A.13 – Allowance of terminal width of a printed contact . 23
Table A.14 – Allowance of the width of a land of a land pattern . 24
Table A.15 – Land diameter and its allowance for BGA/CSP . 25
Table A.16 – Allowance of the land diameter (d) of BGA/CSP formed at the opening of
solder resist . 25
Table A.17 – Shapes and sizes of typical fiducial marks and component positioning

marks . 26
Table A.18 – Minimum thickness of copper plating . 26

– 4 – IEC 61189-3-913:2016 © IEC 2016
INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________
TEST METHODS FOR ELECTRICAL MATERIALS, PRINTED BOARDS AND
OTHER INTERCONNECTION STRUCTURES AND ASSEMBLIES –

Part 3-913: Test method for thermal conductivity of printed
circuit boards for high-brightness LEDs

FOREWORD
1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising
all national electrotechnical committees (IEC National Committees). The object of IEC is to promote
international co-operation on all questions concerning standardization in the electrical and electronic fields. To
this end and in addition to other activities, IEC publishes International Standards, Technical Specifications,
Technical Reports, Publicly Available Specifications (PAS) and Guides (hereafter referred to as “IEC
Publication(s)”). Their preparation is entrusted to technical committees; any IEC National Committee interested
in the subject dealt with may participate in this preparatory work. International, governmental and non-
governmental organizations liaising with the IEC also participate in this preparation. IEC collaborates closely
with the International Organization for Standardization (ISO) in accordance with conditions determined by
agreement between the two organizations.
2) The formal decisions or agreements of IEC on technical matters express, as nearly as possible, an international
consensus of opinion on the relevant subjects since each technical committee has representation from all
interested IEC National Committees.
3) IEC Publications have the form of recommendations for international use and are accepted by IEC National
Committees in that sense. While all reasonable efforts are made to ensure that the technical content of IEC
Publications is accurate, IEC cannot be held responsible for the way in which they are used or for any
misinterpretation by any end user.
4) In order to promote international uniformity, IEC National Committees undertake to apply IEC Publications
transparently to the maximum extent possible in their national and regional publications. Any divergence
between any IEC Publication and the corresponding national or regional publication shall be clearly indicated in
the latter.
5) IEC itself does not provide any attestation of conformity. Independent certification bodies provide conformity
assessment services and, in some areas, access to IEC marks of conformity. IEC is not responsible for any
services carried out by independent certification bodies.
6) All users should ensure that they have the latest edition of this publication.
7) No liability shall attach to IEC or its directors, employees, servants or agents including individual experts and
members of its technical committees and IEC National Committees for any personal injury, property damage or
other damage of any nature whatsoever, whether direct or indirect, or for costs (including legal fees) and
expenses arising out of the publication, use of, or reliance upon, this IEC Publication or any other IEC
Publications.
8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is
indispensable for the correct application of this publication.
9) Attention is drawn to the possibility that some of the elements of this IEC Publication may be the subject of
patent rights. IEC shall not be held responsible for identifying any or all such patent rights.
International Standard IEC 61189-3-913 has been prepared by IEC technical committee 91:
Electronics assembly technology.
This first edition cancels and replaces the first edition of IEC PAS 61189-3-913 published in
2011. This edition constitutes a technical revision. This edition focused only on the test
methods for thermal conductivity specific to printed circuit boards for high-brightness LEDs.
The text of this standard is based on the following documents:
FDIS Report on voting
91/1304A/FDIS 91/1328/RVD
Full information on the voting for the approval of this standard can be found in the report on
voting indicated in the above table.

A list of all parts in the IEC 61189, published under the general title Test methods for
electrical materials, printed boards and other interconnection structures and assemblies, can
be found on the IEC website.
This publication has been drafted in accordance with the ISO/IEC Directives, Part 2.
The committee has decided that the contents of this publication will remain unchanged until
the stability date indicated on the IEC website under "http://webstore.iec.ch" in the data
related to the specific publication. At this date, the publication will be
• reconfirmed,
• withdrawn,
• replaced by a revised edition, or
• amended.
IMPORTANT – The 'colour inside' logo on the cover page of this publication indicates
that it contains colours which are considered to be useful for the correct
understanding of its contents. Users should therefore print this document using a
colour printer.
– 6 – IEC 61189-3-913:2016 © IEC 2016
TEST METHODS FOR ELECTRICAL MATERIALS, PRINTED BOARDS AND
OTHER INTERCONNECTION STRUCTURES AND ASSEMBLIES –

Part 3-913: Test method for thermal conductivity of printed
circuit boards for high-brightness LEDs

1 Scope
This part of IEC 61189 specifies the test methods for thermal conductivity specific to printed
circuit boards for high-brightness LEDs. The test applies to printed circuit boards for high-
brightness LEDs with surface mounted LEDs or with device embedded LEDs in electronic
control devices (ECDs).
2 Normative references
The following documents, in whole or in part, are normatively referenced in this document and
are indispensable for its application. For dated references, only the edition cited applies. For
undated references, the latest edition of the referenced document (including any
amendments) applies.
IEC 60194, Printed board design, manufacture and assembly – Terms and definitions
IEC 62326-20, Printed boards – Part 20: Printed circuit boards for high-brightness LEDs
3 Terms and definitions
For the purposes of this document, the terms and definitions given in IEC 60194 apply, unless
otherwise specified.
4 Pre–conditioning
Pre-conditioning described in a) or b) below shall be carried out in accordance with the
specific standard.
a) Leave a specimen for 24 h in the standard condition.
b) Leave a specimen for 60 min in a thermostat chamber at 85 °C and then leave the
specimen for 24 ± 4 h in the standard atmospheric condition.
5 Test methods
5.1 General
In this standard, the following test methods are specified in order to classing the printed
circuit board in accordance with Table 1 in IEC 62326-20.
5.2 Thermal conductivity
5.2.1 Measurement of thermal resistance on the plane
In this subclause, the measurement of thermal resistance on the plane (horizontal direction of
the specimen) is addressed as follows.

a) Apparatus
Use the apparatus specified in EIA/JEDEC STD 51-2, or equivalent. The equipment shall
have a set of a specimen and a thermocouple in the centre of a cubic chamber of 30 cm
side length. An apparatus is shown in Figure 1.
b) Specimen
Unless otherwise specified, use the specimen illustrated in Figure 2. All the dimensions in
Figure 2 shall be requirements. This specimen uses a TEG chip (5 mm × 5 mm) with a
temperature measuring sensor, which is wire-bonded to the centre of the specimen board
as a heat source. The detail specification of the printed board shall be in accordance with
Annex A.
c) Pre-conditioning
Pre-conditioning shall be in accordance with Clause 4. And, the test specimen shall be
fixed horizontally in the chamber of the equipment.
d) Thermal resistance and heat transfer parameter on the plane (horizontal direction of the
specimen). The following procedure shall be respected:
• provide a specimen assembled with a heater with a TEG chip with a temperature
measuring sensor;
• specify the temperature coefficient of the sensor prior to the measurement;
• operate the heater and arrange the applied power (P) based upon the range of thermal
resistance on the plane (horizontal direction of the specimen) as shown in Table 1;
• measure the temperature of the TEG chip with a temperature measuring sensor (T )
s
and the temperature inside the chamber (T ) after the temperature of the TEG chip
a
with a temperature measuring sensor has reached a stable state;
• calculate the thermal resistance on the plane (horizontal direction of the specimen)
(R ) with the following equation:
p
R = (T – T ) / P
p s a
• using the thermal resistance (R ), calculate the thermal transfer parameter (he) by the
p
following equation:
he = W/m K
R × 0,002 5
p
Equilibrium verification shall be in accordance with Annex B.

– 8 – IEC 61189-3-913:2016 © IEC 2016
Table 1 – Applied power (P) that corresponds to a range of thermal
resistance on the plane
Range of thermal resistance
Applied power on the plane
(horizontal direction of the specimen) (R )
p
W K/W
0,1 300 > R
p
0,2 200 < R < 300
p
0,3 150 < R < 200
p
0,4 100 < R < 150
p
0,75
60 < R < 100
p
1,0 30 < R < 60
p
2,0 20 < R < 30
p
3,0 15 < R < 20
p
5,0 5 < R < 15
p
10,0 < 5
R
p
5.2.2 Measurement of thermal resistance across the thickness
In this subclause, the measurement of thermal resistance across the thickness is addressed
as follows.
a) Apparatus
The testing apparatus is as shown in Figure 3. The apparatus shall consist of a metal
block (aluminium or copper) which can hold the specimen specified in 5.2.1 b) and a
cooling system to keep the temperature of the metal block constant.
b) Specimen
Specimen shall be as specified in 5.2.1 b).
c) Pre-conditioning
Pre-conditioning shall be in accordance with Clause 4.
d) Test
The procedure shall be as follows:
• provide a specimen, which is screwed to the metal block, assembled with a heater that
contains a TEG chip with a temperature measuring sensor;
• specify the temperature coefficient of the sensor prior to the measurement;
• apply thermal conductive materials such as thermal grease between the specimen and
the metal block to reduce thermal resistivity;
• install a thermocouple within a 10 mm distance from the edge of the specimen;
• install another thermocouple in the water sink;
• fix the metal block to the cooling system;
• keep the water temperature constant by the water-cooled system as shown in
Figure 3;
• operate the heater and arrange the applied power (P) based on the thermal resistance
across the thickness, as shown in Table 2;
• measure the temperature of the TEG chip with a temperature measuring sensor (T )
s
and the temperature on the metal block (T ) as soon as the temperature of the TEG
b
chip with a temperature measuring sensor has reached the stable state;
• calculate the thermal resistance across the thickness (R ) by the following equation:
t
R = (T − T ) /P (K/W)
t s b
The thermal conductivity parameter (Ke) shall be calculated with the following equation using
R .
t
t
Ke = W/m K
−5
R × 2,5 ×10
t
where
t is the thickness (m);
–5 2
2,5 × 10 (m ) is the area of the TEG chip with a temperature measuring sensor.
Table 2 – Applied power (P) that corresponds to a range of thermal
resistance across the thickness (K/W)
Applied power Range of thermal resistance across the thickness (R )
t
W K/W
0,1
300 > R
t
0,2
200 < R < 300
t
0,3 150 < R < 200
t
0,4 100 < R < 150
t
0,75 60 < R < 100
t
1,0
30 < R < 60
t
2,0
20 < R < 30
t
3,0 15 < R < 20
t
5,0 5 < R < 15
t
10,0
R < 5
t
– 10 – IEC 61189-3-913:2016 © IEC 2016
Dimensions in millimetres
Thermocouple
Specimen
Arrange as to the heating
TEG (test equipment
group) to the center of the
cabinet
Package mounted
on board for test
12,5
TEG chip
Support
Thermocouple
Thermocouple
IEC
Figure 1 – Illustration of an apparatus for the thermal conductivity test
12,5
Dimensions in millimetres
TEG pad
2 1
3,2 25
Mounting hole
Pad
Wire bonding pad
TEG
Substrate
Grease
IEC
Figure 2 – Surface layer specimen pattern for thermal conductivity test
14 2 5
3,2
4,5
– 12 – IEC 61189-3-913:2016 © IEC 2016
Water cooled heat sink (AI or Cu) block
100 mm × 100 mm × 50 mm
10 mm
TEG chip
Specimen
Screw
Thermocouple Thermal grease
Thermocouple
Running
water
Constant water temperature (from 15 °C to 25 °C)

IEC
Figure 3 – Test equipment for thermal resistance to the thickness direction

Annex A
(normative)
Boards and panels
A.1 Panel and board sizes
A.1.1 Board size
This subclause is given for reference only. The size of the board of the product (a × b)
illustrated in Figure A.1 should be selected so that the boards can be arranged efficiently
within a panel with a size as specified in Table A.1. These dimensions are given for
information only. Or, a proper panel with a size given in Table A.1 shall be selected so as to
satisfy the required efficient arrangement of the boards.
Printed board
Panel
e
c b b c
3 4
IEC
Key
Board size of the product: a × b
Space between board and panel edges: c , c , c , c
1 2 3 4
Space between boards: e , e
1 2
Figure A.1 – Board arrangement in a panel
Table A.1 – Panel dimensions
Size of a CCL Division
(copper clad
4 6 8 9
laminate) panel
1 000 × 1 000 500 × 500 333 × 500 250 × 500 333 × 333
333 × 600
1 000 × 1 200 500 × 600 300 × 500 333 × 400
400 × 500
Dimensions are in millimetres.

A.1.2 Allowance of dimensions
The allowance of dimensions of a board or a panel is given in Table A.2.
a a
c e c
2 2 1
– 14 – IEC 61189-3-913:2016 © IEC 2016
Table A.2 – Allowance of dimensions
Length Allowance
mm mm
≤100 ±0,2
Add 0,1 for each 50 exceeding a length of 100.
>100
A.1.3 Perforation and slit
The perforation and slits are shown in Figure A.2. The allowances of the distances from the
datum point to the center of the cut of the perforation and slit is given in Table A.3.
Outline of the
printed board
Perforation
Slit
f
Datum point
f
IEC
Figure A.2 – Distances from the datum point to perforation and slit
Table A.3 – Allowance of the distances from
the datum point to perforation and slit
Distances from the datum
Allowance
point to perforation and slit
mm
mm
≤100 ±0,2
>100 Add 0,1 for each 50 beyond a length of 100.

A.1.4 V-cut
The V-cut is shown in Figure A.3 and Figure A.4. The allowance of the distance from the
reference datum to the center of cut of the V (g to g ) is given in Table A.4. The allowance of
1 4
the deviation of the position of the V-cut on the front and back planes is 0,2 mm, and the
allowance of the uncut thickness of the board is the sum of the allowance of the board
thickness ±0,1 mm.
f
f
Outline of the
printed board
V-cut
g
Datum point
g
IEC
Figure A.3 – Distance from the datum point to the V-cut
Center of the V-cut
i
(front surface)
Base material
Center of the V-cut
(back surface)
IEC
Figure A.4 – Allowance of position off-set of V-cuts on front and back surfaces
Table A.4 – Allowance of the distance from the datum point to the center of the V-cut
Distance from the datum point
Allowance
to the center of the V-cut
mm
mm
≤100 ±0,2
Add 0,1 for each 50 mm exceeding a length over
>100
100 mm
A.2 Total board thickness
The allowance of the total board thickness (t) and symbol marks as shown in Figure A.5 is
given in Table A.5.
g
g
t
– 16 – IEC 61189-3-913:2016 © IEC 2016
Solder resist
Legend
Plating
Copper foil
IEC
Figure A.5 – PWB board with symbol mark, solder resist, copper foil and plating
Table A.5 – Total thickness and its allowance
Total thickness Allowance
(center value of the final board)
t
+0,10
0,3 ≤ t < 0,5
–0,05
0,5 ≤ t < 0,8 ±0,10
0,8 ≤ t < 1,10
±0,15
1,10 ≤ t < 1,40 ±0,17
1,40 ≤ t < 2,00 ±0,19
t ≥ 2,00 ±10 %
Dimensions are in millimetres.

A.3 Holes
A.3.1 Insertion holes and vias
The following requirements apply for insertion holes and vias.
a) Allowance of component insertion holes
The allowance of component insertion holes is given in Table A.6. The allowance given in
this table is not applicable to vias (through-hole vias, buried vias and blind vias). The
allowance of through-holes with a diameter less than 0,6 mm for insertion of a component
and holes for press-fit of a component is to be as agreed between the user and supplier
(hereafter, referred to as AABUS).
Table A.6 – Allowance of holes for component insertion
Item Allowance
0,6 ≤ t < 2,0 ±0,10
Plated through-hole
t ≥ 2,0
±0,15
Non-plated through-hole ±0,10
Dimensions are in millimetres.

t
b) Position of a hole for component insertion
The center of a hole for component insertion should be at the cross point of the grid for
pattern design including the complementary grid lines used. The allowance of a component
→
insertion hole position the deviation from the designed position in respect to the datum
j
,
point as shown in Figure A.6 is given in Table A.7.
→
| j |
Finished hole
Designed hole position
Quasi datum point
Datum point
(X, Y)
(0,0)
X
Datum line
Outline of the printed board
IEC
Figure A.6 – Positions of component insertion holes
Table A.7 – Position allowance of component insertion holes
Longer dimension of rectangular board Allowance
mm mm
≤400 0,10
>400 For board exceeding 400, add 0,05 for each additional 100

c) Distance from the board edge to the wall of a hole
Distance from the board edge to the wall of a hole (d) is shown in Figure A.7. The distance
(d) between the walls of a through-hole before plating and of a hole for component
insertion shall be larger than either 1,0 mm. The distance in the case of hole for press-fit
shall be in accordance with Table A.8.
Y
– 18 – IEC 61189-3-913:2016 © IEC 2016
Hole
Printed board
d
d
d
t
IEC
Figure A.7 – Distance between the wall of a hole and the board edge
Table A.8 – Distance between the wall of a hole and board edge
Item Distance (j) between a component hole before plating and the via wall (d)
HDI PWB ≤1,0 mm and also longer than the board thickness (t)
Standard PWB ≤1,5 mm and also longer than the board thickness (t)

d) Minimum clearance between the wall of a hole and the inner conductor
The minimum clearance between the wall of a hole and the inner conductor (k) as
illustrated in Figure A.8 shall be 0,325 mm. And the detailed dimensions are specified in
Table A.9. If the distance 0,325 mm is guaranteed in the design of the pattern, the
minimum separation is guaranteed.
Table A.9 – Minimum clearance between the wall of a hole and the inner layer conductor
Minimum clearance between the hole wall
and the inner layer conductor
k
Item
Standard value Minimum value
mm mm
Component hole 0,5
HDI PWB 0,25
Via 0,30
Component hole 0,5
Standard PWB 0,30
Via 0,35
d
Base material
Copper foil
k k
Through-hole plating
IEC
Figure A.8 – Wall of a hole and the minimum designed spacing to the inner conductor
A.3.2 Datum hole
+0,10
The allowance of a datum hole shall be ±0,05 mm, or mm. A through-hole without wall
−0,00
plating shall be used as a datum hole.
A.3.3 Assembly hole (through-hole without wall plating)
The following requirements apply.
a) Allowance of an assembly hole
The allowance of an assembly hole shall be ±0,10 mm.
b) Allowance of the position of an assembly hole
The allowance of the position of an assembly hole shall be in accordance with Table A.7.
c) Distance between an assembly hole and the board edge
The distance between an assembly hole and the board edge shall be larger than 2,0 mm.
In case the distance is less than 2,0 mm, the distance shall be agreed between user and
supplier.
d) The distance between an assembly hole and the inner conductor
The distance between the wall of an assembly hole and the inner conductor shall be larger
than 1,0 mm.
A.4 Conductor
A.4.1 Width of conductor pattern and its allowance
The allowance of the formed conductor width (w), as illustrated in Figure A.9, shall be in
accordance with the allowances given in Table A.10. The allowance of the finished conductor
pattern specifically designed for impedance control shall be AABUS.

– 20 – IEC 61189-3-913:2016 © IEC 2016
Table A.10 – Allowance of conductor width
Conductor thickness (t) Allowance Conductor width for reference
µm µm µm
50 ≤ t < 75 15 to 20
±25
20 to 40
75 ≤ t < 100 ±30
100 ≤ t < 300 ±50 30 to 50
t ≥ 300 ±100 40 to 70
±150
Thick copper foil circuits ±200 105
±300 140
The conductor thickness is the copper foil thickness plus the thickness of plated copper.

Conductor
w w
Base material
IEC
Figure A.9 – Width of finished conductor
A.4.2 Distance between conductors and its allowance
Distance between conductor and board edge is illustrated in Figure A.10. The allowance of
the distance between conductors (h) shall be as given in Table A.11. The allowance of the
finished conductor pattern specifically designed for impedance control shall be AABUS.
Table A.11 – Allowance of the distance between conductors
Conductor thickness (h) Allowance Conductor with for reference
µm µm µm
50 ≤ h < 75 ±25 15 to 20
75 ≤ h < 100 20 to 40
±30
100 ≤ h < 300 ±50 30 to 50
h ≥300 ±100 40 to 70
The conductor thickness is the copper foil thickness plus the thickness of plated copper.

m m
Conductor
Base material
n n
IEC
Key
m is the conductor spacing
n is the conductor pitch
Figure A.10 – Distance between conductor and board edge
A.4.3 Thickness of the insulating layer
The thickness of an insulating layer (t) is illustrated in Figure A.11.
Conductor
Base material
IEC
NOTE In case the surface of copper foil is roughened, the thickness of the base material is the minimum distance
applicable to the substrate.
Figure A.11 – Thickness of the insulating layer
A.5 Printed contact
A.5.1 Allowance of the distance between the centers of two adjacent printed
contacts
The allowance of the distance between the centers of two adjacent printed contacts (p, p ) as
n
illustrated in Figure A.12 shall be ±0,10 mm. Add 0,01 mm for each additional 20 mm in case
the distance between the centers of terminals exceeds 100 mm.
t
t
t
– 22 – IEC 61189-3-913:2016 © IEC 2016
Centres of terminals
of printed contacts
P
P
n
Printed board
IEC
Figure A.12 – Distance between centers of terminals of printed contacts
A.5.2 Allowance of the terminal width of printed contacts
The allowance of the terminal width of printed contacts (w) as illustrated in Figure A.13 is
specified in Table A.12.
Printed contact
w w
IEC
Figure A.13 – Terminal width of a printed contact
Table A.12 – Allowance of terminal width of a printed contact
Terminal width (w) Allowance
mm mm
≤1,0 ±0,05
>1,0 ±0,10
A.5.3 Shift of the center of printed contacts on the front and back sides of a board
The allowance of the shift of the center of printed contacts on the front and back sides of a
board (q) as illustrated in Figure A.14 shall be ±0,20 mm.

q
Printed contact
Base material
IEC
Figure A.14 – Shift of the center of printed contacts
on front and back sides of a board
A.6 Land pattern
A.6.1 Allowance of the distance between the centers of two lands
The allowance of the distance between the centers of two adjacent lands (S ) and of two
parallelly located lands (S) as illustrated in Figure A.15 is specified in Table A.13.
Center of land
S
S
IEC
Figure A.15 – Land pattern
Table A.13 – Allowance of terminal width of a printed contact
Allowance
Distance between centers
mm
S ±0,03
S
±0,05
A.6.2 Allowance of a land width
The allowance of a land width of a land pattern (w) as illustrated in Figure A.16 is specified in
Table A.14. The allowance for a land narrower than 0,15 mm shall be AABUS.
S
S
– 24 – IEC 61189-3-913:2016 © IEC 2016
w
Land
w
w
Center of land
IEC
Figure A.16 – Land width of a land pattern
Table A.14 – Allowance of the width of a land of a land pattern
Land width
Allowance
w
0,15 < w ≤ 0,35 ±0,04
w > 0,35 ±0,06
Dimensions are in millimetres.

A.6.3 Land diameter and its allowance for BGA/CSP
The allowance of land diameter for BGA/CSP is specified in a) and b) below.
a) The pattern is shown in Figure A.17. The allowance of the land diameter (d) of BGA/CSP
made of a conductor only is given in Table A.15.
Land
Land
Conductor
Base material
Conductor
d d
Base material
IEC
Figure A.17 – Land diameter of BGA/CSP formed of a conductor only
w
Table A.15 – Land diameter and its allowance for BGA/CSP
Allowance of land diameter Conductor thickness
Item
a
mm µm
+0,02
HDI PWB 20 to 30
–0,03
+0,03
Standard PWB 30 to 50
–0,05
a
For reference only.
b) The pattern is shown in Figure A.18. The allowance of the land diameter (d) of BGA/CSP
formed at the opening of solder resist is given in Table A.16.
Table A.16 – Allowance of the land diameter (d) of BGA/CSP
formed at the opening of solder resist
Allowance
Item
mm
HDI PWB ±0,03
Standard PWB ±0,05
Solder resist
Land
Solder resist
d
Base material
Conductor
IEC
Figure A.18 – Land diameter (d) of BGA/CSP
formed at the opening of solder resist
A.7 Fiducial mark and mark for component positioning
A.7.1 Typical form and size of the fiducial mark
The mark for component positioning in Figure A.19 is specified in Table A.17.
...