Device embedding assembly technology - Part 2-7: Guidelines - Accelerated stress testing of passive embedded circuit boards

IEC TR 62878-2-7:2019 (E) describes the accelerated stress testing of passive embedded circuit boards. It can be used for screening finished boards, including multilayer and high-density interconnection (HDI) boards. These boards are mainly for mobile devices.

General Information

Status
Published
Publication Date
19-Mar-2019
Current Stage
PPUB - Publication issued
Completion Date
20-Mar-2019
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IEC TR 62878-2-7:2019 - Device embedding assembly technology - Part 2-7: Guidelines - Accelerated stress testing of passive embedded circuit boards
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IEC TR 62878-2-7
Edition 1.0 2019-03
TECHNICAL
REPORT
colour
inside
Device embedding assembly technology
Part 2-7: Guidelines – Accelerated stress testing of passive embedded circuit
boards
IEC TR 62878-2-7:2019-03(en)
---------------------- Page: 1 ----------------------
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IEC TR 62878-2-7
Edition 1.0 2019-03
TECHNICAL
REPORT
colour
inside
Device embedding assembly technology
Part 2-7: Guidelines – Accelerated stress testing of passive embedded circuit
boards
INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
ICS 31.180; 31.190 ISBN 978-2-8322-6680-9

Warning! Make sure that you obtained this publication from an authorized distributor.

® Registered trademark of the International Electrotechnical Commission
---------------------- Page: 3 ----------------------
– 2 – IEC TR 62878-2-7:2019  IEC 2019
CONTENTS

FOREWORD ........................................................................................................................... 3

1 Scope .............................................................................................................................. 5

2 Normative references ...................................................................................................... 5

3 Terms and definitions ...................................................................................................... 5

4 Overview of accelerated stress testing of passive embedded circuit boards ..................... 5

4.1 Testing under combined stresses ............................................................................ 5

4.2 Test coupon design ................................................................................................. 6

5 Test procedure ................................................................................................................ 8

5.1 General ................................................................................................................... 8

5.2 Setting test temperature .......................................................................................... 8

5.3 Placement of samples on bending tester ................................................................. 8

5.4 Imposing combined stresses ................................................................................... 9

5.5 Evaluation of results ............................................................................................... 9

6 Results .......................................................................................................................... 10

Annex A (informative) Test coupon design rule .................................................................... 11

Annex B (informative) Bending testing ................................................................................. 12

Figure 1 – Testing principal ..................................................................................................... 6

Figure 2 – Embedded circuit board panel with test coupons .................................................... 6

Figure 3 – Test coupon structure ............................................................................................ 7

Figure 4 – Opened and closed sample jig ............................................................................... 8

Figure 5 – Bending of test coupons ......................................................................................... 9

Figure 6 – Output voltage ..................................................................................................... 10

Figure 7 – Cross section of sample after testing ................................................................... 10

Figure 8 – Cross section of failed sample ............................................................................. 10

Figure B.1 – Bending tester in the chamber .......................................................................... 12

Table 1 – Design information for test coupon .......................................................................... 7

Table 2 – Stack-up information for test coupon ....................................................................... 7

Table 3 – Coupon testing results ........................................................................................... 10

Table A.1 – Test coupon design rules ................................................................................... 11

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IEC TR 62878-2-7:2019  IEC 2019 – 3 –
INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________
DEVICE EMBEDDING ASSEMBLY TECHNOLOGY
Part 2-7: Guidelines – Accelerated stress testing of
passive embedded circuit boards
FOREWORD

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IEC TR 62878-2-7, which is a technical report, has been prepared by IEC technical committee

91: Electronics assembly technology.
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– 4 – IEC TR 62878-2-
...

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