ISO/IEC 10857:1994
(Main)Information technology — Microprocessor systems — Futurebus+ — Logical protocol specification
Information technology — Microprocessor systems — Futurebus+ — Logical protocol specification
Specifies the logical layer for a set of signal lines that constitute a multiple segment bus architecture, and for the interfacing of modules connected to a bus segment. Intended to be used as a component within a profile to build systems with higher levels of compatibility.
Technologies de l'information — Systèmes à microprocesseurs — Futurebus+ — Spécification du protocol logique
General Information
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Standards Content (Sample)
INTERNATIONAL ISO/lEC
STANDARD 10857
ANWIEEEE
Std 896.1
First edition
1994-04-27
Information technology -
Microprocessor Systems - Futurebus+ -
Logical protocol specification
Technologies de I ’information -
SystGmes G microprocesseurs - Futurebus+ -
Sp&7ica tion du pro tocole logique
Reference number
ISO/IEC 10857: 1994(E)
ANWIEEE
Std 896.1, 1994 Edition
---------------------- Page: 1 ----------------------
Abstract: This International Standard provides a set of tools with which to implement a Futurebus+
architecture with Performance and tost scalability over time, for multiple generations of Single- and
multiple-bus multiprocessor Systems. Although this specification is principally intended for 64-bit
address and data Operation, a fully compatible 32-bit subset is provided, along with compatible ex-
tensions to support 128- and 256.bit data highways. Allocation of bus bandwidth to competing mod-
ules is provided by either a fast centralized arbiter, or a fully distributed, one or two pass, parallel
contention arbiter. Bus allocation rules are provided to suit the needs of both real-time (priority
based) and fairness (equal opportunity access based) configurations. Transmission of data over the
multiplexed address/data highway is governed by one of two intercompatible transmission meth-
ods: a) a technology-independent, compelled-protocol, supporting broadcast, broadcall, and trans-
fer intervention (the minimum requirement for all Futurebus+ Systems), and b) a configurable
transfer-rate, source-synchronized protocol suppotting only block transfers and source-synchro-
nized broadcast for Systems requiring the highest possible Performance. Futurebus+ takes its name
from its goal of being capable of the highest possible transfer rate consistent with the technology
available at the time modules are designed, while ensuring compatibility with all modules designed
to this Standard both before and after. The plus sign (+) refers to the extensible nature of the spec-
ification, and the hooks provided to allow futther evolution to meet unanticipated needs of specific
application architectures. lt is intended that this International Standard be used as a key component
of an approved IEEE Futurebus+ Profile.
Keywords: bus architecture, Futurebus+, logical protocol, multiprocessor Systems
Engineers, Inc.
The Institute of Electrical and Electronics
7-2394, USA
345 East 47th Street, New York, NY 1001
Copyright 0 1994 by the Institute of Electrical and Electronics Engineers, Inc.
Printed in the United States of America.
All rights reserved. Published 1994.
ISBN 1
-55937-373-3
No part of this publication may be reproduced in any ferm, in an electronie re trieval System OI- otherwise, without the Prior
written Permission of the publisher.
April 27, 1994 SH16816
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ISO/IEC 10857 : 1994
[ANSMEEE Std 896.1,1994 Edition]
(Incorporates ANSVIEEE Std 896.14991 and
IEEE Std 896.1a-1993)
Information technology-
Microprocessor systems-
- Logical protocol
Futurebus+
specification
Sponsor
Bus Architecture Standards Committee
of the
IEEE Computer Society
Adopted as an International Standard by the
International Organization for Standardization
and by the
International Electrotechnical Commission
- American National Standard
Published by
The Institute of Electrical and Electronics Engineers, Inc.
---------------------- Page: 3 ----------------------
Foreword
ISO (the International Organization for Standardization) and IEC (the International
Electrotechnical Commission) form the specialized System for worldwide standard-
ization. National bodies that are members of ISO or IEC participate in the develop-
ment of International Standards through technical committees established by the
respective organization to deal with particular fields of technical activity. ISO and
IEC technical committees collaborate in fields of mutual interest. Other international
organizations, governmental and nongovernmental, in liaison with ISO and IEC, also
take part in the work.
In the field of information technology, ISO and IEC have established a joint technical
committee, ISO/IEC JTC 1. Draft International Standards adopted by the joint tech-
nical committee are circulated to national bodies for voting. Publication as an Inter-
national Standard requires approval by at least 75% of the national bodies casting a
vote.
In 1993, ANSUIEEE Std 896.1-1991, together with IEEE Std 896.1a-1993, Errata,
Corrections and Clarijkations, was adopted by ISOIIEC JTC 1, as draft International
Standard ISO/IEC DIS 10857. This edition incorporates IEEE Std 896.1a-1993 into
the text of ANSUIEEE Std 896.1-1991.
International Organization for Standardization./International Electrotechnical Commission
l CH-1211 Geneve 20 l Switzerland
Case postale 56
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IEEE Standards documents are developed within the Technical Committees of the
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They are not necessarily members of the Institute. The Standards developed within
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Use of an IEEE Standard is wholly voluntary. The existente of an IEEE Standard
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Comments for revision of IEEE Standards are welcome from any interested Party,
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Interpretations: Occasionally questions may arise regarding the meaning of portions
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Introduction
(This introduction is not a normative part of ISO/IEC 10857 : 1994, but is included for information only.)
The following is a list of those who were members of the IEEE Futurebus+ Working Group at the time
ANSUIEEE Std 896.1-1991 was approved:
Paul L. Borrill, Chair
Barbara Aichinger Joseph George Clarence Peckham
Ray Alderman Larry Gilbert Shlomo Pri-Tal
Hamid Amirazzi Jim Goodman Surinder Rai
Duane Anderson Robert Greiner Mike Raynham
Harrison Beasley David Gustavson Jack Regula
Janos Biri Emil Hahn Bill Ruszczyk
Martin Blake David Hartig Ali Sarabi
Richard Boberg David Hawley James Scaminaci
Lym Hevle Dennis Schmitz
Andy Bonafini
David Brash Billy Ho Craig Scott
Mike Humphrey Don Senzig
David Brearly
David Brewer John Hyde Lui Sha
Marc Briel Ed Jacques Dan Sieworek
Charles Brill David James Mike Snodgrass
Jim Brown Greg Jewell Michael Sweeney
Mark Bunker Anatol Kaganovich Fahad Tabrizzi
John Campbell Hans Karlsson Matthew Taub
Jay Cantrell David Kemp Mike Teener
S tephen Cecil Ralph Lachenmaier Judy Teske
Kirn Clohessy Subasis Laha Morton Thayer
Paul Cook Cees Lambretche John Theus
Dante Del-Corso Dick Lawrence Mike Thompson
Ernie Cracker Mike Lazar Nigel Topham
Jon Crowell Jim Leahy Mary Vernon
Steve Diess Kent Leung Harvey Walthersdorf
Paul Dixon Joel Liblove Eike Waltz
Thanos Mentzelonoulos Randy Weber
Ian Dobson
Klaus Müller Mike Wenzel
Emer Dooley
Chris Nichols Mike Wiles
Sam Duncan
Jim Nicholson Mark Williams
Chris Eck
Bill Evertz Ronald Niederhagen John Wise
Mira Pauker David Wright
Wayne Fischer
Chet Pawlowski Dale Younge
Mike Foster
iv
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The following persons were on the balloting committee of ANSVIEEE Std 896.1-1991:
William B. Adams William Groseclose
Mira Pauker
Sid Ahuja David B. Gustavson
Donald Pavlovich
Mohammad Al-Malki Thomas W. Harkaway James M. Pexa
John Allen David Hawley
Arthur V. Pohm
Richard P Ames Herbert Hecht
Bruno R. Preiss
Duane L. Anderson Rick Henderson Shlomo Pri-tal
Jack Arabian Frank Horn
Greg Prom
R. V Balakrishnan Scott Hopkinson
Richard Rawson
David M. Barnum Zoltan R. Hunor Michael Raynham
Harrison A. Beasley Peter J. Ilieve
Ed Rodriquez
Janos Biri Bob Jacobsen
Tom Sakoda
Kyle M. Black Edgar Jacques
Debabrata Sarma
John Black David V. James
Carl Schmiedekamp
William P Blase Kenneth Jansen
Norman Schneidewind
Jack L. Blevins Jack R. Johnson
Eugene C. Sehramm
Anatol Kaganovich
David Brearley David Seraphin
Charles Brill Hans Karlsson
Philip Shutt
Lyle Burnett David Keeney
Michael R. Sitzer
Willis K. King
Luis-Felipe Cabrera Michael Smolin
Hubert Kirrman
Clyde Camp Benjamin Stoppe, Jr.
Donald Chi Ernst H. Kristiansen
Paul Sweazey
Kirn Clohessy Thomas M. Kurihara Daniel Tabak
Tuvia Lamdan
David Cohen Darius Tanksalvala
Glen Langdon
Paul D. Cook Daniel Tarrant
Robert Crowder Thomas Leonard Michael Teener
Jonathan C. Crowell Per Lindman Michael G. Thompson
William Lindow
Philip D ’Angelo Carsten Thomsen
Ana Maria Dealvare Rollins Linser Joseph P. Trainor
Stephen Deiss Wayne M. Loucks Robert Tripi
Dante Del Corso Anthony G. Lubowe Joseph G. Tront
Su Dongzhuang Andy J. Luque Robert J. Voight
Mike Dorsett Roy Maurer Eike Waltz
Samuel H. Duncan William McDonald David R. Weller
Sourav Dutta Darre11 B. McIndoe Walter L. Whipple
Jeffrey S. Ebeling Bruce Millard Thomas Wicklund
William P Evertz Lee Minsuk Hans A. Wiggers
Harry D. Feit James M. Moidel Mark Williams
Wayne Fischer James Moloney John S. Willy
Gordon Forte J.D. Nicoud Andrew Wilson
Andrew Fraser Tadahiko Nishimukai John Wise
Joseph D. George Duane J. Northcutt Joel Witt
Andy Glew Gregory C. Novak David L. Wright
Patrick Gonia Michael Orlovsky Qiufeng Wu
Willard Graves Jame R. Otto Oren Yuen
Dick Palmer
When the IEEE Standards Board approved ANSILIEEE Std 896.1-1991 on September 26, 1991, it had the
following membership:
Marco Migliaro, Chair Donald C. Loughry, Vice Chair
Andrew G. Salem, Secretary
Dennis Bodson Thomas L. Hannan John E. May, Jr.
Paul L. Borrill Donald N. Heirman Lawrence V. McCall
Clyde Camp Kenneth D. Hendrix Donald T. Michael*
James M. Daly John W. Horch Stig L. Nilsson
Donald C. Fleckenstein Ben C. Johnson John L. Rankine
Jay Forster* Ivor N. Knight Ronald H. Reimer
David F. Franklin Joseph L. Koepfinger* Gary S. Robinson
Ingrid Fromm Irving Kolodny Terrance R. Whittemore
Michael A. Lawler
*Member Emeritus
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The following is a list of those who were members of the IEEE Futurebus+ Working Group at the time
IEEE Std 896.1a-1993 was approved:
Samuel H. Duncan, Chair
Harrison Beasley Joseph D. George Thanos Mentzelopoulos
Kirn Burris Claes-Goran Gustavsson Michael Munroe
Jay Cantrell Emil Hahn Robert Schetlick
Steve Cecil Peter Izzo Gene Sehramm
Steve DiCamillo Ed Jacques Richard Spratt
R. Paul Dixon Greg Jewell John Theus
Ian Dobson Jim Leahy Dean Van De Walker
Jeff Lear Robert Widlicka
Karl Franklin
The following persons were on the balloting committee of IEEE Std 896.1a-1993:
Wilhelm P Evertz Steve Quinton
Edward W. Aichinger
Wayne Fischer Michael L. Roby
Ray S. Alderman
Gordon Forte Frederick E. Sauer
Richard P. Ames
Paul Fulton Robert Schetlick
Keith D. Anthony
Juli0 Gonzalez-Sanz Don Denzig
Harrison A. Beasley
John Griffith Patricia Smith
John Black
Michael C. Hayward Joanne Spiller
Charles Brill
Edgar Jacques Richard Spratt
Andrew J. Brough
Ralph Lachenmaier Michael G. Thompson
Clyde Camp
Lak Ming Lam Joseph P. Trainor
Stephen J. Cecil
Michael Lambrou Robert Tripi
Andy Cheese
Yoshiaki Wakimura
Kirn Clohessy Karl E. McClure
Thanos Mentzelopoulos Eike Waltz
Steven Cobb
Bruce Millard Dave Wiekliff
David Cohen
Robert Widlicka
Steven R. Corbesero Brian D. Morrison
Joel Witt
Ian Dobson Klaus Dieter Mueller
Jean-Jacques Dumont Elwood Parsons Mark Woodbury
Samuel Duncan Chandresh J. Pate1 David L. Wright
Yoshio Yamaguchi
Christopher Eck
When the IEEE Standards Board approved IEEE Std 896.1a-1993 on September 15, 1993, it had the follow-
ing membership:
Wallace S. Read, Chair Donald C. Loughry, Vice Chair
Andrew G. Salem, Secretary
Jim Isaak Don T. Michael*
Gilles A. Baril
Ben C. Johnson Marco W. Migliaro
Jose A. Berrios de la Paz
Walter J. Karplus L. John Rankine
Clyde R. Camp
Lorraine C. Kevra Arthur K. Reilly
Donald C. Fleckenstein
E. G. “Al” Kiener Ronald H. Reimer
Jay Forster*
Ivor N. Knight Gary S. Robinson
David F. Franklin
Joseph L. Koepfinger* Leonard L. Tripp
Ramiro Garcia
D. N. “Jim” Logothetis Donald W. Zipse
Donald N. Heirman
*Member Emeritus
Also included are the following nonvoting IEEE Standards Board liaisons:
Satish K. Aggarwal
James Beall
Richard B. Engelman
David E. Soffrin
Stanley 1. Warshaw
IEEE Std 896.1-1991 was approved by the American National Standards Institute on April 28, 1992.
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Contents
PAGE
CLAUSE
1
..............................................................................................................................................
1. Overview
1
1.1 Scope .
‘3
...................................................................................................................
1.2 Normative references
4
......................................................................................................................
2. Definitions and structure
4
2.1 Special word usage .
4
....................................................................................................................................
2.2 Definitions
8
2.3 Signal conventions .
9
2.4 Document structure .
10
2.5 Futurebus+ logo .
11
2.6 Bus line description .
14
Attribute Cross reference .
2.7
24
Implementation mnemonics .
2.8
26
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3. Bus signaling environment
26
.................................................................................................................................
3.1 Description
26
..............................................................................................................................
3.2 Specification
28
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4. Centralized arbitration
28
.................................................................................................................................
4.1 Description
30
..............................................................................................................................
4.2 Specification
31
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5. Distributed arbitration and arbitrated messages
31
5.1 Description .
46
5.2 Specification .
57
6. Parallel protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
57
6.1 Description .
96
6.2 Specification .
128
Buskystem management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
128
7.1 Description .
136
7.2 Specification .
144
Cache coherence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
144
8.1 Description .
168
8.2 Specification .
vii
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PAGE
CLAUSE
174
Message passing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
9.
174
9.1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
190
9.2 Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ANNEX
200
Annex A Bibliography . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . .
Vlll
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Information technology-Microprocessor
Systems-Futurebus+ - Logical protocol
specification
1 n Overview
1.1 Scope
This International Standard specifies the logical (relative timing and behavioral protocol) layer for a set of
Signal lines that constitute a multiple Segment bus architecture, and for the interfacing of modules connected
to a bus Segment. This International Standard is intended to be used as a component within a Profile (a col-
lection of related specifications that must be used together by a product in Order to Claim conformance to a
Standard) to build Systems with higher levels of compatibility.
Futurebus+ provides the means for the transfer of binary information between boards over one or more logi-
cal buses. Boards may contain any combination of one or more processors and local resources such as Cache,
memory, peripheral and communication controllers, etc. Figure 1 Shows a block diagram of a typical appli-
cation of Futurebus+.
Protocols are specified for the allocation of bus time to modules that need to conduct transactions with other
modules over the bus. However, this International Standard does not mandate the priority rules for modules
to use when competing for use of the bus. These are considered the privilege and responsibility of the System
integrator. The International Standard includes a complete set of signaling rules to be followed by all mod-
ules in both the distributed and centralized control acquisition processes leading to bus mastership (clauses 4
and 5). The International Standard also gives a comprehensive set of signaling rules for all modules partici-
pating in a bus transaction (clause 6).
Most of the transfer protocols in this International Standard are compeiled; that is, they are governed by a
pure Cause-and-effect relationship. This is what gives this International Standard its technology-independent
nature. The compelled signaling provides a designer with a logical simplicity for what takes place in the pro-
tocols. As a result, there will be maximum compatibility between products designed to this International
Standard throughout its operational lifetime.
With any bus, there is the dilemma of how much the Standard should specify. There must be a balance
between ensuring that all boards designed by a variety of manufacturers tan operate together, while not
restricting the users of the bus to any preconceived System design. Although the scope of this International
Standard has been restricted to exclude many of the System requirements associated with bus-based com-
Puter Systems, these are being addressed in companion Standards.
The common control and register interface to this series of Standards for the Futurebus+, and to other pro-
posed IEEE Standards (in particular, IEEE Std 1596-1992 [B12] ‘, IEEE P1014.1 [B2], and IEEE
in brackets correspond to those of the bibliography in annex A.
’ The numbers
---------------------- Page: 11 ----------------------
ISO/IEC 10857 : 1994 (E)
[ANSI/1 EEE Std 896.1, 1994 Edition] MICROPROCESSOR SYSTEMS-
Pl394 [Bll]), is embodied in the unified CSR architecture Standard, IEEE Std 1212-1991 [B7], along with a
unified DMA architecture for moving data around a System without the need to pass through a processor
(IEEE Std 1212.1-1993 [B8]).
This set of protocols has been designed to be as close to technology-independent as possible while maintain-
ing a very high level of efficiency and Performance. The bus Signals may be implemented using any technol-
ogy (TTL, Backplane Transceiver Logic, ECL, CMOS, GaAs, etc.) so long as the Futurebus+ signaling
conditions are met (incident wave switching on the transmission-line signaling environment, along with the
constraints on skew, crosstalk, and transmission reliability). However, in the interest of maximum compati-
bility between product families, implernentations are expected to be associated with one or more IEEE
Futurebus+ profiles, which specify the physical layer and set of transactions to suit a particular family of
applications.
Processor Processor Processor Processor Processor Processor
I I I I I I I
I J 1 I 1
I I I I I I
I I I I I I
/ /
Cache Cache Cache Cache Cache Cache Cache Cache Cache Cache Cache Cache
Cache Cache
1
Bridge Bridge ’
Futurebus+
Cable
Processor
1 Futurebus+
1 Futurebus+ 1
Memory
I
I/O Processor Frame Buffer
c
I
SCSI 2 / IPI
I
HPPI
LAN
Disk Farm
Connection
to Supercomputer
Figure l-Interfaces in a family of typical Futurebus+ Systems
---------------------- Page: 12 ----------------------
ISO/IEC 10857 : 1994 (E)
FUTUREBUS+ - LOGICAL PROTOCOL SPECIFICATION [ANSVIEEE Std 896.1, 1994 Edition]
1.2 Normative references
The following Standards contain provisions which, through references in this text, constitute provisions of
this International Standard. At the time of publication, the editions indicated were valid. All Standards are
subject to revision, and Parties to agreements based on this International Standard are encouraged to investi-
gate the possibility of applying the most recent edition of the Standards listed below. Members of IEC and
ISO maintain registers of currently valid International Standards.
IEEE Std 896.2- 199 1, IEEE Standard for Futurebus+ - Physical Layer and Profile Specifications.2
IEEE Std 896.3-1993, IEEE Recommended Practices for Futurebus+.
2 IEEE publications are available from the Institute of Electrical and Electronics Engineers, 445 Hoes Lane, P.O. Box 133 1, Piscataway,
NJ 088551331, USA.
3As this Standard goes to press, IEEE Std 896.3-1993 is not yet published. It is, however, available in manuscript form from IEEE.
Anticipated publication date is May 1994.
---------------------- Page: 13 ----------------------
ISO/IEC 10857 : 1994 (E)
[ANSVIEEE Std 896.1, 1994 Edition] MICROPROCESSOR SYSTEMS-
2. Definitions and structure
2.1 Special word usage
2.1.1 may: A keyword indicating flexibility of choice with no implied preference.
2.1.2 shall: A keyword indicating a mandatory requirement. Designers must implement all such mandatory
requirements to ensure interoperability of ISO/IEC 10857 conformant products and Claim conformance to
this International Standard.
2.1.3 should: A keyword indicating flexibility of choice with a strongly preferred implementation. The
Phrase it is recommended is used interchangeably with the keyword should.
2.2 Definitions
2.2.1 activate: a) The action of applying a set of Signals to a of bus lines. b) The state of a group of
fw UP
bus lines when they carry Signals.
2.2.2 address-only transaction: A bus transaction that does not i nclude a data Phase. The only in formation
transferred is contained within the connection Phase and, in some cases, the disconnection Phase.
2.2.3 arbitration: The process of selecting the next bus master.
2.2.4 broadcast on the arbitrated message bus lines to all modules on the
arbitrated message: A number
bus.
2.2.5 assert: a) The action of applying a logic one Signal to a bus line. b) The state of a bus line when the
Signal it carries represents a logic one.
indicates that the logic one state of the
2.2.6 * (asterisk): When appended to a signal ’s name, the suffix “*”
Signal is such that it will override the logic zero state applied by any other module on that line.
2.2.7 beat: An event that begins with the transition on a synchronization line by the master, followed by the
release of an acknowledge line by one or more slaves. Command and data information may be transferred
from the master to one or more slaves in the first half of the beat. During the second half of the beat the
slaves may transfer capability, Status, and data information back to the master.
2.2.8 block copy: A block copy Operation is characterized by a long series of read or write transactions to
sequential memory locations.
2.2.9 bus bridge: A bus bridge is an interconnect between two or more buses that provides Signal and proto-
col translation from one bus to another. The buses may adhere to different bus Standards for mechanical,
electrical, and logical Operation (such as a bus bridge from Futurebus+ to VMEbus or to MULTIBUS 11).
2.2.10 bus line: The medium for the transmission of Signals. Since Futurebus+ requires drivers with wire-
OR capability, a bus line may be driven by several modules simultaneously. Therefore, the Signal carried by
the bus line is the combination of Signals applied to that line from each module.
2.2.11 bus tenure: The duration of a master ’s control of the bus; i.e., the time during which a modul
...
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