47A - Integrated circuits
To prepare international standards for both semiconductor and hybrid integrated circuits, for electronic equipment and systems.
Circuits intégrés
Préparer des Normes Internationales applicables aux circuits intégrés et aux circuits intégrés hybrides à semiconducteurs destinés aux équipements et systèmes électroniques
General Information
IEC 62433-6:2020 describes the extraction flow for deriving an immunity macro-model of an Integrated Circuit (IC) against conducted Electrostatic Discharge (ESD) according to IEC 61000-4-2 and Electrical Fast Transients (EFT) according to IEC 61000-4-4.
The model addresses physical damages due to overvoltage, thermal damage and other failure modes. Functional failures can also be addressed. This model allows the immunity simulation of the IC in an application. This model is commonly called "Int...view more
- Standard110 pagesEnglish and French language
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IEC 62228-3:2019 specifies test and measurement methods for EMC evaluation of CAN transceiver ICs under network condition. It defines test configurations, test conditions, test signals, failure criteria, test procedures, test setups and test boards. It is applicable for CAN standard transceivers, CAN transceivers with partial networking functionality and CAN transceivers with flexible data rate capability and covers
- the emission of RF disturbances,
- the immunity against RF disturbances,
- ...view more
- Standard156 pagesEnglish and French language
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IEC 62433-1:2019 specifies the framework and methodology for EMC IC macro-modelling. Terms that are commonly used in IEC 62433 (all parts), different modelling approaches, requirements and data-exchange format for each model category that is standardized in this series are defined in this document.
IEC 62433-1 cancels and replaces IEC TS 62433-1 published in 2011. This edition constitutes a technical revision. This edition includes the following significant technical changes with respect to IEC...view more
- Standard122 pagesEnglish and French language
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IEC 61967-1:2018 is available as IEC 61967-1:2018 RLV which contains the International Standard and its Redline version, showing all changes of the technical content compared to the previous edition.
IEC 61967-1:2018 provides general information and definitions on the measurement of conducted and radiated electromagnetic disturbances from integrated circuits. It also provides a description of measurement conditions, test equipment and set-up as well as the test procedures and content of the test...view more
- Standard52 pagesEnglish and French language
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IEC 63011-3:2018 specifies a reference model of through-silicon via (TSV) electrical characteristics required for an interface design in three dimensional integrated circuit (3-D IC) to transmit and receive digital data and measurement conditions for resistance and capacitance to specify TSV characteristics in 3-D IC.
Power devices, RF devices and micro-electromechanical systems (MEMS) are not in the scope of this document.
- Standard28 pagesEnglish and French language
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IEC 63011-1:2018 provides definitions pertaining to multichip integrated circuits, as vertically stacked dies using through-silicon vias (TSVs) or micro bumps. Terms and definitions related to the fabrication and test of the multichip integrated circuits are also provided.
- Standard24 pagesEnglish and French language
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IEC 63011-2:2018 provides specifications of initial alignment and alignment maintenance between multiple stacked integrated circuits during the die bonding process. These specifications define the alignment keys and operating procedures of the keys. These specifications apply only if electrical coupling method of die-to-die alignment is used in the die stacking.
- Standard28 pagesEnglish and French language
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IEC 62228-1:2018 provides general information and definitions for electromagnetic compatibility (EMC) evaluation of integrated circuits (IC) with transceivers for wired network applications under network condition. It defines general test conditions, general test setups and test and measurement methods are applied to all parts of IEC 62228.
- Standard17 pagesEnglish and French language
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IEC 62433-2:2017 specifies macro-models for an Integrated Circuit (IC) to simulate conducted electromagnetic emissions on a printed circuit board. The model is commonly called Integrated Circuit Emission Model - Conducted Emission (ICEM-CE). The ICEM-CE macro-model can also be used for modelling an IC-die, a functional block and an Intellectual Property (IP) block. The ICEM-CE macro-model can be used to model both digital and analogue ICs. This edition includes the following significant technica...view more
- Standard217 pagesEnglish and French language
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IEC 62433-3:2017 provides a method for deriving a macro-model to allow the simulation of the radiated emission levels of an Integrated Circuit (IC). This model is commonly called Integrated Circuit Emission Model - Radiated Emission, ICEM-RE. The model is intended to be used for modelling a complete IC, with or without its associated package, a functional block and an Intellectual Property (IP) block of both analogue and digital ICs (input/output pins, digital core and supply), when measured or ...view more
- Standard181 pagesEnglish and French language
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IEC 62228-2:2016 specifies test and measurement methods for EMC evaluation of LIN transceiver ICs under network condition. It defines test configurations, test conditions, test signals, failure criteria, test procedures, test setups and test boards. It is applicable for standard LIN transceiver ICs and ICs with embedded LIN transceiver and covers:
- the emission of RF disturbances,
- the immunity against RF disturbances,
- the immunity against impulses and
- the immunity against electrostat...view more
- Standard85 pagesEnglish and French language
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IEC 62433-4:2016 specifies a flow for deriving a macro-model to allow the simulation of the conducted immunity levels of an integrated circuit (IC). This model is commonly called Integrated Circuit Immunity Model - Conducted Immunity, ICIM-CI. It is intended to be used for predicting the levels of immunity to conducted RF disturbances applied on IC pins. In order to evaluate the immunity threshold of an electronic device, this macro-model will be inserted in an electrical circuit simulation tool...view more
- Standard219 pagesEnglish and French language
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IEC 62132-1:2015 provides general information and definitions about measurement of electromagnetic immunity of integrated circuits (ICs) to conducted and radiated disturbances. It also defines general test conditions, test equipment and setup, as well as the test procedures and content of the test reports for all parts of the IEC 62132 series. Test method comparison tables are included in Annex A to assist in selecting the appropriate measurement method(s). This edition includes the following si...view more
- Standard49 pagesEnglish and French language
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IEC TR 61967-1-1:2015(E) provides guidance for exchanging data generated by near-field scan measurements. The described exchange format could also be used for near-field scan data generated by simulation or computation software. It should be noted that, although it has been developed for near-field scan, its use is not restricted to this application. The exchange format can be applied to emission and immunity near-field scan data in the frequency and time domains. The scope of this technical rep...view more
- Technical report63 pagesEnglish language
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IEC TS 61967-3:2014 provides a test procedure which defines an evaluation method for the near electric, magnetic or electromagnetic field components at or near the surface of an integrated circuit (IC). This diagnostic procedure is intended for IC architectural analysis such as floor planning and power distribution optimization. This test procedure is applicable to measurements on an IC mounted on any circuit board that is accessible to the scanning probe. In some cases it is useful to scan not ...view more
- Technical specification73 pagesEnglish and French language
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IEC TS 62132-9:2014 provides a test procedure, which defines a method for evaluating the effect of near electric, magnetic or electromagnetic field components on an integrated circuit (IC). This diagnostic procedure is intended for IC architectural analysis such as floor planning and power distribution optimization. This test procedure is applicable to testing an IC mounted on any circuit board that is accessible to the scanning probe. In some cases it is useful to scan not only the IC but also ...view more
- Technical specification56 pagesEnglish and French language
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This technical report covers general considerations and guidelines on mitigation methods aimed at ensuring electromagnetic compatibility (EMC) among electrical and electronic apparatus or systems used in industrial, commercial, and residential installations. This technical report is intended for use by installers and users, and to some extent manufacturers, of sensitive electrical or electronic installations and systems, and equipment with high emission levels that could degrade the overall elec...view more
- Technical report31 pagesEnglish language
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IEC 62215-3:2013 specifies a method for measuring the immunity of an integrated circuit (IC) to standardized conducted electrical transient disturbances. The disturbances, not necessarily synchronized to the operation of the device under test (DUT), are applied to the IC pins via coupling networks. This method enables understanding and classification of interaction between conducted transient disturbances and performance degradation induced in ICs regardless of transients within or beyond the sp...view more
- Standard66 pagesEnglish and French language
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IEC 62132-8:2012 specifies a method for measuring the immunity of an integrated circuit (IC) to radio frequency (RF) radiated electromagnetic disturbances over the frequency range of 150 kHz to 3 GHz.
This publication is to be read in conjunction with IEC 62132-1:2006.
- Standard46 pagesEnglish and French language
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IEC 61967-8:2011 defines a method for measuring the electromagnetic radiated emission from an integrated circuit (IC) using an IC stripline in the frequency range of 150 kHz up to 3 GHz. The IC being evaluated is mounted on an EMC test board (PCB) between the active conductor and the ground plane of the IC stripline arrangement.
This publication is to be read in conjunction with IEC 61967-1:2002.
- Standard34 pagesEnglish and French language
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