ASTM F1049-02

Standard Practice for Shallow Etch Pit Detection on Silicon Wafers (Withdrawn 2003

SCOPE
This standard was transferred to SEMI (www.semi.org) May 2003
1.1 This practice is used to detect shallow etch pits, which may be related to the level of metallic impurities near the surface of silicon epitaxial or polished wafers.
1.2 This practice is not recommended for use in defect density evaluations, but as a subjective means of estimating defect densities and distributions on the surface of a polished or epitaxial wafer.
1.3 Silicon crystals doped either  p- or n-type and with resistivities as low as 0.005 Ω ·cm may be evaluated. This practice is applicable for silicon wafers grown in either a (111) or (100) crystal orientation.
1.4 This practice utilizes a thermal oxidation process followed by a chemical preferential etchant to create and then delineate shallow etch pits.
1.5 The values stated in acceptable metric units are to be regarded as the standard. The values in parentheses are for information only.
1.6 This standard does not purport to address all of the safety concerns, if any, associated with its use. It is the responsibility of the user of this standard to establish appropriate safety and health practices and determine the applicability of regulatory limitations prior to use. Specific hazard statements are given in Section 9.

General Information

• Status: Withdrawn
• Publication Date: 09-Dec-2002
• Withdrawal Date: 09-May-2003
• ICS: 29.045 - Semiconducting materials
• Technical Committee: F01 - Electronics

Relations

• Replaces: ASTM F1049-00 - Standard Practice for Shallow Etch Pit Detection on Silicon Wafers
• Effective Date: 10-Dec-2002

Standards Content (Sample)

NOTICE: This standard has either been superceded and replaced by a new version or discontinued.
Contact ASTM International (www.astm.org) for the latest information.
Designation: F 1049 – 02
Standard Practice for
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Shallow Etch Pit Detection on Silicon Wafers
This standard is issued under the fixed designation F 1049; the number immediately following the designation indicates the year of
original adoption or, in the case of revision, the year of last revision. A number in parentheses indicates the year of last reapproval. A
superscript epsilon (e) indicates an editorial change since the last revision or reapproval.
1. Scope F 1810 Test Method for Counting Preferentially Etched or
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Decorated Surface Defects in Silicon Wafers
1.1 This practice is used to detect shallow etch pits, which
2.2 SEMI Standards:
may be related to the level of metallic impurities near the
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C28 Specifications and Guidelines for Hydrofluoric Acid
surface of silicon epitaxial or polished wafers.
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M17 Specification for a Universal Wafer Grid
1.2 This practice is not recommended for use in defect
density evaluations, but as a subjective means of estimating
3. Terminology
defect densities and distributions on the surface of a polished or
3.1 Definitions:
epitaxial wafer.
3.1.1 haze—on a semiconductor wafer, non—localized
1.3 Silicon crystals doped either p-or n-type and with
light scattering resulting from surface topography (micror-
resistivities as low as 0.005 V·cm may be evaluated. This
oughness) or from dense concentrations of surface or near-
practice is applicable for silicon wafers grown in either a (111)
surface imperfections. See also laser light scattering event.
or (100) crystal orientation.
3.1.1.1 Discussion—Haze due to the existence of a collec-
1.4 This practice utilizes a thermal oxidation process fol-
tion of imperfections of the type that result in haze cannot be
lowed by a chemical preferential etchant to create and then
readily distinguished by the eye or other optical detection
delineate shallow etch pits.
system without magnification. In a scanning surface inspection
1.5 The values stated in acceptable metric units are to be
system, haze and laser-light scattering events comprise the
regarded as the standard. The values in parentheses are for
laser surface scanner signal due to light scattering from a wafer
information only.
surface.
1.6 This standard does not purport to address all of the
3.1.2 shallow etch pits—etch pits that are small and shallow
safety concerns, if any, associated with its use. It is the
in depth under high magnification, > 2003.
responsibility of the user of this standard to establish appro-
3.1.2.1 Discussion—Shallow etch pits on silicon wafers are
priate safety and health practices and determine the applica-
shown in Guide F 154 .
bility of regulatory limitations prior to use. Specific hazard
3.1.3 saucer pits—same as shallow etch pits, see 3.1.2.
statements are given in Section 9.
4. Summary of Practice
2. Referenced Documents
4.1 Silicon wafers, either epitaxial or polished, are ther-
2.1 ASTM Standards:
2 mally oxidized and preferential etched. This will reveal small
D 5127 Guide for Electronic Grade Water
etch pits, shallow in depth, when observed through an inter-
F 154 Guide for Identification of Structures and Contami-
3 ference contrast microscope. The distribution of the etch pits
nants Seen on Specular Silicon Surfaces
on the surface of the wafer are determined by illuminating the
F 1725 Guide for Analysis of Crystallographic Perfection of
3 wafer with a high intensity lamp.
Silicon Ingots
F 1727 Practice for Dection of Oxidation Induced Defects
5. Significance and Use
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in Polished Silicon Wafers
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5.1 High levels of etch pits are reported to indicate metallic
F 1809 Guide for Selection and Use of Etching Solutions to
contamination that is detrimental to wafer processing. This can
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Delineate Structural Defects in Silicon
be deduced from the density of etch pits on the surface of the
wafer.
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This practice is under the jurisdiction of ASTM Committee F01 on Electronics
and is the direct responsibility of Subcommittee F01.06 on Silicon Materials and
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Process Control. Available from Semiconductor Equipment and Materials International, 3081
Current edition approved Dec. 10, 2002. Published February 2003. Originally Zanker Road, San Jose, CA 95134 (www.semi.org).
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approved in 1987. Last previous edition approved in 2000 as F 1049 – 00. Pearce, C. W., and McMahon, R. G., “Role of Metallic Contamination in the
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Annual Book of ASTM Standards, Vol 11.01. Formation of 8Saucer’ Pit Defects in Epitaxial Silicon,” Journal of Vacuum Science
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Annual Book of ASTM Standards, Vol 10.05. and Technology, Vol 14, No. 1, 1977, p. 40.
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NOTICE: This standard has either been superceded and replaced by a new version or discontinued.
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