ASTM F533-96

Standard Test Method for Thickness and Thickness Variation of Silicon Wafers

SCOPE
1.1 This test method  covers measurement of the thickness of silicon wafers, polished or unpolished, and estimation of the variation in thickness across the wafer.  
1.2 This test method is intended primarily for use with wafers that meet the dimension and tolerance requirements of SEMI Specifications M1. However, it can be applied to circular silicon wafers, or substrates of any diameter and thickness that can be handled without breaking.  
1.3 This test method is suitable for both contact and contactless gaging equipment. Precision statements have been established for each.  
1.4 The values stated in inch-pound units are to be regarded as standard. The values in parentheses are for information only.  
1.5  This standard does not purport to address all of the safety concerns, if any, associated with its use. It is the responsibility of the user of this standard to establish appropriate safety and health practices and determine the applicability of regulatory limitations prior to use.

General Information

• Status: Historical
• Publication Date: 09-Jan-2002
• ICS: 29.045 - Semiconducting materials
• Technical Committee: F01 - Electronics

Relations

• Replaced By: ASTM F533-02 - Standard Test Method for Thickness and Thickness Variation of Silicon Wafers
• Effective Date: 10-Jan-2002

Standards Content (Sample)

NOTICE: This standard has either been superseded and replaced by a new version or discontinued.
Contact ASTM International (www.astm.org) for the latest information.
Designation: F 533 – 96
Standard Test Method for
Thickness and Thickness Variation of Silicon Wafers
This standard is issued under the fixed designation F 533; the number immediately following the designation indicates the year of
original adoption or, in the case of revision, the year of last revision. A number in parentheses indicates the year of last reapproval. A
superscript epsilon (e) indicates an editorial change since the last revision or reapproval.
1. Scope 3. Terminology
1.1 This test method covers measurement of the thickness 3.1 Definitions:
of silicon wafers, polished or unpolished, and estimation of the 3.1.1 back surface—of a semiconductor wafer, the exposed
variation in thickness across the wafer. surface opposite to that upon which active semiconductor
1.2 This test method is intended primarily for use with devices have been or will be fabricated.
wafers that meet the dimension and tolerance requirements of 3.1.2 front surface—of a semiconductor wafer, the exposed
SEMI Specifications M 1. However, it can be applied to surface upon which active semiconductor devices have been or
circular silicon, wafers or substrates of any diameter and will be fabricated.
thickness that can be handled without breaking. 3.1.3 thickness—of a semiconductor wafer, the distance
1.3 This test method is suitable for both contact and through the wafer between corresponding points on the front
contactless gaging equipment. Precision statements have been and back surfaces.
established for each. 3.1.4 total thickness variation, TTV—of a semiconductor
1.4 The values stated in inch-pound units are to be regarded wafer, the difference between the maximum and minimum
as standard. The values in parentheses are for information only. values of the thickness of the wafer.
1.5 This standard does not purport to address all of the
4. Summary of Test Method
safety concerns, if any, associated with its use. It is the
4.1 The thickness of the wafer is measured at its center and
responsibility of the user of this standard to establish appro-
priate safety and health practices and determine the applica- at four other sites whose positions are defined with respect to
the primary flat or other index mark. Two of the sites fall along
bility of regulatory limitations prior to use.
a diameter and two along a second diameter, perpendicular to
2. Referenced Documents
the first.
2.1 SEMI Standard: 4.2 The thickness measured at the center of the wafer is
Specifications M 1, for Polished Monocrystalline Silicon generally taken as the nominal thickness of the wafer.
Wafers 4.3 The maximum difference between any two of the five
2.2 Federal Standards: thickness measurements is taken as the total thickness variation
Fed. Std. No. 209B Clean Room and Work Station Require- of the wafer.
ments, Controlled Environment
5. Significance and Use
Fed. Spec. GGG-G-15C Gage Blocks and Accessories (Inch
5.1 Wafer thickness and thickness variations must be con-
and Metric), Nov. 6, 1970
trolled to suit the requirements of fixtures and equipment used
in microelectronic processing. Estimates of these parameters,
This test method is under the jurisdiction of ASTM Committee F-1 on
based on a representative sample from a given lot of wafers,
Electronics and is the direct responsibility of Subcommittee F01.06 on Electrical
will aid in determining whether or not wafers from that lot are
and Optical Measurement.
acceptable for the intended processing steps.
Current edition approved June 10, 1996. Published August 1996. Originally
5.2 Wafers that are too thin may break during normal
published as F 533 – 77 T. Last previous edition F 533 – 90.
DIN 50441/1 is an equivalent method. It is the responsibility of DIN Committee
processing operations. Wafers that are too thick may cause
NMP 221, with which Committee F-1 maintains close liaison. DIN 50441/1.
mechanical jamming. Wafers with thicknesses outside the
Determinaton of the Geometric Dimensions of Semiconductor Slices; Measurement
desired tolerance may not have appropriate thermal mass or
of Thickness, available from Beuth Verlag, Gmbh, Burggrafenstrasse 4-10, D-1000
Berlin 30, Federal Republic of Germany. electrical resistance for certain processing steps.
Available from Semiconductor Equipment and Materials International, 805
5.3 Excessive thickness variations may cause problems with
East Middlefield Rd., Mountain View, CA 94043.
mechanical handling of the wafers during processing. In
Available from GSA Business Service Centers in Boston, New York, Atlanta,
addition, such variations may cause deviations from surface
Chicago, Kansas City, Mo., Fort Worth, Denver, San Francisco, Los Angeles, and
Seattle.
flatness that adversely affect photolithographic processes. The
Available from the Superintendent of Documents, U.S. Government Printing
effect of thickness variations on photolithographic processes
Office, Washington, DC 20402.
Copyright © ASTM, 100 Barr Harbor Drive, West Conshohocken, PA 19428-2959, United States.
F 533
depends on the line width and registration requirements of 7.3 Clean Facility—A controlled-environment work station
individual circuit designs, as well as on the specific optical and satisfying the Class 10 000 requirements of Fed. Std. No.
mechanical design of the photolithographic processing equip- 209B.
ment being used. 7.4 Scribe—A scribe or other means for producing an index
5.4 This test method is intended for use for materials mark on the wafer, if required.
acceptance and process control purposes. This test method may 7.5 Thickness Calibration Standards—A set of thickness
be applied at any point during the processing of unpolished standards, traceable to the National Bureau of Standards,
wafers into polished wafers or substrates. whose nominal thickness values range from 0.005 to 0.050 in.
(0.13 to 1.27 mm) in steps of 0.005 6 0.001 in. (0.13 6 0.025
6. Inferferences
mm).
7.5.1 Standard thickness values shall be known to within 10
6.1 Since the determination of total thickness variation by
μin. (0.25 μm).
this test method is based on measurements of wafer thickness
7.5.2 For contactless gages, the calibration standards shall
at only five sites, irregular geometrical variations in other parts
2 2
have an area of at least 0.25 in. (1.6 cm ) with a minimum
of the wafer will not be detected.
side length of 0.5 in. (13 mm). The thickness variation must be
6.2 Local changes in thickness at any site may result in
less than 0.0001 in., or 2 μm, as determined for any two points
erroneous readings. Such local changes in thickness may be
1 in. (25 mm) apart. See Note 5.
caused by surface defects such as chips, contaminants,
7.5.3 For contact gages, normally available standards of
mounds, pits, saw steps, waves, and so forth.
0.36 by 1.12 in. (9.1 by 28.4 mm) shall be acceptable.
7. Apparatus
NOTE 2—Further details are available in Fed. Spec. GGG-G-15C.
7.1 Thickness Gage, suitable for measuring the thickness of
8. Sampling
semiconductor wafers over the anticipated range. The least
8.1 This test method is intended to be used on a sampling
count of the instrument shall be no larger than 0.0001 in., or 2
basis. Procedures for selecting the sample from each lot of
μm. The contact area for contact-type gages shall not exceed
2 2
wafers to be tested shall be agreed upon between the parties to
0.003 in. (2 mm ). For contactless gages, the probed area
2 2
the test, as shall the definition of what constitutes a lot.
shall not exceed 0.2 in. (129 mm ).
9. Test Specimen
NOTE 1—Thickness ranges for standard silicon wafers are given in
SEMI Specifications M 1. A thickness gage covering the range from 0.005
9.1 If the specimen wafer does not contain reference flats,
to 0.050 in. (0.13 to 1.3 mm) should be adequate for most nonstandard
such as those specified in SEMI Specifications M 1, use the
wafers.
scribe to place an index mark at a point near the periphery of
7.2 Fixture, to support the wafer during thickness measure- the back surface of the wafer.
ments. The fixture shall include provision for rotating the wafer 9.2 Ensure that the specimen has an identifiable surface to
about its center in the wafer plane and sufficient markings to enable interlaboratory location of measurement sites.
facilitate positioning of the wafer so that thickness measure- 9.2.1 If the front and back specimen surfaces are different in
ments can be made within 0.08 in. (2 mm) of each specified appearance, specify the front surface.
measurement site (see Fig. 1). 9.2.2 If both surfaces are identical, an i
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