iTeh StandardsiTeh Standards
EURUSD
Your shopping cart is empty.
ASTM

ASTM F1192-11(2018)

(Guide)

Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion Irradiation of Semiconductor Devices

Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion Irradiation of Semiconductor Devices

SIGNIFICANCE AND USE
5.1 Many modern integrated circuits, power transistors, and other devices experience SEP when exposed to cosmic rays in interplanetary space, in satellite orbits or during a short passage through trapped radiation belts. It is essential to be able to predict the SEP rate for a specific environment in order to establish proper techniques to counter the effects of such upsets in proposed systems. As the technology moves toward higher density ICs, the problem is likely to become even more acute.  
5.2 This guide is intended to assist experimenters in performing ground tests to yield data enabling SEP predictions to be made.
SCOPE
1.1 This guide defines the requirements and procedures for testing integrated circuits and other devices for the effects of single event phenomena (SEP) induced by irradiation with heavy ions having an atomic number Z ≥ 2. This description specifically excludes the effects of neutrons, protons, and other lighter particles that may induce SEP via another mechanism. SEP includes any manifestation of upset induced by a single ion strike, including soft errors (one or more simultaneous reversible bit flips), hard errors (irreversible bit flips), latchup (persistent high conducting state), transients induced in combinatorial devices which may introduce a soft error in nearby circuits, power field effect transistor (FET) burn-out and gate rupture. This test may be considered to be destructive because it often involves the removal of device lids prior to irradiation. Bit flips are usually associated with digital devices and latchup is usually confined to bulk complementary metal oxide semiconductor, (CMOS) devices, but heavy ion induced SEP is also observed in combinatorial logic programmable read only memory, (PROMs), and certain linear devices that may respond to a heavy ion induced charge transient. Power transistors may be tested by the procedure called out in Method 1080 of MIL STD 750.  
1.2 The procedures described here can be used to simulate and predict SEP arising from the natural space environment, including galactic cosmic rays, planetary trapped ions, and solar flares. The techniques do not, however, simulate heavy ion beam effects proposed for military programs. The end product of the test is a plot of the SEP cross section (the number of upsets per unit fluence) as a function of ion LET (linear energy transfer or ionization deposited along the ion's path through the semiconductor). This data can be combined with the system's heavy ion environment to estimate a system upset rate.  
1.3 Although protons can cause SEP, they are not included in this guide. A separate guide addressing proton induced SEP is being considered.  
1.4 The values stated in SI units are to be regarded as standard. No other units of measurement are included in this standard.  
1.5 This standard does not purport to address all of the safety concerns, if any, associated with its use. It is the responsibility of the user of this standard to establish appropriate safety, health, and environmental practices and determine the applicability of regulatory limitations prior to use.  
1.6 This international standard was developed in accordance with internationally recognized principles on standardization established in the Decision on Principles for the Development of International Standards, Guides and Recommendations issued by the World Trade Organization Technical Barriers to Trade (TBT) Committee.

General Information

Status
Published
Publication Date
28-Feb-2018
ICS
31.080.01 - Semiconductor devices in general
Technical Committee
E10 - Nuclear Technology and Applications
Drafting Committee
E10.07 - Radiation Dosimetry for Radiation Effects on Materials and Devices
Current Stage
Ref Project

Buy Standard

ASTM F1192-11(2018) - Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion Irradiation of Semiconductor DevicesASTM F1192-11(2018) - Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion Irradiation of Semiconductor Devices
PreviousNext
Guide
ASTM F1192-11(2018) - Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion Irradiation of Semiconductor Devices
English language
11 pages
sale 15% off
Preview
sale 15% off
Preview

Standards Content (Sample)

This international standard was developed in accordance with internationally recognized principles on standardization established in the Decision on Principles for the
Development of International Standards, Guides and Recommendations issued by the World Trade Organization Technical Barriers to Trade (TBT) Committee.
Designation: F1192 − 11 (Reapproved 2018)
Standard Guide for the
Measurement of Single Event Phenomena (SEP) Induced by
1
Heavy Ion Irradiation of Semiconductor Devices
This standard is issued under the fixed designation F1192; the number immediately following the designation indicates the year of
original adoption or, in the case of revision, the year of last revision. A number in parentheses indicates the year of last reapproval. A
superscript epsilon (´) indicates an editorial change since the last revision or reapproval.
This standard has been approved for use by agencies of the U.S. Department of Defense.
1. Scope 1.3 Although protons can cause SEP, they are not included
in this guide. A separate guide addressing proton induced SEP
1.1 This guide defines the requirements and procedures for
is being considered.
testing integrated circuits and other devices for the effects of
single event phenomena (SEP) induced by irradiation with 1.4 The values stated in SI units are to be regarded as
heavy ions having an atomic number Z ≥ 2. This description standard. No other units of measurement are included in this
specifically excludes the effects of neutrons, protons, and other standard.
lighter particles that may induce SEP via another mechanism.
1.5 This standard does not purport to address all of the
SEP includes any manifestation of upset induced by a single
safety concerns, if any, associated with its use. It is the
ion strike, including soft errors (one or more simultaneous
responsibility of the user of this standard to establish appro-
reversible bit flips), hard errors (irreversible bit flips), latchup
priate safety, health, and environmental practices and deter-
(persistent high conducting state), transients induced in com-
mine the applicability of regulatory limitations prior to use.
binatorial devices which may introduce a soft error in nearby
1.6 This international standard was developed in accor-
circuits, power field effect transistor (FET) burn-out and gate
dance with internationally recognized principles on standard-
rupture. This test may be considered to be destructive because
ization established in the Decision on Principles for the
it often involves the removal of device lids prior to irradiation.
Development of International Standards, Guides and Recom-
Bit flips are usually associated with digital devices and latchup
mendations issued by the World Trade Organization Technical
is usually confined to bulk complementary metal oxide
Barriers to Trade (TBT) Committee.
semiconductor, (CMOS) devices, but heavy ion induced SEP is
2. Referenced Documents
also observed in combinatorial logic programmable read only
2
memory, (PROMs), and certain linear devices that may re-
2.1 Military Standard:
spond to a heavy ion induced charge transient. Power transis-
750 Method 1080
tors may be tested by the procedure called out in Method 1080
of MIL STD 750. 3. Terminology
1.2 The procedures described here can be used to simulate 3.1 Definitions of Terms Specific to This Standard:
and predict SEP arising from the natural space environment, 3.1.1 DUT—device under test.
including galactic cosmic rays, planetary trapped ions, and
3.1.2 fluence—the flux integrated over time, expressed as
2
solar flares. The techniques do not, however, simulate heavy
ions/cm .
ion beam effects proposed for military programs. The end
2
3.1.3 flux—the number of ions/s passing through a one cm
product of the test is a plot of the SEP cross section (the
2
area perpendicular to the beam (ions/cm -s).
number of upsets per unit fluence) as a function of ion LET
3.1.4 LET—the linear energy transfer, also known as the
(linear energy transfer or ionization deposited along the ion’s
stopping power dE/dx, is the amount of energy deposited per
path through the semiconductor). This data can be combined
unit length along the path of the incident ion, typically
with the system’s heavy ion environment to estimate a system
2
normalized by the target density and expressed as MeV-cm /
upset rate.
mg.
3.1.4.1 Discussion—LET values are obtained by dividing
1 the energy per unit track length by the density of the irradiated
This guide is under the jurisdiction of ASTM Committee E10 on Nuclear
Technology and Applications and is the direct responsibility of Subcommittee medium. Since the energy lost along the track generates
E10.07 on Radiation Dosimetry for Radiation Effects on Materials and Devices.
Current edition approved March 1, 2018. Published April 2018. Originally
2
approved in 1988. Last previous edition approved in 2011 as F1192–11. DOI: Available from Standardization Documents Order Desk, Bldg. 4, Section D,
10.1520/F1192-11R18. 700 Robbins Ave.,
...

Questions, Comments and Discussion

Ask us and Technical Secretary will try to provide an answer. You can facilitate discussion about the standard in here.

This May Also Interest You

ASTM
ASTM E722-19(Practice)
Standard Practice for Characterizing Neutron Fluence Spectra in Terms of an Equivalent Monoenergetic Neutron Fluence for Radiation-Hardness Testing of Electronics

SIGNIFICANCE AND USE
5.1 This practice is important in characterizing the radiation hardness of electronic devices irradiated by neutrons. This characterization makes it feasible to predict some changes in operational properties of irradiated semiconductor devices or electronic systems. To facilitate uniformity of the interpretation and evaluation of results of irradiations by sources of different fluence spectra, it is convenient to reduce the incident neutron fluence from a source to a single parameter—an equivalent monoenergetic neutron fluence—applicable to a particular semiconductor material.  
5.2 In order to determine an equivalent monoenergetic neutron fluence, it is necessary to evaluate the displacement damage of the particular semiconductor material. Ideally, this quantity is correlated to the degradation of a specific functional performance parameter (such as current gain) of the semiconductor device or system being tested. However, this correlation has not been established unequivocally for all device types and performance parameters since, in many instances, other effects also can be important. Ionization effects produced by the incident neutron fluence or by gamma rays in a mixed neutron fluence, short-term and long-term annealing, and other factors can contribute to observed performance degradation (damage). Thus, caution should be exercised in making a correlation between calculated displacement damage and performance degradation of a given electronic device. The types of devices for which this correlation is applicable, and numerical evaluation of displacement damage are discussed in the annexes.  
5.3 The concept of 1-MeV equivalent fluence is widely used in the radiation-hardness testing community. It has merits and disadvantages that have been debated widely  (9-12). For these reasons, specifics of a standard application of the 1-MeV equivalent fluence are presented in the annexes.
SCOPE
1.1 This practice covers procedures for characterizing neutron fluence from a source in terms of an equivalent monoenergetic neutron fluence. It is applicable to neutron effects testing, to the development of test specifications, and to the characterization of neutron test environments. The sources may have a broad neutron-energy range, or may be mono-energetic neutron sources with energies up to 20 MeV. This practice is not applicable in cases where the predominant source of displacement damage is from neutrons of energy less than 10 keV. The relevant equivalence is in terms of a specified effect on certain physical properties of materials upon which the source spectrum is incident. In order to achieve this, knowledge of the effects of neutrons as a function of energy on the specific property of the material of interest is required. Sharp variations in the effects with neutron energy may limit the usefulness of this practice in the case of mono-energetic sources.  
1.2 This practice is presented in a manner to be of general application to a variety of materials and sources. Correlation between displacements (1-3)2 caused by different particles (electrons, neutrons, protons, and heavy ions) is out of the scope of this practice but is addressed in Practice E3084. In radiation-hardness testing of electronic semiconductor devices, specific materials of interest include silicon and gallium arsenide, and the neutron sources generally are test and research reactors and californium-252 irradiators.  
1.3 The technique involved relies on the following factors: (1) a detailed determination of the fluence spectrum of the neutron source, and (2) a knowledge of the degradation (damage) effects of neutrons as a function of energy on specific material properties.  
1.4 The detailed determination of the neutron fluence spectrum referred to in 1.3 need not be performed afresh for each test exposure, provided the exposure conditions are repeatable. When the spectrum determination is not repeated, a neutron fluence monit...

  • Standard
    28 pages
    English language
    sale 15% off
  • Standard
    28 pages
    English language
    sale 15% off
ASTM
ASTM F1892-12(2018)(Guide)
Standard Guide for Ionizing Radiation (Total Dose) Effects Testing of Semiconductor Devices

SIGNIFICANCE AND USE
5.1 Electronic circuits used in space, military, and nuclear power systems may be exposed to various levels of ionizing radiation. It is essential for the design and fabrication of such circuits that test methods be available that can determine the vulnerability or hardness (measure of nonvulnerability) of components to be used in such systems.  
5.2 Some manufacturers currently are selling semiconductor parts with guaranteed hardness ratings. Use of this guide provides a basis for standardized qualification and acceptance testing.
SCOPE
1.1 This guide presents background and guidelines for establishing an appropriate sequence of tests and data analysis procedures for determining the ionizing radiation (total dose) hardness of microelectronic devices for dose rates below 300 rd(SiO2)/s. These tests and analysis will be appropriate to assist in the determination of the ability of the devices under test to meet specific hardness requirements or to evaluate the parts for use in a range of radiation environments.  
1.2 The methods and guidelines presented will be applicable to characterization, qualification, and lot acceptance of silicon-based MOS and bipolar discrete devices and integrated circuits. They will be appropriate for treatment of the effects of electron and photon irradiation.  
1.3 This guide provides a framework for choosing a test sequence based on general characteristics of the parts to be tested and the radiation hardness requirements or goals for these parts.  
1.4 This guide provides for tradeoffs between minimizing the conservative nature of the testing method and minimizing the required testing effort.  
1.5 Determination of an effective and economical hardness test typically will require several kinds of decisions. A partial enumeration of the decisions that typically must be made is as follows:  
1.5.1 Determination of the Need to Perform Device Characterization—For some cases it may be more appropriate to adopt some kind of worst case testing scheme that does not require device characterization. For other cases it may be most effective to determine the effect of dose-rate on the radiation sensitivity of a device. As necessary, the appropriate level of detail of such a characterization also must be determined.  
1.5.2 Determination of an Effective Strategy for Minimizing the Effects of Irradiation Dose Rate on the Test Result—The results of radiation testing on some types of devices are relatively insensitive to the dose rate of the radiation applied in the test. In contrast, many MOS devices and some bipolar devices have a significant sensitivity to dose rate. Several different strategies for managing the dose rate sensitivity of test results will be discussed.  
1.5.3 Choice of an Effective Test Methodology—The selection of effective test methodologies will be discussed.  
1.6 Low Dose Requirements—Hardness testing of MOS and bipolar microelectronic devices for the purpose of qualification or lot acceptance is not necessary when the required hardness is 100 rd(SiO2) or lower.  
1.7 Sources—This guide will cover effects due to device testing using irradiation from photon sources, such as 60Co γ irradiators,  137Cs γ irradiators, and low energy (approximately 10 keV) X-ray sources. Other sources of test radiation such as linacs, Van de Graaff sources, Dymnamitrons, SEMs, and flash X-ray sources occasionally are used but are outside the scope of this guide.  
1.8 Displacement damage effects are outside the scope of this guide, as well.  
1.9 The values stated in SI units are to be regarded as the standard.  
1.10 This international standard was developed in accordance with internationally recognized principles on standardization established in the Decision on Principles for the Development of International Standards, Guides and Recommendations issued by the World Trade Organization Technical Barriers to Trade (TBT) Committee.

  • Guide
    41 pages
    English language
    sale 15% off
ASTM
ASTM F1190-18(Guide)
Standard Guide for Neutron Irradiation of Unbiased Electronic Components

SIGNIFICANCE AND USE
5.1 Semiconductor devices can be permanently damaged by neutrons (1, 2)6. The effect of such damage on the performance of an electronic component can be determined by measuring the component’s electrical characteristics before and after exposure to fast neutrons in the neutron fluence range of interest. The resulting data can be utilized in the design of electronic circuits that are tolerant of the degradation exhibited by that component.  
5.2 This guide provides a method by which the exposure of silicon and gallium arsenide semiconductor devices to neutron irradiation may be performed in a manner that is repeatable and which will allow comparison to be made of data taken at different facilities.  
5.3 For semiconductors other than silicon and gallium arsenide, applicable validated 1-MeV damage functions are not available in codified National standards. In the absence of a validated 1-MeV damage function, the non-ionizing energy loss (NIEL) or the displacement kerma, as a function of incident neutron energy, normalized to the response in the 1 MeV energy region, may be used as an approximation. See Practice E722 for a description of the method used to determine the damage functions in Si and GaAs (3).
SCOPE
1.1 This guide strictly applies only to the exposure of unbiased silicon (Si) or gallium arsenide (GaAs) semiconductor components (integrated circuits, transistors, and diodes) to neutron radiation to determine the permanent damage in the components. Validated 1-MeV displacement damage functions codified in National Standards are not currently available for other semiconductor materials.  
1.2 Elements of this guide, with the deviations noted, may also be applicable to the exposure of semiconductors comprised of other materials except that validated 1-MeV displacement damage functions codified in National standards are not currently available.  
1.3 Only the conditions of exposure are addressed in this guide. The effects of radiation on the test sample should be determined using appropriate electrical test methods.  
1.4 This guide addresses those issues and concerns pertaining to irradiations with neutrons.  
1.5 System and subsystem exposures and test methods are not included in this guide.  
1.6 The range of interest for neutron fluence in displacement damage semiconductor testing range from approximately 109 to 1016  1-MeV n/cm2.  
1.7 This guide does not address neutron-induced single or multiple neutron event effects or transient annealing.  
1.8 This guide provides an alternative to Test Method 1017, Neutron Displacement Testing, a component of MIL-STD-883 and MIL-STD-750.  
1.9 This standard does not purport to address all of the safety concerns, if any, associated with its use. It is the responsibility of the user of this standard to establish appropriate safety, health, and environmental practices and determine the applicability of regulatory limitations prior to use.  
1.10 This international standard was developed in accordance with internationally recognized principles on standardization established in the Decision on Principles for the Development of International Standards, Guides and Recommendations issued by the World Trade Organization Technical Barriers to Trade (TBT) Committee.

  • Guide
    6 pages
    English language
    sale 15% off
  • Guide
    6 pages
    English language
    sale 15% off
ASTM
ASTM E431-96(2022)(Guide)
Standard Guide to Interpretation of Radiographs of Semiconductors and Related Devices

SIGNIFICANCE AND USE
4.1 Illustrations provided in this guide are intended for use as references to aid in interpreting film or nonfilm images resulting from x-ray examinations (see Table 1) to ascertain quality of assembly and workmanship.  
4.2 Required attributes of the design features or other construction details are not provided but are to be established as mutually agreed upon by manufacturers and users of these devices. Many devices share common assembly features; thus, these interpretations can be used for components not illustrated.
SCOPE
1.1 This guide provides illustrations of radiographs of semiconductors and related devices. Low powered transistors (through the TO-11 case configuration), diodes, low-power rectifiers, power devices, and integrated circuits are illustrated with common assembly features. Particular areas of construction are featured for these devices detailing critical points of design or assembly.  
1.2 This standard does not purport to address all of the safety concerns, if any, associated with its use. It is the responsibility of the user of this standard to establish appropriate safety, health, and environmental practices and determine the applicability of regulatory limitations prior to use.  
1.3 This international standard was developed in accordance with internationally recognized principles on standardization established in the Decision on Principles for the Development of International Standards, Guides and Recommendations issued by the World Trade Organization Technical Barriers to Trade (TBT) Committee.

  • Guide
    7 pages
    English language
    sale 15% off
ASTM
ASTM E1161-21(Practice)
Standard Practice for Radiographic Examination of Semiconductors and Electronic Components

SIGNIFICANCE AND USE
4.1 This practice establishes the basic minimum parameters and controls for the application of radiographic examination of electronic devices. Factors such as device handling, equipment, ESDS, materials, personnel qualification, procedure and quality requirements, reporting, records and radiation sensitivity are addressed. This practice is written so it can be specified on the engineering drawing, specification, or contract. It is not a detailed how-to procedure and must be supplemented by a detailed examination technique/procedure (see 10.1).  
4.2 This practice does not set limits on radiation dose but does list requirements to limit and document radiation dose to devices. When radiation dose limits are an issue, the requestor of radiographic examinations must be cognizant of this issue and state any maximum radiation dose limitations that are required in the contractual agreement between the using parties.
SCOPE
1.1 This practice provides the minimum requirements for nondestructive radiographic examination of semiconductor devices, microelectronic devices, electromagnetic devices, electronic and electrical devices, and the materials used for construction of these items.  
1.2 This practice covers the radiographic examination of these items to detect possible defective conditions within the sealed case, especially those resulting from sealing the lid to the case, and internal defects such as extraneous material (foreign objects), improper interconnecting wires, voids in the die attach material or in the glass (when sealing glass is used), solder defects, or physical damage.  
1.3 Basis of Application—There are areas in this practice that may require agreement between the cognizant engineering organization and the supplier, or specific direction from the cognizant engineering organization. These items should be addressed in the purchase order, contract, or inspection technique. Specific applications may require adherence to this practice in part or in full. Deviations from this practice shall be enumerated in inspection plan and approved by both cognizant engineering organization and supplier.  
1.4 Units—The values stated in inch-pound units are to be regarded as standard. No other units of measurement are included in this practice.  
1.5 This standard does not purport to address all of the safety concerns, if any, associated with its use. It is the responsibility of the user of this standard to establish appropriate safety, health, and environmental practices and determine the applicability of regulatory limitations prior to use.  
1.6 This international standard was developed in accordance with internationally recognized principles on standardization established in the Decision on Principles for the Development of International Standards, Guides and Recommendations issued by the World Trade Organization Technical Barriers to Trade (TBT) Committee.

  • Standard
    11 pages
    English language
    sale 15% off
  • Standard
    11 pages
    English language
    sale 15% off
ASTM
ASTM F72-21(Specification)
Standard Specification for Gold Wire for Semiconductor Lead Bonding

ABSTRACT
This specification covers round drawn/extruded gold wires for internal semiconductor device electrical connections. The wires are available in four classifications, namely: copper-modified wire, beryllium-modified wire, high-strength wire, and special purpose wire. Aptly sampled wires shall be examined by test methods suggested herein, and each class shall conform correspondingly to specified requirements for chemical composition, mechanical properties (breaking load and elongation), dimension (diameter and weight), and workmanship and finish. The wires shall also undergo wire curl, wire axial twist, and wire roundness tests.
SCOPE
1.1 This specification covers round drawn/extruded gold wire for internal semiconductor device electrical connections. Four classifications of wire are distinguished, (1) copper-modified wire, (2) beryllium-modified wire, (3) high-strength wire, and (4) special purpose wire.  
Note 1: Trace metallic elements have a significant effect upon the mechanical properties and thermal stability of high-purity gold wire. It is customary in manufacturing to add controlled amounts of selected impurities to gold to modify or stabilize bonding wire properties, or both. This practice is known variously as “modifying,” “stabilizing,” or “doping.” The first two wire classifications denoted in this specification refer to wire made with either of two particular modifiers, copper or beryllium, in general use. In the third and fourth wire classifications, “high-strength” and “special purpose” wire, the identity of modifying additives is not restricted.  
1.2 The values stated in SI units are to be regarded as standard. The values given in parentheses after SI units are provided for information only and are not considered standard.  
1.3 The following hazard caveat pertains only to the test method portion, Section 9, of this specification.  This standard does not purport to address all of the safety concerns, if any, associated with its use. It is the responsibility of the user of this standard to establish appropriate safety, health, and environmental practices and determine the applicability of regulatory limitations prior to use.  
1.4 This international standard was developed in accordance with internationally recognized principles on standardization established in the Decision on Principles for the Development of International Standards, Guides and Recommendations issued by the World Trade Organization Technical Barriers to Trade (TBT) Committee.

  • Technical specification
    11 pages
    English language
    sale 15% off
  • Technical specification
    11 pages
    English language
    sale 15% off
ASTM
ASTM E722-19(Practice)
Standard Practice for Characterizing Neutron Fluence Spectra in Terms of an Equivalent Monoenergetic Neutron Fluence for Radiation-Hardness Testing of Electronics

SIGNIFICANCE AND USE
5.1 This practice is important in characterizing the radiation hardness of electronic devices irradiated by neutrons. This characterization makes it feasible to predict some changes in operational properties of irradiated semiconductor devices or electronic systems. To facilitate uniformity of the interpretation and evaluation of results of irradiations by sources of different fluence spectra, it is convenient to reduce the incident neutron fluence from a source to a single parameter—an equivalent monoenergetic neutron fluence—applicable to a particular semiconductor material.  
5.2 In order to determine an equivalent monoenergetic neutron fluence, it is necessary to evaluate the displacement damage of the particular semiconductor material. Ideally, this quantity is correlated to the degradation of a specific functional performance parameter (such as current gain) of the semiconductor device or system being tested. However, this correlation has not been established unequivocally for all device types and performance parameters since, in many instances, other effects also can be important. Ionization effects produced by the incident neutron fluence or by gamma rays in a mixed neutron fluence, short-term and long-term annealing, and other factors can contribute to observed performance degradation (damage). Thus, caution should be exercised in making a correlation between calculated displacement damage and performance degradation of a given electronic device. The types of devices for which this correlation is applicable, and numerical evaluation of displacement damage are discussed in the annexes.  
5.3 The concept of 1-MeV equivalent fluence is widely used in the radiation-hardness testing community. It has merits and disadvantages that have been debated widely  (9-12). For these reasons, specifics of a standard application of the 1-MeV equivalent fluence are presented in the annexes.
SCOPE
1.1 This practice covers procedures for characterizing neutron fluence from a source in terms of an equivalent monoenergetic neutron fluence. It is applicable to neutron effects testing, to the development of test specifications, and to the characterization of neutron test environments. The sources may have a broad neutron-energy range, or may be mono-energetic neutron sources with energies up to 20 MeV. This practice is not applicable in cases where the predominant source of displacement damage is from neutrons of energy less than 10 keV. The relevant equivalence is in terms of a specified effect on certain physical properties of materials upon which the source spectrum is incident. In order to achieve this, knowledge of the effects of neutrons as a function of energy on the specific property of the material of interest is required. Sharp variations in the effects with neutron energy may limit the usefulness of this practice in the case of mono-energetic sources.  
1.2 This practice is presented in a manner to be of general application to a variety of materials and sources. Correlation between displacements (1-3)2 caused by different particles (electrons, neutrons, protons, and heavy ions) is out of the scope of this practice but is addressed in Practice E3084. In radiation-hardness testing of electronic semiconductor devices, specific materials of interest include silicon and gallium arsenide, and the neutron sources generally are test and research reactors and californium-252 irradiators.  
1.3 The technique involved relies on the following factors: (1) a detailed determination of the fluence spectrum of the neutron source, and (2) a knowledge of the degradation (damage) effects of neutrons as a function of energy on specific material properties.  
1.4 The detailed determination of the neutron fluence spectrum referred to in 1.3 need not be performed afresh for each test exposure, provided the exposure conditions are repeatable. When the spectrum determination is not repeated, a neutron fluence monit...

  • Standard
    28 pages
    English language
    sale 15% off
  • Standard
    28 pages
    English language
    sale 15% off
ASTM
ASTM F1892-12(2018)(Guide)
Standard Guide for Ionizing Radiation (Total Dose) Effects Testing of Semiconductor Devices

SIGNIFICANCE AND USE
5.1 Electronic circuits used in space, military, and nuclear power systems may be exposed to various levels of ionizing radiation. It is essential for the design and fabrication of such circuits that test methods be available that can determine the vulnerability or hardness (measure of nonvulnerability) of components to be used in such systems.  
5.2 Some manufacturers currently are selling semiconductor parts with guaranteed hardness ratings. Use of this guide provides a basis for standardized qualification and acceptance testing.
SCOPE
1.1 This guide presents background and guidelines for establishing an appropriate sequence of tests and data analysis procedures for determining the ionizing radiation (total dose) hardness of microelectronic devices for dose rates below 300 rd(SiO2)/s. These tests and analysis will be appropriate to assist in the determination of the ability of the devices under test to meet specific hardness requirements or to evaluate the parts for use in a range of radiation environments.  
1.2 The methods and guidelines presented will be applicable to characterization, qualification, and lot acceptance of silicon-based MOS and bipolar discrete devices and integrated circuits. They will be appropriate for treatment of the effects of electron and photon irradiation.  
1.3 This guide provides a framework for choosing a test sequence based on general characteristics of the parts to be tested and the radiation hardness requirements or goals for these parts.  
1.4 This guide provides for tradeoffs between minimizing the conservative nature of the testing method and minimizing the required testing effort.  
1.5 Determination of an effective and economical hardness test typically will require several kinds of decisions. A partial enumeration of the decisions that typically must be made is as follows:  
1.5.1 Determination of the Need to Perform Device Characterization—For some cases it may be more appropriate to adopt some kind of worst case testing scheme that does not require device characterization. For other cases it may be most effective to determine the effect of dose-rate on the radiation sensitivity of a device. As necessary, the appropriate level of detail of such a characterization also must be determined.  
1.5.2 Determination of an Effective Strategy for Minimizing the Effects of Irradiation Dose Rate on the Test Result—The results of radiation testing on some types of devices are relatively insensitive to the dose rate of the radiation applied in the test. In contrast, many MOS devices and some bipolar devices have a significant sensitivity to dose rate. Several different strategies for managing the dose rate sensitivity of test results will be discussed.  
1.5.3 Choice of an Effective Test Methodology—The selection of effective test methodologies will be discussed.  
1.6 Low Dose Requirements—Hardness testing of MOS and bipolar microelectronic devices for the purpose of qualification or lot acceptance is not necessary when the required hardness is 100 rd(SiO2) or lower.  
1.7 Sources—This guide will cover effects due to device testing using irradiation from photon sources, such as 60Co γ irradiators,  137Cs γ irradiators, and low energy (approximately 10 keV) X-ray sources. Other sources of test radiation such as linacs, Van de Graaff sources, Dymnamitrons, SEMs, and flash X-ray sources occasionally are used but are outside the scope of this guide.  
1.8 Displacement damage effects are outside the scope of this guide, as well.  
1.9 The values stated in SI units are to be regarded as the standard.  
1.10 This international standard was developed in accordance with internationally recognized principles on standardization established in the Decision on Principles for the Development of International Standards, Guides and Recommendations issued by the World Trade Organization Technical Barriers to Trade (TBT) Committee.

  • Guide
    41 pages
    English language
    sale 15% off
ASTM
ASTM F1893-18(Guide)
Guide for Measurement of Ionizing Dose-Rate Survivability and Burnout of Semiconductor Devices

SIGNIFICANCE AND USE
5.1 The use of FXR or LINAC radiation sources for the determination of high dose-rate burnout in semiconductor devices is addressed in this guide. The goal of this guide is to provide a systematic approach to testing semiconductor devices for burnout or survivability.  
5.2 The different types of failure modes that are possible are defined and discussed in this guide. Specifically, failure can be defined by a change in device parameters, or by a catastrophic failure of the device.  
5.3 This guide can be used to determine if a device survives (that is, continues to operate and function within the specified performance parameters) when irradiated to a predetermined dose-rate level; or, the guide can be used to determine the dose-rate burnout failure level (that is, the minimum dose rate at which burnout failure occurs). However, since this latter test is destructive, the minimum dose-rate burnout failure level must be determined statistically.
SCOPE
1.1 This guide defines the detailed requirements for testing semiconductor devices for short-pulse high dose-rate ionization-induced survivability and burnout failure. The test facility shall be capable of providing the necessary dose rates to perform the measurements. Typically, large flash X-ray (FXR) machines operated in the photon mode, or FXR e-beam facilities are utilized because of their high dose-rate capabilities. Electron Linear Accelerators (LINACs) may be used if the dose rate is sufficient. Two modes of test are described: (1) A survivability test, and (2) A burnout failure level test.  
1.2 The values stated in International System of Units (SI) are to be regarded as standard. No other units of measurement are included in this standard.  
1.3 This international standard was developed in accordance with internationally recognized principles on standardization established in the Decision on Principles for the Development of International Standards, Guides and Recommendations issued by the World Trade Organization Technical Barriers to Trade (TBT) Committee.

  • Guide
    7 pages
    English language
    sale 15% off
  • Guide
    7 pages
    English language
    sale 15% off
ASTM
ASTM F1190-18(Guide)
Standard Guide for Neutron Irradiation of Unbiased Electronic Components

SIGNIFICANCE AND USE
5.1 Semiconductor devices can be permanently damaged by neutrons (1, 2)6. The effect of such damage on the performance of an electronic component can be determined by measuring the component’s electrical characteristics before and after exposure to fast neutrons in the neutron fluence range of interest. The resulting data can be utilized in the design of electronic circuits that are tolerant of the degradation exhibited by that component.  
5.2 This guide provides a method by which the exposure of silicon and gallium arsenide semiconductor devices to neutron irradiation may be performed in a manner that is repeatable and which will allow comparison to be made of data taken at different facilities.  
5.3 For semiconductors other than silicon and gallium arsenide, applicable validated 1-MeV damage functions are not available in codified National standards. In the absence of a validated 1-MeV damage function, the non-ionizing energy loss (NIEL) or the displacement kerma, as a function of incident neutron energy, normalized to the response in the 1 MeV energy region, may be used as an approximation. See Practice E722 for a description of the method used to determine the damage functions in Si and GaAs (3).
SCOPE
1.1 This guide strictly applies only to the exposure of unbiased silicon (Si) or gallium arsenide (GaAs) semiconductor components (integrated circuits, transistors, and diodes) to neutron radiation to determine the permanent damage in the components. Validated 1-MeV displacement damage functions codified in National Standards are not currently available for other semiconductor materials.  
1.2 Elements of this guide, with the deviations noted, may also be applicable to the exposure of semiconductors comprised of other materials except that validated 1-MeV displacement damage functions codified in National standards are not currently available.  
1.3 Only the conditions of exposure are addressed in this guide. The effects of radiation on the test sample should be determined using appropriate electrical test methods.  
1.4 This guide addresses those issues and concerns pertaining to irradiations with neutrons.  
1.5 System and subsystem exposures and test methods are not included in this guide.  
1.6 The range of interest for neutron fluence in displacement damage semiconductor testing range from approximately 109 to 1016  1-MeV n/cm2.  
1.7 This guide does not address neutron-induced single or multiple neutron event effects or transient annealing.  
1.8 This guide provides an alternative to Test Method 1017, Neutron Displacement Testing, a component of MIL-STD-883 and MIL-STD-750.  
1.9 This standard does not purport to address all of the safety concerns, if any, associated with its use. It is the responsibility of the user of this standard to establish appropriate safety, health, and environmental practices and determine the applicability of regulatory limitations prior to use.  
1.10 This international standard was developed in accordance with internationally recognized principles on standardization established in the Decision on Principles for the Development of International Standards, Guides and Recommendations issued by the World Trade Organization Technical Barriers to Trade (TBT) Committee.

  • Guide
    6 pages
    English language
    sale 15% off
  • Guide
    6 pages
    English language
    sale 15% off