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ASTM F1212-89(2002)

(Test Method)

Standard Test Method for Thermal Stability Testing of Gallium Arsenide Wafers (Withdrawn 2008)

Standard Test Method for Thermal Stability Testing of Gallium Arsenide Wafers (Withdrawn 2008)

SCOPE
1.1 This destructive test method determines whether a given sample of semi-insulating gallium arsenide (GaAs) will remain semi-insulating after exposure to the high temperatures normally required for the activation of implanted layers.
1.2 The underlying assumption is that other wafers of GaAs, whose manufacturing history was the same as the wafer from which the test sample was taken, will respond to high temperatures in like manner.
1.3 The emphasis in this test method is on simplicity and safety of apparatus, and on securing a measurement that is independent of the apparatus used.
1.4 This test method is directly applicable to uncapped and unimplanted samples of GaAs. However, users of this test method may extend it to capped or implanted samples, or both, in which case a controlled test of capped versus uncapped samples, or implanted versus unimplanted samples, is recommended.
1.5 This test method detects impurities "from the bulk" (that is, from within the GaAs wafer) that will likely affect the electrical behavior of devices formed on the surface of the wafer. This test method is not sensitive to surface impurities or process-induced impurities, except as interferences (see Interferences).
1.6
WITHDRAWN RATIONALE
Formerly under the jurisdiction of Committee F01 on Electronics, this practice was withdrawn in June 2008 in accordance with section 10.5.3.1 of the Regulations Governing ASTM Technical Committees, which requires that standards shall be updated by the end of the eighth year since the last approval date.

General Information

Status
Withdrawn
Publication Date
23-Feb-1989
Withdrawal Date
29-Jul-2008
ICS
29.045 - Semiconducting materials
Technical Committee
F01 - Electronics
Drafting Committee
F01.15 - Compound Semiconductors
Current Stage
Ref Project

Relations

Replaces
ASTM F1212-89(1996)e1 - Standard Test Method for Thermal Stability Testing of Gallium Arsenide Wafers
Effective Date
24-Feb-1989

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ASTM F1212-89(2002) - Standard Test Method for Thermal Stability Testing of Gallium Arsenide Wafers (Withdrawn 2008)ASTM F1212-89(2002) - Standard Test Method for Thermal Stability Testing of Gallium Arsenide Wafers (Withdrawn 2008)
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ASTM F1212-89(2002) - Standard Test Method for Thermal Stability Testing of Gallium Arsenide Wafers (Withdrawn 2008)
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NOTICE: This standard has either been superseded and replaced by a new version or withdrawn.
Contact ASTM International (www.astm.org) for the latest information
Designation:F 1212–89(Reapproved 2002)
Standard Test Method for
1
Thermal Stability Testing of Gallium Arsenide Wafers
This standard is issued under the fixed designation F 1212; the number immediately following the designation indicates the year of
original adoption or, in the case of revision, the year of last revision. A number in parentheses indicates the year of last reapproval. A
superscript epsilon (e) indicates an editorial change since the last revision or reapproval.
1. Scope 3. Terminology
1.1 This destructive test method determines whether a given 3.1 Definitions:
sample of semi-insulating gallium arsenide (GaAs) will remain 3.1.1 annealing—The process of heating a sample of GaAs
semi-insulating after exposure to the high temperatures nor- in a furnace to a specific temperature, under a reducing
mally required for the activation of implanted layers. atmosphere and with a means to reduce the loss of arsenic via
1.2 TheunderlyingassumptionisthatotherwafersofGaAs, sublimation from its surface.
whose manufacturing history was the same as the wafer from 3.1.2 capped annealing—The process of placing a protec-
which the test sample was taken, will respond to high tempera- tive layer (usually silicon nitride or silicon dioxide) on the
tures in like manner. GaAs sample surface, thereby reducing the loss of arsenic
1.3 The emphasis in this test method is on simplicity and vapor from the sample’s surface during annealing. It is not
safety of apparatus, and on securing a measurement that is described further in this test method, since the capping process
independent of the apparatus used. introduces several variables that can affect the test results.
1.4 This test method is directly applicable to uncapped and 3.1.3 proximity annealing—The process of placing the
unimplanted samples of GaAs. However, users of this test GaAs sample between two similar pieces of GaAs, thereby
method may extend it to capped or implanted samples, or both, reducing the loss of arsenic vapor from the sample’s surface
in which case a controlled test of capped versus uncapped during annealing.
samples, or implanted versus unimplanted samples, is recom- 3.1.4 thermal stability—The ratio between the sample’s
mended. apparent bulk resistivity after the annealing test, and an
1.5 This test method detects impurities “from the bulk’’ identical sample’s bulk resistivity without annealing.
(that is, from within the GaAs wafer) that will likely affect the
4. Summary of Test Method
electrical behavior of devices formed on the surface of the
4.1 The sample is heated in a manner similar to the heating
wafer. This test method is not sensitive to surface impurities or
process-induced impurities, except as interferences (see Inter- process that an ion-implanted wafer would undergo. Then the
bulkresistivityofthesampleiscomparedtothebulkresistivity
ferences).
1.6 This standard does not purport to address all of the of an identical sample (control) that did not undergo heat
treatment. The difference between the resistivities, if any, is a
safety concerns, if any, associated with its use. It is the
responsibility of the user of this standard to establish appro- measure of the sample’s sensitivity to heat treatment, or in
other words its “thermal stability’’.
priate safety and health practices and determine the applica-
bility of regulatory limitations prior to use.
5. Significance and Use
2. Referenced Documents
5.1 Devices that involve ion implantation into a monocrys-
2
2.1 ASTM Standards: talline semi-insulating GaAs wafer are designed with the
assumption that the wafer will remain semi-insulating during
F 76 Test Methods for Measuring Resistivity and Hall
Coefficient and Determining Hall Mobility in Single- manufacture. However, ion implantation always damages the
crystal lattice of the wafer’s surface, and the damaged surface
Crystal Semiconductors
layer tends to collect impurities from the bulk of the wafer
when the wafer is heated. Those impurities can become
1
This test method is under the jurisdiction of ASTM Committee F01 on
unwanted dopants: they can render the surface layer conduc-
Electronics and is the direct responsibility of Subcommittee F01.15 on Compound
tive, or interfere with the implanted species in various ways.
Semiconductors.
Current edition approved Feb. 24, 1989. Published April 1989.
The net effect in either case is a nonfunctioning device.
2
For referenced ASTM standards, visit the ASTM website, www.astm.org, or
5.2 No spectroscopic method is sensitive enough to detect
contact ASTM Customer Service at service@astm.org. For Annual Book of ASTM
all possible bulk impurities; their presence in the wafer itself
Standards volume information, refer to the standard’s Document Summary page on
the ASTM website. cannot be predicted in advance. This test method serves to
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