Standard Practice for Unaided Visual Inspection of Polished Silicon Wafer Surfaces (Withdrawn 2003)

SCOPE
This standard was transferred to SEMI (www.semi.org) May 2003
1.1 This practice covers an inspection procedure for determining the surface quality of silicon wafers that have been polished on one side.
1.2 This practice is intended as a large-volume acceptance method and does not require use of a microscope or other optical instruments. The inspection relies heavily on the visual acuity of the operator; therefore, test results may be very operator-sensitive.
Note 1—For clarification of the identification of certain observed defects, procedures given in Practices F 154 may be employed.
1.3 Defects visible to the unaided eye on polished wafer surfaces are categorized in three groups by the illumination geometry which best delineates them: front-surface high-intensity light, front-surface diffuse light, and back-surface diffuse light. These defects originate from two sources: (1) imperfections in the silicon crystal, and (2) damage from the manufacturing process, including handling and packaging.
1.4 The inspection described generally takes place after polishing and post-polish cleaning but before packaging. Although cleaning and packaging procedures are not a part of this practice, the inspection may be performed on a packaged product to determine the effect of such procedures on the quality of the polished wafers.
1.5 The values stated in SI units are to be regarded as the standard. The values given in parentheses are for information only.
1.6 This standard does not purport to address all of the safety concerns, if any, associated with its use. It is the responsibility of the user of this standard to establish appropriate safety and health practices and to determine the applicability of regulatory limitations prior to use.

General Information

Status
Withdrawn
Publication Date
09-Dec-2002
Withdrawal Date
09-May-2003
Technical Committee
Current Stage
Ref Project

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ASTM F523-02 - Standard Practice for Unaided Visual Inspection of Polished Silicon Wafer Surfaces (Withdrawn 2003)
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NOTICE: This standard has either been superceded and replaced by a new version or discontinued.
Contact ASTM International (www.astm.org) for the latest information.
Designation: F 523 – 02
Standard Practice for
Unaided Visual Inspection of Polished Silicon Wafer
1
Surfaces
This standard is issued under the fixed designation F 523; the number immediately following the designation indicates the year of
original adoption or, in the case of revision, the year of last revision. A number in parentheses indicates the year of last reapproval. A
superscript epsilon (e) indicates an editorial change since the last revision or reapproval.
1. Scope F 154 Practices and Nomenclature for Identification of
Structures and Contaminants Seen on Specular Silicon
1.1 This practice covers an inspection procedure for deter-
2
Surfaces
mining the surface quality of silicon wafers that have been
polished on one side.
3. Terminology
1.2 This practice is intended as a large-volume acceptance
3.1 Definitions:
method and does not require use of a microscope or other
3.1.1 back surface—of a semiconductor wafer, the exposed
optical instruments. The inspection relies heavily on the visual
surface opposite to that upon which active semiconductor
acuity of the operator; therefore, test results may be very
devices have been or will be fabricated.
operator-sensitive.
3.1.2 chip—in semiconductor wafers, region where material
NOTE 1—For clarification of the identification of certain observed
has been removed from the surface or edge of the wafer.
defects, procedures given in Practices F 154 may be employed.
3.1.3 contaminant, area—foreign matter that is visible to
1.3 Defects visible to the unaided eye on polished wafer
the unaided eye under high-intensity illumination on the wafer,
surfaces are categorized in three groups by the illumination
of extent greater than a single light-point defect.
geometry which best delineates them: front-surface high-
3.1.4 crack—cleavage or fracture that extends to the surface
intensity light, front-surface diffuse light, and back-surface
of a wafer.
diffuse light. These defects originate from two sources: (1)
3.1.5 cratering—a surface texture of irregular closed ridges
imperfections in the silicon crystal, and (2) damage from the
with smooth central regions.
manufacturing process, including handling and packaging.
3.1.6 crow’s foot— on semiconductor wafers, intersecting
1.4 The inspection described generally takes place after
cracks in a pattern resembling a 88crow’s foot’’ (Y)on{111}
polishing and post-polish cleaning but before packaging. Al-
surfaces and a cross (+) on {100} surfaces.
though cleaning and packaging procedures are not a part of this
3.1.7 dimple—on semiconductor wafers, a smooth surface
practice, the inspection may be performed on a packaged
depression larger than 3 mm in diameter.
product to determine the effect of such procedures on the
3.1.8 front surface—of a semiconductor wafer, the exposed
quality of the polished wafers.
surface on which active devices have been or will be fabri-
1.5 The values stated in SI units are to be regarded as the
cated.
standard. The values given in parentheses are for information
3.1.9 groove—in a semiconductor wafer, a shallow scratch
only.
with rounded edges, that is usually the remnant of a scratch not
1.6 This standard does not purport to address all of the
completely removed by mechanical polishing.
safety concerns, if any, associated with its use. It is the
3.1.10 haze—on a semiconductor wafer, a cloudy or hazy
responsibility of the user of this standard to establish appro-
appearance attributable to light scattering by concentrations of
priate safety and health practices and to determine the
microscopic surface irregularities such as pits, mounds, small
applicability of regulatory limitations prior to use.
ridges or scratches, particles, etc.
3.1.10.1 Discussion—The light reflection from an indi-
2. Referenced Documents
vidual irregularity cannot be readily detected by the unaided
2.1 ASTM Standards:
eye so haze is a mass effect seen as a high density of tiny
reflections.
3.1.11 imbedded abrasive grains—on a semiconductor wa-
1
This practice is under the jurisdiction of ASTM Committee F01 on Electronics
fer, abrasive particles mechanically forced into the surface.
and is the direct responsibility of Subcommittee F01.06 on Silicon Materials and
Process Control.
Current edition approved Dec. 10, 2002. Published February 2003. Originally
approved in 1977 as F 523 – 77 T. Last previous edition approved in 1993 as
2
F 523 – 93 (1997). Annual Book of ASTM Standards, Vol. 10.05.
Copyright © ASTM International, 100 Barr Harbor Drive, PO Box C700, West Conshohocken, PA 19428-2959, United States.
1

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NOTICE: This standard has either been superceded and replaced by a new version or discontinued.
Contact ASTM International (www.astm.org) for the latest information.
F523–02
3.1.12 light point defect—an isolated,
...

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