ASTM F1810-97(2002)

Standard Test Method for Counting Preferentially Etched or Decorated Surface Defects in Silicon Wafers (Withdrawn 2003)

SCOPE
This standard was transferred to SEMI (www.semi.org) May 2003
1.1 This test method describes the technique to count the density of surface defects in silicon wafers by microscopic analysis.
Note 1—Practical use of a defect counting method requires an assumption be made that defects are randomly distributed on the surface. If this assumption is not met, the accuracy and precision of this test method will be diminished.
1.2 Application of this test method is limited to specimens that have discrete, identifiable artifacts on the surface of the silicon sample. Typical samples have been preferentially etched according to Guide F 1809 or epitaxially deposited, forming defects in a silicon layer structure.
1.3 Wafer thickness and diameter for this test method is limited only by the range of microscope stage motions available.
1.4 This test method is applicable to silicon wafers with defect density between 0.01 and 10 000 defects per cm2.
Note 2—The commercially significant defect density range is between 0.01 to 10 defects per cm2, but this test method extends to higher defect levels due and improved statistical sampling obtained with higher counts.
1.5 This standard does not purport to address all of the safety concerns, if any, associated with its use. It is the responsibility of the user of this standard to establish appropriate safety and health practices and determine the applicability of regulatory limitations prior to use.

General Information

• Status: Withdrawn
• Publication Date: 09-Jun-1997
• Withdrawal Date: 09-May-2003
• ICS: 29.045 - Semiconducting materials
• Technical Committee: F01 - Electronics

Relations

• Replaces: ASTM F1810-97 - Standard Test Method for Counting Preferentially Etched or Decorated Surface Defects in Silicon Wafers
• Effective Date: 10-Jun-1997

Standards Content (Sample)

NOTICE: This standard has either been superceded and replaced by a new version or discontinued.
Contact ASTM International (www.astm.org) for the latest information.
Designation: F 1810 – 97 (Reapproved 2002)
Standard Test Method for
Counting Preferentially Etched or Decorated Surface
1
Defects in Silicon Wafers
This standard is issued under the fixed designation F 1810; the number immediately following the designation indicates the year of
original adoption or, in the case of revision, the year of last revision. A number in parentheses indicates the year of last reapproval. A
superscript epsilon (e) indicates an editorial change since the last revision or reapproval.
1. Scope F 1727 Practice for Detection of Oxidation Induced Defects
2
in Polished Silicon Wafers
1.1 This test method describes the technique to count the
F 1809 Guide for Selection and Use of Etching Solutions to
density of surface defects in silicon wafers by microscopic
2
Delineate Structural Defects in Silicon
analysis.
NOTE 1—Practical use of a defect counting method requires an assump- 3. Terminology
tion be made that defects are randomly distributed on the surface. If this
3.1 Definitions of terms related to silicon technology are
assumption is not met, the accuracy and precision of this test method will
found in Terminology F 1241.
be diminished.
1.2 Application of this test method is limited to specimens
4. Summary of Test Method
that have discrete, identifiable artifacts on the surface of the
4.1 Selected and prepared samples for this test used Practice
silicon sample. Typical samples have been preferentially
F 1725, F 1726 or F 1727. The defect to be analyzed is exposed
etched according to Guide F 1809 or epitaxially deposited,
using a specific etching solution suggested in Guide F 1809.
forming defects in a silicon layer structure.
4.2 Align the wafer on a microscope stage, inspect accord-
1.3 Wafer thickness and diameter for this test method is
ing to predefined inspection pattern and count specific defects
limited only by the range of microscope stage motions avail-
distinguished by shape or size.
able.
4.3 The basic inspection pattern is a single diametric scan
1.4 This test method is applicable to silicon wafers with
though the center point of the wafer.
2
defect density between 0.01 and 10 000 defects per cm .
4.4 The starting and ending points of the scan pattern are 5
mm from the edges of the wafer. Fig. 1 represents the
NOTE 2—The commercially significant defect density range is between
2
0.01 to 10 defects per cm , but this test method extends to higher defect characteristics of the pattern.
levels due and improved statistical sampling obtained with higher counts.
4.5 The complete inspection pattern of this test method is
based upon the combination of four separate scans across
1.5 This standard does not purport to address all of the
different diameters.
safety concerns, if any, associated with its use. It is the
responsibility of the user of this standard to establish appro-
5. Significance and Use
priate safety and health practices and determine the applica-
5.1 Defects on or in silicon wafers may adversely affect
bility of regulatory limitations prior to use.
device performance and yield.
2. Referenced Documents
5.2 Crystal defect analysis is a useful technique in trouble-
shooting device process problems. The type, location, and
2.1 ASTM Standards:
2
density of defects counted by this test method may be related
F 1241 Terminology of Silicon Technology
to the crystal growth process, surface preparation, contamina-
F 1725 Practice for Analysis of Crystallographic Perfection
2
tion, or thermal history of the wafer.
of Silicon Ingots
5.3 This test method is suitable for acceptance testing when
F 1726 Practice for Analysis of Crystallographic Perfection
2
used with referenced standards.
of Silicon Wafers
6. Interferences
6.1 Improper identification of defects is possible during the
1
This test method is under the jurisdiction of ASTM Committee F01 on
counting process.
Electronics and is the direct responsibility of Subcommittee F01.06 on Silicon
6.1.1 Contamination not removed by cleaning procedures or
Materials and Process Control.
deposited following cleaning, may become visible after pref-
Current edition approved June 10, 1997. Published August 1997.
2
Annual Book of ASTM Standards, Vol 10.05. erential etching.
Copyright © ASTM International, 100 Barr Harbor Drive, PO Box C700, West Conshohocken, PA 19428-2959, United States.
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NOTICE: This standard has either been superceded and replaced by a new version or discontinued.
Contact ASTM International (www.astm.org) for the latest information.
F 1810 – 97 (2002)
the field of view along the path labeled AB in Fig. 1. Points A
and B are found 5 mm from the wafer edge and the line AB is
rotated 45° from the location of the major locating flat or notch.
Alternative edge exclusion positions are acceptable with the
agreement of
...