EN 60191-6:2009

Mechanical standardization of semiconductor devices - Part 6: General rules for the preparation of outline drawings of surface mounted semiconductor device packages

IEC 60191-6:2009 gives general rules for the preparation of outline drawings of surface-mounted semiconductor devices. It supplements IEC 60191-1 and IEC 60191-3. It covers all surface-mounted devices discrete semiconductors with lead count of greater or equal to 8, as well as integrated circuits classified as form E in Clause 3 of IEC 60191-4. This third edition of IEC 60191-6 cancels and replaces the second edition, published in 2004 and constitutes a technical revision. This edition includes the following significant changes with respect to the previous edition: a) scope is modified to cover all surface-mounted devices discrete semiconductors with lead count of greater or equal to 8; b) editorial modifications on several pages; and c) technical revision to ball grid array package (BGA) especially its geometrical drawing format. (two types of BGA would unify as one type as a result of revising drawing format.

Mechanische Normung von Halbleiterbauelementen - Teil 6: Allgemeine Regeln für die Erstellung von Gehäusezeichnungen von SMD-Halbleitergehäusen

Normalisation mécanique des dispositifs à semi-conducteurs - Partie 6: Règles générales pour la préparation des dessins d'encombrement des boîtiers pour dispositifs à semi-conducteurs pour montage en surface

La CEI 60191-6:2009 donne les règles générales pour la préparation des dessins d'encombrement des dispositifs à semi-conducteurs pour montage en surface. Elle complète la CEI 60191-1 et la CEI 60191-3. Elle couvre tous les dispositifs pour montage en surface à semi-conducteurs discrets dotés d'au moins 8 sorties, ainsi que les circuits intégrés classés 'de forme E' dans l'Article 3 de la CEI 60191-4. Cette troisième édition de la CEI 60191-6 annule et remplace la deuxième édition parue en 2004 dont elle constitue une révision technique. La présente édition contient les modifications majeures suivantes par rapport à l'édition précédente: a) le domaine d'application est modifié pour couvrir tous les dispositifs pour montage en surface à semi-conducteurs discrets dotés d'au moins 8 sorties; b) des modifications éditoriales sur plusieurs pages; et c) une révision technique du boîtier matriciel à billes (BGA) particulièrement son format de dessin géométrique. (la révision du format de dessin permettrait d'unifier deux types de boîtier BGA pour n'avoir qu'un seul type.)

Standardizacija mehanskih lastnosti polprevodniških elementov - 6. del: Splošna pravila za pripravo tehničnih risb okrovov površinsko nameščenih polprevodniških elementov (IEC 60191-6:2009)

Ta del IEC 60191 podaja splošna pravila za pripravo tehničnih risb površinsko nameščenih polprevodniških elementov. Dopolnjuje IEC 60191-1 in IEC 60191-3. Zajema vse površinsko nameščene ločene polprevodniške elemente s stopnjo svinca vsaj 8 in integrirana vezja, opredeljena kot oblika E v Klavzuli 3 IEC 60191-4.

General Information

• Status: Published
• Publication Date: 22-Dec-2009
• Withdrawal Date: 30-Nov-2012
• ICS: 31.080.01 - Semiconductor devices in general
• Technical Committee: CLC/SR 47D - Mechanical standardization of semiconductor devices
• Drafting Committee: IEC/SC 47D - IEC_SC_47D
• Parallel Committee: IEC/SC 47D - IEC_SC_47D
• Current Stage: 6060 - Document made available - Publishing
• Start Date: 23-Dec-2009
• Completion Date: 23-Dec-2009
• Ref Project: SIST EN 60191-6:2010 - Mechanical standardization of semiconductor devices -- Part 6: General rules for the preparation of outline drawings of surface mounted semiconductor device packages (IEC 60191-6:2009)

Relations

• Replaces: EN 60191-6:2004 - Mechanical standardization of semiconductor devices - Part 6: General rules for the preparation of outline drawings of surface mounted semiconductor device packages
• Effective Date: 29-Jan-2023

Standards Content (Sample)

SLOVENSKI STANDARD
SIST EN 60191-6:2010
01-marec-2010
1DGRPHãþD
SIST EN 60191-6:2005
6WDQGDUGL]DFLMDPHKDQVNLKODVWQRVWLSROSUHYRGQLãNLKHOHPHQWRYGHO6SORãQD
SUDYLOD]DSULSUDYRWHKQLþQLKULVERNURYRYSRYUãLQVNRQDPHãþHQLK
SROSUHYRGQLãNLKHOHPHQWRY,(&
Mechanical standardization of semiconductor devices -- Part 6: General rules for the
preparation of outline drawings of surface mounted semiconductor device packages (IEC
60191-6:2009)
Mechanische Normung von Halbleiterbauelementen - Teil 6: Allgemeine Regeln für die
Erstellung von Gehäusezeichnungen von SMD-Halbleitergehäusen (IEC 60191-6:2009)
Normalisation mécanique des dispositifs à semi-conducteurs - Partie 6: Règles
générales pour la préparation des dessins d'encombrement des boîtiers pour dispositifs
à semi-conducteurs pour montage en surface (CEI 60191-6:2009)
Ta slovenski standard je istoveten z: EN 60191-6:2009
ICS:
01.100.25 5LVEHVSRGURþMD Electrical and electronics
HOHNWURWHKQLNHLQHOHNWURQLNH engineering drawings
31.080.01 Polprevodniški elementi Semiconductor devices in
(naprave) na splošno general
31.240 Mehanske konstrukcije za Mechanical structures for
elektronsko opremo electronic equipment
SIST EN 60191-6:2010 en,fr
2003-01.Slovenski inštitut za standardizacijo. Razmnoževanje celote ali delov tega standarda ni dovoljeno.

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SIST EN 60191-6:2010

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SIST EN 60191-6:2010

EUROPEAN STANDARD
EN 60191-6

NORME EUROPÉENNE
December 2009
EUROPÄISCHE NORM

ICS 31.080.01 Supersedes EN 60191-6:2004


English version


Mechanical standardization of semiconductor devices -
Part 6: General rules for the preparation of outline drawings of surface
mounted semiconductor device packages
(IEC 60191-6:2009)


Normalisation mécanique des dispositifs  Mechanische Normung
à semi-conducteurs - von Halbleiterbauelementen -
Partie 6: Règles générales Teil 6: Allgemeine Regeln
pour la préparation des dessins für die Erstellung
d'encombrement des boîtiers von Gehäusezeichnungen
pour dispositifs à semi-conducteurs von SMD-Halbleitergehäusen
pour montage en surface (IEC 60191-6:2009)
(CEI 60191-6:2009)




This European Standard was approved by CENELEC on 2009-12-01. CENELEC members are bound to comply
with the CEN/CENELEC Internal Regulations which stipulate the conditions for giving this European Standard
the status of a national standard without any alteration.

Up-to-date lists and bibliographical references concerning such national standards may be obtained on
application to the Central Secretariat or to any CENELEC member.

This European Standard exists in three official versions (English, French, German). A version in any other
language made by translation under the responsibility of a CENELEC member into its own language and notified
to the Central Secretariat has the same status as the official versions.

CENELEC members are the national electrotechnical committees of Austria, Belgium, Bulgaria, Cyprus, the
Czech Republic, Denmark, Estonia, Finland, France, Germany, Greece, Hungary, Iceland, Ireland, Italy, Latvia,
Lithuania, Luxembourg, Malta, the Netherlands, Norway, Poland, Portugal, Romania, Slovakia, Slovenia, Spain,
Sweden, Switzerland and the United Kingdom.

CENELEC
European Committee for Electrotechnical Standardization
Comité Européen de Normalisation Electrotechnique
Europäisches Komitee für Elektrotechnische Normung

Central Secretariat: Avenue Marnix 17, B - 1000 Brussels


© 2009 CENELEC - All rights of exploitation in any form and by any means reserved worldwide for CENELEC members.
Ref. No. EN 60191-6:2009 E

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SIST EN 60191-6:2010
EN 60191-6:2009 - 2 -
Foreword
The text of document 47D/736/CDV, future edition 3 of IEC 60191-6, prepared by SC 47D, Mechanical
standardization for semiconductor devices, of IEC TC 47, Semiconductor devices, was submitted to the
IEC-CENELEC parallel vote and was approved by CENELEC as EN 60191-6 on 2009-12-01.
This European Standard supersedes EN 60191-6:2004.
EN 60191-6:2009 includes the following significant changes with respect to EN 60191-6:2004:
− scope is modified to cover all surface-mounted devices discrete semiconductors with lead count of
greater or equal to 8;
− editorial modifications on several pages; and
− technical revision to ball grid array package (BGA) especially its geometrical drawing format. (two
types of BGA would unify as one type as a result of revising drawing format.)
The following dates were fixed:
– latest date by which the EN has to be implemented
at national level by publication of an identical
(dop) 2010-09-01
national standard or by endorsement
– latest date by which the national standards conflicting
(dow) 2012-12-01
with the EN have to be withdrawn
Annex ZA has been added by
...