Circuit boards and circuit board assemblies - Design and use - Part 6-1: Land pattern design - Generic requirements for land pattern on circuit boards

IEC 61188-6-1:2021 specifies the requirements for soldering surfaces on circuit boards. This includes lands and land pattern for surface mounted components and also solderable hole configurations for through-hole mounted components. These requirements are based on the solder joint requirements of the IEC 61191-1, IEC 61191-2, IEC 61191-3 and IEC 61191-4.

Cartes imprimées et cartes imprimées équipées - Conception et utilisation - Partie 6-1: Conception de la zone de report - Exigences génériques pour la zone de report sur les cartes imprimées

L’IEC 61188-6-1:2021 spécifie les exigences relatives aux surfaces de brasage sur les cartes imprimées. Cela comprend les pastilles et la zone de report des composants montés en surface, ainsi que les configurations des trous de brasage des composants montés par trous traversants. Ces exigences se fondent sur les exigences relatives au joint de brasure de l’IEC 61191-1, l’IEC 61191-2, l’IEC 61191-3 et l’IEC 61191-4.

General Information

Status
Published
Publication Date
22-Feb-2021
Drafting Committee
Current Stage
PPUB - Publication issued
Start Date
09-Mar-2021
Completion Date
23-Feb-2021
Ref Project

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IEC 61188-6-1 ®
Edition 1.0 2021-02
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
colour
inside
Circuit boards and circuit board assemblies – Design and use –
Part 6-1: Land pattern design – Generic requirements for land pattern on
circuit boards
Cartes imprimées et cartes imprimées équipées – Conception et utilisation –
Partie 6-1: Conception de la zone de report – Exigences génériques pour la zone
de report sur les cartes imprimées

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IEC 61188-6-1 ®
Edition 1.0 2021-02
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
colour
inside
Circuit boards and circuit board assemblies – Design and use –

Part 6-1: Land pattern design – Generic requirements for land pattern on

circuit boards
Cartes imprimées et cartes imprimées équipées – Conception et utilisation –

Partie 6-1: Conception de la zone de report – Exigences génériques pour la zone

de report sur les cartes imprimées

INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
COMMISSION
ELECTROTECHNIQUE
INTERNATIONALE
ICS 31.180; 31.190 ISBN 978-2-8322-9443-7

– 2 – IEC 61188-6-1:2021 © IEC 2021
CONTENTS
FOREWORD . 4
INTRODUCTION . 6
1 Scope . 7
2 Normative references . 7
3 Terms and definitions . 7
4 Design requirements . 10
4.1 General . 10
4.2 Product classification . 10
4.3 General surface mount land and land pattern requirements. 11
4.4 Component packages and soldering process . 11
4.5 Soldering surface requirements. 11
4.5.1 Main soldering techniques . 11
4.5.2 Reflow soldering . 11
4.5.3 Reflow soldering of leaded components . 12
4.5.4 Wave soldering of surface mounted components . 12
4.5.5 Wave soldering of through-hole mounted components . 14
4.6 Soldering surface definition techniques . 15
4.6.1 General . 15
4.6.2 Metal defined lands . 15
4.6.3 Solder mask defined lands . 15
4.6.4 Comparison of solder mask defined and non solder mask defined
solderable surfaces . 16
5 Component classification . 16
5.1 General . 16
5.2 Leaded components . 16
5.3 Surface mount components . 17
6 The proportional dimensioning system . 17
7 Terminal classification . 18
7.1 Leaded terminals . 18
7.2 Surface mount terminals . 18
7.2.1 Terminal classes. 18
7.2.2 Flat bottom terminals . 18
7.2.3 General land requirements for flat bottom terminals . 19
7.2.4 Flat bottom and vertical side terminals . 19
7.2.5 General land requirements for flat bottom and vertical side terminals . 20
8 Requirements for lands of solder joints . 20
8.1 Land/Pad dimensioning considerations of leaded terminals . 20
8.2 Land dimensioning considerations of surface mount terminals . 20
Annex A (informative)  Dimensioning concept of former IEC 61188-5-1 . 21
A.1 Dimensioning systems . 21
A.1.1 General . 21
A.1.2 Component tolerancing . 22
A.1.3 Solving for dimension Z . 25
A.1.4 Land tolerancing . 25
A.1.5 Fabrication allowances . 25
A.1.6 Assembly tolerancing . 26

A.1.7 Dimension and tolerance analysis . 27
Annex B (informative)  History of land dimensioning standards . 29
B.1 IPC-782 . 29
B.2 IEC 61188-5 series . 29
B.3 IPC-7351 . 29
Bibliography . 30

Figure 1 – Component placed on solder paste . 12
Figure 2 – Component glued for wave soldering. 13
Figure 3 – Wave soldered component with solder thieves . 14
Figure 4 – Solder joint of a leaded component . 15
Figure 5 – Leaded component – Capacitor . 17
Figure 6 – Surface mount component – Chip capacitor . 17
Figure 7 – Flat bottom terminals with wettable flanks . 18
Figure A.1 – Profile tolerancing method . 21
Figure A.2 – Example of 3216M capacitor dimensioning for optimum solder fillet
condition . 22
Figure A.3 – Profile dimensioning of gull-wing leaded SOIC . 23
Figure A.4 – Pitch for multiple leaded component . 28

Table 1 – Flat bottom terminals . 19
Table 2 – Flat bottom/vertical side terminals . 19
Table A.1 – Conductor width tolerances . 26
Table A.2 – Feature location accuracy . 26

– 4 – IEC 61188-6-1:2021 © IEC 2021
INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________
CIRCUIT BOARDS AND CIRCUIT BOARD ASSEMBLIES –
DESIGN AND USE –
Part 6-1: Land pattern design –
Generic requirements for land pattern on circuit boards

FOREWORD
1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising
all national electrotechnical committee
...

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