Circuit boards and circuit board assemblies - Design and use - Part 6-1: Land pattern design - Generic requirements for land pattern on circuit boards

IEC 61188-6-1:2021 specifies the requirements for soldering surfaces on circuit boards. This includes lands and land pattern for surface mounted components and also solderable hole configurations for through-hole mounted components. These requirements are based on the solder joint requirements of the IEC 61191-1, IEC 61191-2, IEC 61191-3 and IEC 61191-4.

Cartes imprimées et cartes imprimées équipées - Conception et utilisation - Partie 6-1: Conception de la zone de report - Exigences génériques pour la zone de report sur les cartes imprimées

L’IEC 61188-6-1:2021 spécifie les exigences relatives aux surfaces de brasage sur les cartes imprimées. Cela comprend les pastilles et la zone de report des composants montés en surface, ainsi que les configurations des trous de brasage des composants montés par trous traversants. Ces exigences se fondent sur les exigences relatives au joint de brasure de l’IEC 61191-1, l’IEC 61191-2, l’IEC 61191-3 et l’IEC 61191-4.

General Information

Status
Published
Publication Date
22-Feb-2021
Current Stage
PPUB - Publication issued
Completion Date
23-Feb-2021
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IEC 61188-6-1
Edition 1.0 2021-02
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
colour
inside
Circuit boards and circuit board assemblies – Design and use –
Part 6-1: Land pattern design – Generic requirements for land pattern on
circuit boards
Cartes imprimées et cartes imprimées équipées – Conception et utilisation –
Partie 6-1: Conception de la zone de report – Exigences génériques pour la zone
de report sur les cartes imprimées
IEC 61188-6-1:2021-02(en-fr)
---------------------- Page: 1 ----------------------
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---------------------- Page: 2 ----------------------
IEC 61188-6-1
Edition 1.0 2021-02
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
colour
inside
Circuit boards and circuit board assemblies – Design and use –
Part 6-1: Land pattern design – Generic requirements for land pattern on
circuit boards
Cartes imprimées et cartes imprimées équipées – Conception et utilisation –
Partie 6-1: Conception de la zone de report – Exigences génériques pour la zone
de report sur les cartes imprimées
INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
COMMISSION
ELECTROTECHNIQUE
INTERNATIONALE
ICS 31.180; 31.190 ISBN 978-2-8322-9443-7

Warning! Make sure that you obtained this publication from an authorized distributor.

Attention! Veuillez vous assurer que vous avez obtenu cette publication via un distributeur agréé.

® Registered trademark of the International Electrotechnical Commission
Marque déposée de la Commission Electrotechnique Internationale
---------------------- Page: 3 ----------------------
– 2 – IEC 61188-6-1:2021 © IEC 2021
CONTENTS

FOREWORD ........................................................................................................................... 4

INTRODUCTION ..................................................................................................................... 6

1 Scope .............................................................................................................................. 7

2 Normative references ...................................................................................................... 7

3 Terms and definitions ...................................................................................................... 7

4 Design requirements ...................................................................................................... 10

4.1 General ................................................................................................................. 10

4.2 Product classification ............................................................................................ 10

4.3 General surface mount land and land pattern requirements................................... 11

4.4 Component packages and soldering process ........................................................ 11

4.5 Soldering surface requirements............................................................................. 11

4.5.1 Main soldering techniques ............................................................................. 11

4.5.2 Reflow soldering ............................................................................................ 11

4.5.3 Reflow soldering of leaded components ......................................................... 12

4.5.4 Wave soldering of surface mounted components ........................................... 12

4.5.5 Wave soldering of through-hole mounted components ................................... 14

4.6 Soldering surface definition techniques ................................................................. 15

4.6.1 General ......................................................................................................... 15

4.6.2 Metal defined lands ....................................................................................... 15

4.6.3 Solder mask defined lands ............................................................................. 15

4.6.4 Comparison of solder mask defined and non solder mask defined

solderable surfaces ....................................................................................... 16

5 Component classification ............................................................................................... 16

5.1 General ................................................................................................................. 16

5.2 Leaded components .............................................................................................. 16

5.3 Surface mount components ................................................................................... 17

6 The proportional dimensioning system ........................................................................... 17

7 Terminal classification ................................................................................................... 18

7.1 Leaded terminals .................................................................................................. 18

7.2 Surface mount terminals ....................................................................................... 18

7.2.1 Terminal classes............................................................................................ 18

7.2.2 Flat bottom terminals ..................................................................................... 18

7.2.3 General land requirements for flat bottom terminals ....................................... 19

7.2.4 Flat bottom and vertical side terminals ........................................................... 19

7.2.5 General land requirements for flat bottom and vertical side terminals ............ 20

8 Requirements for lands of solder joints .......................................................................... 20

8.1 Land/Pad dimensioning considerations of leaded terminals ................................... 20

8.2 Land dimensioning considerations of surface mount terminals .............................. 20

Annex A (informative) Dimensioning concept of former IEC 61188-5-1 ................................ 21

A.1 Dimensioning systems .......................................................................................... 21

A.1.1 General ......................................................................................................... 21

A.1.2 Component tolerancing .................................................................................. 22

A.1.3 Solving for dimension Z ................................................................................. 25

A.1.4 Land tolerancing ............................................................................................ 25

A.1.5 Fabrication allowances .................................................................................. 25

A.1.6 Assembly tolerancing ..................................................................................... 26

---------------------- Page: 4 ----------------------
IEC 61188-6-1:2021 © IEC 2021 – 3 –

A.1.7 Dimension and tolerance analysis .................................................................. 27

Annex B (informative) History of land dimensioning standards ............................................ 29

B.1 IPC-782 ................................................................................................................ 29

B.2 IEC 61188-5 series ............................................................................................... 29

B.3 IPC-7351 .............................................................................................................. 29

Bibliography .......................................................................................................................... 30

Figure 1 – Component placed on solder paste ...................................................................... 12

Figure 2 – Component glued for wave soldering.................................................................... 13

Figure 3 – Wave soldered component with solder thieves ..................................................... 14

Figure 4 – Solder joint of a leaded component ...................................................................... 15

Figure 5 – Leaded component – Capacitor ............................................................................ 17

Figure 6 – Surface mount component – Chip capacitor ......................................................... 17

Figure 7 – Flat bottom terminals with wettable flanks ............................................................ 18

Figure A.1 – Profile tolerancing method ................................................................................ 21

Figure A.2 – Example of 3216M capacitor dimensioning for optimum solder fillet

condition ............................................................................................................................... 22

Figure A.3 – Profile dimensioning of gull-wing leaded SOIC .................................................. 23

Figure A.4 – Pitch for multiple leaded component ................................................................. 28

Table 1 – Flat bottom terminals ............................................................................................. 19

Table 2 – Flat bottom/vertical side terminals ......................................................................... 19

Table A.1 – Conductor width tolerances ................................................................................ 26

Table A.2 – Feature location accuracy .................................................................................. 26

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– 4 – IEC 61188-6-1:2021 © IEC 2021
INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________
CIRCUIT BOARDS AND CIRCUIT BOARD ASSEMBLIES –
DESIGN AND USE –
Part 6-1: Land pattern design –
Generic requirements for land pattern on circuit boards
FOREWORD

1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising

all national electrotechnical committees (IEC National Committees). The object of IEC is to promote international

co-operation on all questions concerning standardization in the electrical and electronic fields. To this end and

in addition to other activities, IEC publishes International Standards, Technical Specifications, Technical Reports,

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preparation is entrusted to technical committees; any IEC National Committee interested in the subject dealt with

may participate in this preparatory work. International, governmental and non-governmental organizations liaising

with the IEC also participate in this preparation. IEC collaborates closely with the International Organization for

Standardization (ISO) in accordance with conditions determined by agreement between the two organizations.

2) The formal decisions or agreements of IEC on technical matters express, as nearly as possible, an international

consensus of opinion on the relevant subjects since each technical committee has representation from all

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3) IEC Publications have the form of recommendations for international use and are accepted by IEC National

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6) All users should ensure that they have the latest edition of this publication.

7) No liability shall attach to IEC or its directors, employees, servants or agents including individual experts and

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other damage of any nature whatsoever, whether direct or indirect, or for costs (including legal fees) and

expenses arising out of the publication, use of, or reliance upon, this IEC Publication or any other IEC

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8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is

indispensable for the correct application of this publication.

9) Attention is drawn to the possibility that some of the elements of this IEC Publication may be the subject of patent

rights. IEC shall not be held responsible for identifying any or all such patent rights.

IEC 61188-6-1 has been prepared by IEC technical committee 91: Electronics assembly

technology. It is an International Standard.

This first edition cancels and replaces the first edition of IEC 61188-5-1 published in 2002, and

constitutes a technical revision.

This edition includes the following significant technical changes with respect to the previous

edition:

a) The content is completely updated to reflect current industry requirements. See Introduction.

---------------------- Page: 6 ----------------------
IEC 61188-6-1:2021 © IEC 2021 – 5 –
The text of this International Standard is based on the following documents:
Draft Report on voting
91/1636/CDV 91/1671/RVC

Full information on the voting for its approval can be found in the report on voting indicated in

the above table.
The language used for the development of this International Standard is English.

This document was drafted in accordance with ISO/IEC Directives, Part 2, and developed in

accordance with ISO/IEC Directives, Part 1 and ISO/IEC Directives, IEC Supplement, available

at www.iec.ch/members_experts/refdocs. The main document types developed by IEC are

described in greater detail at www.iec.ch/standardsdev/publications.

A list of all parts in the IEC 61188 series, published under the general title Circuit boards and

circuit board assemblies – Design and use, can be found on the IEC website.

Future documents in this series will carry the new general title as cited above. Titles of existing

documents in this series will be updated at the time of the next edition.

The committee has decided that the contents of this document will remain unchanged until the

stability date indicated on the IEC website under "http://webstore.iec.ch" in the data related to

the specific document. At this date, the document will be
 reconfirmed,
 withdrawn,
 replaced by a revised edition, or
 amended.

IMPORTANT – The "colour inside" logo on the cover page of this document indicates

that it contains colours which are considered to be useful for the correct understanding

of its contents. Users should therefore print this document using a colour printer.

---------------------- Page: 7 ----------------------
– 6 – IEC 61188-6-1:2021 © IEC 2021
INTRODUCTION

Explanation why the following standards will be replaced by the new IEC 6188-6 series:

IEC 61188-5-1:2002, Printed boards and printed board assemblies – Design and use – Part 5‑1:

Attachment (land/joint) considerations – Generic requirements
‑2:

IEC 61188-5-2:2003, Printed boards and printed board assemblies – Design and use – Part 5

Attachment (land/joint) considerations – Discrete components

IEC 61188-5-3:2007, Printed boards and printed board assemblies – Design and use – Part 5‑3:

Attachment (land/joint) considerations – Components with gull-wing leads on two sides

IEC 61188-5-4:2007, Printed boards and printed board assemblies – Design and use – Part 5‑4:

Attachment (land/joint) considerations – Components with J leads on two sides

IEC 61188-5-5:2007, Printed boards and printed board assemblies – Design and use – Part 5‑5:

Attachment (land/joint) considerations – Components with gull-wing leads on four sides

‑6:

IEC 61188-5-6:2003, Printed boards and printed board assemblies – Design and use – Part 5

Attachment (land/joint) considerations – Chip carriers with J-leads on four sides

IEC 61188-5-8:2007, Printed board and printed board assemblies – Design and use – Part 5‑8:

Attachment (land/joint) considerations – Area array components (BGA, FBGA, CGA, LGA)

Content is mostly equivalent to IPC-782A with Amendments 1 and 2, which was replaced in

2002 by IPC-7351. The component spectrum and pitch levels have dramatically increased since

publication of the IEC 61188-5 (all parts) and the dimensioning concept does no longer fulfil the

mounting and soldering requirements.
---------------------- Page: 8 ----------------------
IEC 61188-6-1:2021 © IEC 2021 – 7 –
CIRCUIT BOARDS AND CIRCUIT BOARD ASSEMBLIES –
DESIGN AND USE –
Part 6-1: Land pattern design –
Generic requirements for land pattern on circuit boards
1 Scope

This part of IEC 61188 specifies the requirements for soldering surfaces on circuit boards. This

includes lands and land pattern for surface mounted components and also solderable hole

configurations for through-hole mounted components. These requirements are based on the

solder joint requirements of the IEC 61191-1, IEC 61191-2, IEC 61191-3 and IEC 61191-4.

2 Normative references

The following documents are referred to in the text in such a way that some or all of their content

constitutes requirements of this document. For dated references, only the edition cited applies.

For undated references, the latest edition of the referenced document (including any

amendments) applies.

IEC 60194, Printed board design, manufacture and assembly – Terms and definitions

IEC 61191-1, Printed board assemblies – Part 1: Generic specification – Requirements for

soldered electrical and electronic assemblies using surface mount and related assembly

technologies

IEC 61191-2:2017, Printed board assemblies – Part 2: Sectional specification – Requirements

for surface mount soldered assemblies

IEC 61191-3, Printed board assemblies – Part 3: Sectional specification – Requirements for

through-hole mount soldered assemblies

IEC 61191-4, Printed board assemblies – Part 4: Sectional specification – Requirements for

terminal soldered assemblies

IEC 61760-3, Surface mounting technology – Part 3: Standard method for the specification of

components for through hole reflow (THR) soldering
3 Terms and definitions

For the purposes of this document, the terms and definitions given in IEC 60194, and the

following apply.

ISO and IEC maintain terminological databases for use in standardization at the following

addresses:
• IEC Electropedia: available at http://www.electropedia.org/
• ISO Online browsing platform: available at http://www.iso.org/obp
---------------------- Page: 9 ----------------------
– 8 – IEC 61188-6-1:2021 © IEC 2021
3.1
assembly
number of parts, subassemblies or combinations thereof joined together

Note 1 to entry: This term can be used in conjunction with other terms listed herein, for example, "printed board

assembly".

[SOURCE: IEC 60194:2015, 80.1327, modified – The second term "assembled board" has been

removed.]
3.2
annular ring
portion of conductive material that completely surrounds a hole
3.3
basic dimension

numerical value used to describe the theoretical exact location of a feature or hole

Note 1 to entry: it is the basis from which permissible variations are established by tolerance on other dimensions

in notes or by feature-control symbols.

[SOURCE: IEC 60194-1:2021, 3.2.24, modified – In the definition "for example a hole" has been

replaced by "or hole".]
3.4
castellation

recessed metallised feature on the edge of a leadless chip carrier that is used to interconnect

conducting surfaces or planes within or on the chip carrier
[SOURCE: IEC 60194-1:2021, 3.3.17]
3.5
component

individual part or combination of parts that, when together, perform (a) design function(s)

Note 1 to entry: See also "discrete component" in 3.4.17 of IEC 60194-2:2017.
[SOURCE: IEC 60194-2:2017, 3.3.19]
3.6
land

portion of a conductive pattern usually, but not exclusively, used for the connection and/or

attachment of components
3.7
land pattern
footprint

combination of lands that is used for the mounting, interconnection and testing of a particular

component
Note 1 to entry: Land pattern is also known as "footprint".
[SOURCE: IEC 60194-1:2021, 3.12.9]
3.8
nominal dimension

dimension that is between the maximum and minimum size of a feature (the tolerance on a

nominal dimension gives the limits of variation of a feature size)
---------------------- Page: 10 ----------------------
IEC 61188-6-1:2021 © IEC 2021 – 9 –
3.9
plated through-hole
PTH

hole with plating on its walls that makes an electrical connection between conductive patterns

on internal layers, external layers, or both, of a printed board
[SOURCE: IEC 60194-1, 3.16.72, modified – The figure has been removed.]
3.10
printed board
completely processed printed circuit and printed wiring configurations

Note 1 to entry: This includes single-sided, double-sided and multilayer boards with rigid, flexible, and rigid-flex

base materials.
Note 2 to entry: "Printed board" is a general term.

[SOURCE: IEC 60194-2:2017, 3.16.23, modified – The second term "board" has been removed

as well as the admitted terms "card" and "circuit card.]
3.11
registration

degree of conformity of the position of a pattern (or portion thereof), a hole, or other feature to

its intended position on a product
[SOURCE: IEC 60194-1:2021, 3.18.28]
3.12
soldering surface
solderable metallized surfaces on circuit boards

Note 1 to entry: This includes lands, annular rings and solderable surfaces of plated through-holes.

3.13
SOIC
small outline integrated circuit
surface-mount technology
SMT

technology where electrical connection of components is made to the surface of a conductive

pattern of a printed board and does not utilize component lead holes
3.14
terminal
connection element of an electronic component
3.15
through-hole technology
THT
assembly process for mounting component packages where leads are passed through

supported (plated-through) or unsupported (bare) holes in an interconnection substrate

3.16
via

plated through-hole that is used as an interlayer connection, but in which there is no intention

to insert a component lead or other reinforcing material

Note 1 to entry: See also "blind via" and "buried via" in 3.2.57 and 3.2.118 of IEC 60194-1:2021.

[SOURCE: IEC 60194-1:2021, 3.22.15]
---------------------- Page: 11 ----------------------
– 10 – IEC 61188-6-1:2021 © IEC 2021
4 Design requirements
4.1 General

Although soldering surfaces are dimensionally defined and since they are a part of the printed

board circuitry geometry, they are subject to the producibility requirements and are influenced

by tolerances associated with plating, etching, assembly or other conditions. The producibility

aspects also pertain to the use of solder mask and legend printing and the registration required

between the solder mask and the conductor patterns. The smaller the component dimensions,

the more is producibility influenced by solder mask and silkscreen thickness. For circuit boards

with component packages size 1005M (0402 imperial size) and smaller, legend printing should

be avoided because it can have detrimental effects on solder paste printing.

This document assumes that the land pattern follows the principle that under nominal conditions,

the overlap of the component termination and the corresponding soldering land will be complete.

The dimensions used for component descriptions shall be taken from standards developed by

industrial and/or standards bodies. Designers should refer to these standards for additional or

specific component package dimensions. When packages are not standardized, manufacturer

datasheets are the foundation for dimensioning.

NOTE 1 For a comprehensive description of the given circuit board and for achieving the best possible solder joints

to the devices assembled, the whole set of design elements includes, in addition to the land pattern definition:

– solder mask;
– copper foil thickness;
– plating thickness;
– solder paste stencil;
– clearance between adjacent components;
– clearance between bottom of component and PCB surface, if relevant;
– keep-out areas, if relevant;
– suitable rules for adhesive applications.

All of these design elements are commonly defined for the mounting conditions. This standard is limited to defining

requirements
...

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